On 2/14/20 9:51 AM, Peter Maydell wrote: > The AArch32 DBGDIDR defines properties like the number of > breakpoints, watchpoints and context-matching comparators. On an > AArch64 CPU, the register may not even exist if AArch32 is not > supported at EL1. > > Currently we hard-code use of DBGDIDR to identify the number of > breakpoints etc; this works for all our TCG CPUs, but will break if > we ever add an AArch64-only CPU. We also have an assert() that the > AArch32 and AArch64 registers match, which currently works only by > luck for KVM because we don't populate either of these ID registers > from the KVM vCPU and so they are both zero. > > Clean this up so we have functions for finding the number > of breakpoints, watchpoints and context comparators which look > in the appropriate ID register. > > This allows us to drop the "check that AArch64 and AArch32 agree > on the number of breakpoints etc" asserts: > * we no longer look at the AArch32 versions unless that's the > right place to be looking > * it's valid to have a CPU (eg AArch64-only) where they don't match > * we shouldn't have been asserting the validity of ID registers > in a codepath used with KVM anyway > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > target/arm/cpu.h | 7 +++++++ > target/arm/internals.h | 42 +++++++++++++++++++++++++++++++++++++++ > target/arm/debug_helper.c | 6 +++--- > target/arm/helper.c | 21 +++++--------------- > 4 files changed, 57 insertions(+), 19 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~