On 27.02.20 10:23, Janosch Frank wrote: > Let's rename PSW_MASK_ESA_ADDR to PSW_MASK_SHORT_ADDR because we're > not working with a ESA PSW which would not support the extended > addressing bit. Also let's actually use it. > > Additionally we introduce PSW_MASK_SHORT_CTRL and use it throughout > the codebase. > > Signed-off-by: Janosch Frank <[email protected]> > Reviewed-by: Christian Borntraeger <[email protected]> > --- > hw/s390x/ipl.c | 2 +- > target/s390x/cpu.c | 4 ++-- > target/s390x/cpu.h | 3 ++- > 3 files changed, 5 insertions(+), 4 deletions(-) > > diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c > index 7773499d7f..e36f770a72 100644 > --- a/hw/s390x/ipl.c > +++ b/hw/s390x/ipl.c > @@ -179,7 +179,7 @@ static void s390_ipl_realize(DeviceState *dev, Error > **errp) > /* if not Linux load the address of the (short) IPL PSW */ > ipl_psw = rom_ptr(4, 4); > if (ipl_psw) { > - pentry = be32_to_cpu(*ipl_psw) & 0x7fffffffUL; > + pentry = be32_to_cpu(*ipl_psw) & PSW_MASK_SHORT_ADDR; > } else { > error_setg(&err, "Could not get IPL PSW"); > goto error; > diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c > index 8da1905485..3dd396e870 100644 > --- a/target/s390x/cpu.c > +++ b/target/s390x/cpu.c > @@ -78,13 +78,13 @@ static void s390_cpu_load_normal(CPUState *s) > S390CPU *cpu = S390_CPU(s); > uint64_t spsw = ldq_phys(s->as, 0); > > - cpu->env.psw.mask = spsw & 0xffffffff80000000ULL; > + cpu->env.psw.mask = spsw & PSW_MASK_SHORT_CTRL; > /* > * Invert short psw indication, so SIE will report a specification > * exception if it was not set. > */ > cpu->env.psw.mask ^= PSW_MASK_SHORTPSW; > - cpu->env.psw.addr = spsw & 0x7fffffffULL; > + cpu->env.psw.addr = spsw & PSW_MASK_SHORT_ADDR; > > s390_cpu_set_state(S390_CPU_STATE_OPERATING, cpu); > } > diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h > index 8a557fd8d1..1d17709d6e 100644 > --- a/target/s390x/cpu.h > +++ b/target/s390x/cpu.h > @@ -276,7 +276,8 @@ extern const VMStateDescription vmstate_s390_cpu; > #define PSW_MASK_RI 0x0000008000000000ULL > #define PSW_MASK_64 0x0000000100000000ULL > #define PSW_MASK_32 0x0000000080000000ULL > -#define PSW_MASK_ESA_ADDR 0x000000007fffffffULL > +#define PSW_MASK_SHORT_ADDR 0x000000007fffffffULL > +#define PSW_MASK_SHORT_CTRL 0xffffffff80000000ULL > > #undef PSW_ASC_PRIMARY > #undef PSW_ASC_ACCREG >
Reviewed-by: David Hildenbrand <[email protected]> -- Thanks, David / dhildenb
