On 7/30/20 12:57 PM, Richard Henderson wrote:
> On 7/22/20 2:16 AM, frank.ch...@sifive.com wrote:
>> + (s->sew < MO_32)) {
>> + /* SEW < FLEN */
>> + TCGv_i64 t1 = tcg_temp_new_i64();
>> + TCGv_i32 sew = tcg_const_i32(1 << (s->sew + 3));
>> + gen_helper_narrower_nanbox_fpr(t1, cpu_fpr[a->rs1],
>> + sew, cpu_env);
>
> Also, while there is currently one function, gen_nanbox_s, you'll want to add
> gen_nanbox_h to match.
Oops, I forgot which way your helper worked.
The correct function is gen_check_nanbox_s.
r~
