Richard Henderson <richard.hender...@linaro.org> writes:
> On 7/22/20 2:16 AM, frank.ch...@sifive.com wrote:
>> + if (env->misa & RVV) {
>> + /* TODO: support vlen other than 128, 256, 512 bits. */
>> + const char *vector_xml_name = NULL;
>> + switch (cpu->cfg.vlen) {
>> + case 128:
>> + vector_xml_name = "riscv-64bit-vector-128b.xml";
>> + break;
>> + case 256:
>> + vector_xml_name = "riscv-64bit-vector-256b.xml";
>> + break;
>> + case 512:
>> + vector_xml_name = "riscv-64bit-vector-512b.xml";
>> + break;
>> + default:
>> + vector_xml_name = NULL;
>> + break;
>> + }
>
> I guess this is ok as-is, but consider mirroring
> arm_gen_dynamic_svereg_xml().
Longer term I would personally prefer us centralising the dynamic
building of XML to a gdbstub utility function. The eventual long term aim
would be for guests to register(!) their set of additional registers
with the central core code in a more useful form so we can also expose
them to the plugins system which will most likely not want to inflict
XML on the plugins ;-)
--
Alex Bennée
