On Thu, 1 Oct 2020 at 18:08, Richard Henderson <richard.hender...@linaro.org> wrote: > > When TBI is enabled in a given regime, 56 bits of the address > are significant and we need to clear out any other matching > virtual addresses with differing tags. > > The other uses of tlb_flush_page (without mmuidx) in this file > are only used by aarch32 mode. > > Fixes: 38d931687fa1 > Reported-by: Jordan Frank <jordanfr...@fb.com> > Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
