On 10/12/20 8:37 AM, Peter Maydell wrote: > In arm_cpu_realizefn(), if the CPU has VFP or Neon disabled then we > squash the ID register fields so that we don't advertise it to the > guest. This code was written for A-profile and needs some tweaks to > work correctly on M-profile: > > * A-profile only fields should not be zeroed on M-profile: > - MVFR0.FPSHVEC,FPTRAP > - MVFR1.SIMDLS,SIMDINT,SIMDSP,SIMDHP > - MVFR2.SIMDMISC > * M-profile only fields should be zeroed on M-profile: > - MVFR1.FP16 > > In particular, because MVFR1.SIMDHP on A-profile is the same field as > MVFR1.FP16 on M-profile this code was incorrectly disabling FP16 > support on an M-profile CPU (where has_neon is always false). This > isn't a visible bug yet because we don't have any M-profile CPUs with > FP16 support, but the change is necessary before we introduce any. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > target/arm/cpu.c | 29 ++++++++++++++++++----------- > 1 file changed, 18 insertions(+), 11 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
