Re: [RFC 04/15] target/riscv: rvb: logic-with-negate

[Richard Henderson]

On 11/18/20 12:29 AM, frank.ch...@sifive.com wrote:
> +static void gen_andn(TCGv ret, TCGv arg1, TCGv arg2)
> +{
> +    TCGv t;
> +    t = tcg_temp_new();
> +
> +    tcg_gen_not_tl(t, arg2);
> +    tcg_gen_and_tl(ret, arg1, t);
> +
> +    tcg_temp_free(t);
> +}

This is tcg_gen_andc_tl.

> +static void gen_orn(TCGv ret, TCGv arg1, TCGv arg2)
> +{
> +    TCGv t;
> +    t = tcg_temp_new();
> +
> +    tcg_gen_not_tl(t, arg2);
> +    tcg_gen_or_tl(ret, arg1, t);
> +
> +    tcg_temp_free(t);
> +}

This is tcg_gen_orc_tl.

> +static void gen_xnor(TCGv ret, TCGv arg1, TCGv arg2)
> +{
> +    TCGv t;
> +    t = tcg_temp_new();
> +
> +    tcg_gen_not_tl(t, arg2);
> +    tcg_gen_xor_tl(ret, arg1, t);
> +
> +    tcg_temp_free(t);
> +}

This is tcg_gen_eqv_tl.


r~