On 09/01/2011 11:11 AM, Avi Kivity wrote:
On 09/01/2011 07:05 PM, Anthony Liguori wrote:
I think the patchset is fine. It routes all access through pci_dma_rw(),
which accepts a PCIDevice. We can later define pci_dma_rw() in terms of
the memory API and get the benefit of the memory hierarchy.
The challenge is what you do about something like ne2k where the core
chipset can either be a PCI device or an ISA device. You would have to
implement a wrapper around pci_dma_rw() in order to turn it into
cpu_physical_memory_rw when doing ISA.
True. But I still think it's the right thing.
We can't really pass a MemoryRegion as the source address, since there
is no per-device MemoryRegion.
Couldn't the PCI bus expose 255 MemoryRegions though? It could still
use the pci_address_space I think since that should include RAM too, right?
In fact, initially, you could have a
pci_bus_get_device_memory_region(bus, dev) that just returns
pci_address_space().
You just need the memory_st[bwl] functions I think.
Regards,
Anthony Liguori
We can use pci_address_space() for basic
offsetting, and for bypassing bridge windows, but iommu source detection
has to use the PCIDevice directly.
