On Thu, Feb 18, 2021 at 9:26 PM Peter Maydell <peter.mayd...@linaro.org> wrote:
>
> On Thu, 18 Feb 2021 at 01:59, Alistair Francis <alistair.fran...@wdc.com>
> wrote:
> >
> > The following changes since commit 1af5629673bb5c1592d993f9fb6119a62845f576:
> >
> > Merge remote-tracking branch
> > 'remotes/dgilbert-gitlab/tags/pull-virtiofs-20210216' into staging
> > (2021-02-17 14:44:18 +0000)
> >
> > are available in the Git repository at:
> >
> > g...@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20210217-1
> >
> > for you to fetch changes up to d0867d2dad4125d2295b28d6f91fa49cf034ffd2:
> >
> > hw/riscv: virt: Map high mmio for PCIe (2021-02-17 17:47:19 -0800)
> >
> > ----------------------------------------------------------------
> > RISC-V PR for 6.0
> >
> > This PR is a collection of RISC-V patches:
> > - Improvements to SiFive U OTP
> > - Upgrade OpenSBI to v0.9
> > - Support the QMP dump-guest-memory
> > - Add support for the SiFive SPI controller (sifive_u)
> > - Initial RISC-V system documentation
> > - A fix for the Goldfish RTC
> > - MAINTAINERS updates
> > - Support for high PCIe memory in the virt machine
>
> Fails to compile, 32 bit hosts:
>
> ../../hw/riscv/virt.c: In function 'virt_machine_init':
> ../../hw/riscv/virt.c:621:43: error: comparison is always false due to
> limited range of data type [-Werror=type-limits]
> if ((uint64_t)(machine->ram_size) > 10 * GiB) {
> ^
> ../../hw/riscv/virt.c:623:33: error: large integer implicitly
> truncated to unsigned type [-Werror=overflow]
> machine->ram_size = 10 * GiB;
> ^~
This kind of error is tricky. I wonder whether we should deprecate
32-bit host support though.
Regards,
Bin
