On 6/4/21 8:52 AM, Alex Bennée wrote:
From: Claudio Fontana<cfont...@suse.de>
restrict zcr_el1, zcr_el2, zcr_no_el2, zcr_el3 reginfo,
and the related SVE functions to TARGET_AARCH64.
Signed-off-by: Claudio Fontana<cfont...@suse.de>
Reviewed-by: Richard Henderson<richard.hender...@linaro.org>
Signed-off-by: Alex Bennée<alex.ben...@linaro.org>
---
target/arm/tcg/cpregs.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/target/arm/tcg/cpregs.c b/target/arm/tcg/cpregs.c
index 8422da4335..56d56f7f81 100644
--- a/target/arm/tcg/cpregs.c
+++ b/target/arm/tcg/cpregs.c
@@ -5791,6 +5791,8 @@ static const ARMCPRegInfo debug_lpae_cp_reginfo[] = {
REGINFO_SENTINEL
};
+#ifdef TARGET_AARCH64
+
static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
@@ -5843,6 +5845,8 @@ static const ARMCPRegInfo zcr_el3_reginfo = {
.writefn = zcr_write, .raw_writefn = raw_write
};
+#endif /* TARGET_AARCH64 */
+
Given that tcg/cpregs.c is > 7k lines, I wouldn't mind splitting the file on
that principal. But just sprinking ifdefs is not on.
r~
