On Thu, 10 Feb 2022 at 04:04, Richard Henderson <richard.hender...@linaro.org> wrote: > > The original A.a revision of the AArch64 ARM required that we > force-extend the addresses in these registers from 49 bits. > This language has been loosened via a combination of IMPLEMENTATION > DEFINED and CONSTRAINTED UNPREDICTABLE to allow consideration of > the entire aligned address. > > This means that we do not have to consider whether or not FEAT_LVA > is enabled, and decide from which bit an address might need to be > extended. > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
