* Igor Mammedov (imamm...@redhat.com) wrote:
> On Tue, 22 Feb 2022 10:42:55 +0100
> Gerd Hoffmann <kra...@redhat.com> wrote:
>
> > Hi,
> >
> > > > And the upstream code is now pretty much identical except for the
> > > > default; note that for TCG you do need to keep to 40 I think.
> > >
> > > will TCG work with 40bits on host that supports less than that?
> >
> > When I understand things correctly the problem is that the phys-bits
> > limit applies to the npt/ept tables too, effectively restricting guest
> > physical address space to host physical address space.
> >
> > TCG is not affected by that and should work just fine.
> >
> > Not sure what happens if you turn off npt/ept and run on softmmu.
> > Possibly that works fine too.
> >
> > > Also quick look at host-phys-bits shows that it affects only 'host'
> > > cpu model and is NOP for all other models.
> >
> > I don't think so. microvm forces host-phys-bits=on and that works with
> > all cpu models.
>
> I just don't see how host-phys-bits can work for other than 'host' cpu model.
> It's true that property is available for all cpu models, but the field it sets
> is only used in target/i386/host-cpu.c, the same applies to
> host-phys-bits-limit.
> Am I missing something?
The hook in kvm/kvm-cpu.c kvm_cpu_realizefn:
/*
* The realize order is important, since x86_cpu_realize() checks if
* nothing else has been set by the user (or by accelerators) in
* cpu->ucode_rev and cpu->phys_bits, and updates the CPUID results in
* mwait.ecx.
* This accel realization code also assumes cpu features are already
expanded.
*
* realize order:
*
* x86_cpu_realize():
* -> x86_cpu_expand_features()
* -> cpu_exec_realizefn():
* -> accel_cpu_realizefn()
* kvm_cpu_realizefn() -> host_cpu_realizefn()
* -> check/update ucode_rev, phys_bits, mwait
*/
Dave
> >
> > take care,
> > Gerd
> >
>
--
Dr. David Alan Gilbert / dgilb...@redhat.com / Manchester, UK
