On Sun, 17 Apr 2022 at 19:02, Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> Use tcg_constant_{i32,i64} as appropriate throughout.
>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
> ---
> target/arm/translate-m-nocp.c | 12 +++++-------
> 1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/target/arm/translate-m-nocp.c b/target/arm/translate-m-nocp.c
> index d9e144e8eb..27363a7b4e 100644
> --- a/target/arm/translate-m-nocp.c
> +++ b/target/arm/translate-m-nocp.c
> @@ -173,7 +173,7 @@ static bool trans_VSCCLRM(DisasContext *s, arg_VSCCLRM *a)
> }
>
> /* Zero the Sregs from btmreg to topreg inclusive. */
> - zero = tcg_const_i64(0);
> + zero = tcg_constant_i64(0);
> if (btmreg & 1) {
> write_neon_element64(zero, btmreg >> 1, 1, MO_32);
> btmreg++;
Looks like we were previously leaking the TCGv for this one?
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
thanks
-- PMM
