Add to peter.mayd...@linaro.org
在 2022/7/1 11:07, Mao Bibo 写道:
> Loongarch pch msi intc connects to extioi controller, the range of irq number
> is 64-255. Here adds irqbase property for loongarch pch msi controller, we can
> get irq offset from view of pch_msi controller with the method:
> msi vector (from view of upper extioi intc) - irqbase
>
> Signed-off-by: Mao Bibo <maob...@loongson.cn>
> ---
> hw/intc/loongarch_pch_msi.c | 22 ++++++++++++++++++++--
> hw/loongarch/loongson3.c | 1 +
> include/hw/intc/loongarch_pch_msi.h | 2 ++
> 3 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/hw/intc/loongarch_pch_msi.c b/hw/intc/loongarch_pch_msi.c
> index 74bcdbdb48..b36d6d76e4 100644
> --- a/hw/intc/loongarch_pch_msi.c
> +++ b/hw/intc/loongarch_pch_msi.c
> @@ -23,9 +23,14 @@ static uint64_t loongarch_msi_mem_read(void *opaque,
> hwaddr addr, unsigned size)
> static void loongarch_msi_mem_write(void *opaque, hwaddr addr,
> uint64_t val, unsigned size)
> {
> - LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(opaque);
> - int irq_num = val & 0xff;
> + LoongArchPCHMSI *s = (LoongArchPCHMSI *)opaque;
> + int irq_num;
>
> + /*
> + * vector number is irq number from upper extioi intc
> + * need subtract irq base to get msi vector offset
> + */
> + irq_num = (val & 0xff) - s->irq_base;
> trace_loongarch_msi_set_irq(irq_num);
> assert(irq_num < PCH_MSI_IRQ_NUM);
> qemu_set_irq(s->pch_msi_irq[irq_num], 1);
> @@ -58,11 +63,24 @@ static void loongarch_pch_msi_init(Object *obj)
> qdev_init_gpio_in(DEVICE(obj), pch_msi_irq_handler, PCH_MSI_IRQ_NUM);
> }
>
> +static Property loongarch_msi_properties[] = {
> + DEFINE_PROP_UINT32("msi_irq_base", LoongArchPCHMSI, irq_base, 0),
> + DEFINE_PROP_END_OF_LIST(),
> +};
> +
> +static void loongarch_pch_msi_class_init(ObjectClass *klass, void *data)
> +{
> + DeviceClass *dc = DEVICE_CLASS(klass);
> +
> + device_class_set_props(dc, loongarch_msi_properties);
> +}
> +
> static const TypeInfo loongarch_pch_msi_info = {
> .name = TYPE_LOONGARCH_PCH_MSI,
> .parent = TYPE_SYS_BUS_DEVICE,
> .instance_size = sizeof(LoongArchPCHMSI),
> .instance_init = loongarch_pch_msi_init,
> + .class_init = loongarch_pch_msi_class_init,
> };
>
> static void loongarch_pch_msi_register_types(void)
> diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c
> index bd20ebbb78..403dd91e11 100644
> --- a/hw/loongarch/loongson3.c
> +++ b/hw/loongarch/loongson3.c
> @@ -267,6 +267,7 @@ static void loongarch_irq_init(LoongArchMachineState
> *lams)
> }
>
> pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
> + qdev_prop_set_uint32(pch_msi, "msi_irq_base", PCH_MSI_IRQ_START);
> d = SYS_BUS_DEVICE(pch_msi);
> sysbus_realize_and_unref(d, &error_fatal);
> sysbus_mmio_map(d, 0, LS7A_PCH_MSI_ADDR_LOW);
> diff --git a/include/hw/intc/loongarch_pch_msi.h
> b/include/hw/intc/loongarch_pch_msi.h
> index f668bfca7a..6d67560dea 100644
> --- a/include/hw/intc/loongarch_pch_msi.h
> +++ b/include/hw/intc/loongarch_pch_msi.h
> @@ -17,4 +17,6 @@ struct LoongArchPCHMSI {
> SysBusDevice parent_obj;
> qemu_irq pch_msi_irq[PCH_MSI_IRQ_NUM];
> MemoryRegion msi_mmio;
> + /* irq base passed to upper extioi intc */
> + unsigned int irq_base;
> };