On 1/11/22 17:01, Bernhard Beschow wrote:
Am 1. November 2022 10:41:51 UTC schrieb Bernhard Beschow <shen...@gmail.com>:
On Mon, Oct 31, 2022 at 12:54 PM Philippe Mathieu-Daudé <phi...@linaro.org>
wrote:
This is a respin of Bernhard's v4 with Freescale eSDHC implemented
as an 'UNIMP' region. See v4 cover here:
https://lore.kernel.org/qemu-devel/20221018210146.193159-1-shen...@gmail.com/
Only tested with the ppce500 machine (no further regression testing).
Since v4:
- Do not rename ESDHC_* definitions to USDHC_*
- Do not modify SDHCIState structure
Works beautifully, both for the buildroot load and for my proprietary load.
So:
Tested-by: Bernhard Beschow<shen...@gmail.com>
Bernhard Beschow (4):
hw/block/pflash_cfi0{1, 2}: Error out if device length isn't a power
of two
docs/system/ppc/ppce500: Use qemu-system-ppc64 across the board(s)
hw/ppc/e500: Implement pflash handling
hw/ppc/e500: Add Freescale eSDHC to e500plat
Philippe Mathieu-Daudé (2):
hw/sd/sdhci: MMIO region is implemented in 32-bit accesses
hw/sd/sdhci: Map host controller interface in host endianess
Hi Phil,
Is there a chance to get this in for 7.2?
Well 1/ can you review patch #1 and 2/ we need to figure out what to do
with patch #2 :) Can you point me to the CCSR datasheet?
