One has 3 register arguments; the other has 2 plus an m3 field.
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
tcg/s390x/tcg-target.c.inc | 57 +++++++++++++++++++++-----------------
1 file changed, 32 insertions(+), 25 deletions(-)
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index 34de5c5ebe..a489b3359e 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -177,18 +177,19 @@ typedef enum S390Opcode {
RRE_SLBGR = 0xb989,
RRE_XGR = 0xb982,
- RRF_LOCR = 0xb9f2,
- RRF_LOCGR = 0xb9e2,
- RRF_NRK = 0xb9f4,
- RRF_NGRK = 0xb9e4,
- RRF_ORK = 0xb9f6,
- RRF_OGRK = 0xb9e6,
- RRF_SRK = 0xb9f9,
- RRF_SGRK = 0xb9e9,
- RRF_SLRK = 0xb9fb,
- RRF_SLGRK = 0xb9eb,
- RRF_XRK = 0xb9f7,
- RRF_XGRK = 0xb9e7,
+ RRFa_NRK = 0xb9f4,
+ RRFa_NGRK = 0xb9e4,
+ RRFa_ORK = 0xb9f6,
+ RRFa_OGRK = 0xb9e6,
+ RRFa_SRK = 0xb9f9,
+ RRFa_SGRK = 0xb9e9,
+ RRFa_SLRK = 0xb9fb,
+ RRFa_SLGRK = 0xb9eb,
+ RRFa_XRK = 0xb9f7,
+ RRFa_XGRK = 0xb9e7,
+
+ RRFc_LOCR = 0xb9f2,
+ RRFc_LOCGR = 0xb9e2,
RR_AR = 0x1a,
RR_ALR = 0x1e,
@@ -543,8 +544,14 @@ static void tcg_out_insn_RRE(TCGContext *s, S390Opcode op,
tcg_out32(s, (op << 16) | (r1 << 4) | r2);
}
-static void tcg_out_insn_RRF(TCGContext *s, S390Opcode op,
- TCGReg r1, TCGReg r2, int m3)
+static void tcg_out_insn_RRFa(TCGContext *s, S390Opcode op,
+ TCGReg r1, TCGReg r2, TCGReg r3)
+{
+ tcg_out32(s, (op << 16) | (r3 << 12) | (r1 << 4) | r2);
+}
+
+static void tcg_out_insn_RRFc(TCGContext *s, S390Opcode op,
+ TCGReg r1, TCGReg r2, int m3)
{
tcg_out32(s, (op << 16) | (m3 << 12) | (r1 << 4) | r2);
}
@@ -1419,7 +1426,7 @@ static void tgen_setcond(TCGContext *s, TCGType type,
TCGCond cond,
/* Emit: d = 0, t = 1, d = (cc ? t : d). */
tcg_out_movi(s, TCG_TYPE_I64, dest, 0);
tcg_out_movi(s, TCG_TYPE_I64, TCG_TMP0, 1);
- tcg_out_insn(s, RRF, LOCGR, dest, TCG_TMP0, cc);
+ tcg_out_insn(s, RRFc, LOCGR, dest, TCG_TMP0, cc);
} else {
/* Emit: d = 1; if (cc) goto over; d = 0; over: */
tcg_out_movi(s, type, dest, 1);
@@ -1438,7 +1445,7 @@ static void tgen_movcond(TCGContext *s, TCGType type,
TCGCond c, TCGReg dest,
if (v3const) {
tcg_out_insn(s, RIE, LOCGHI, dest, v3, cc);
} else {
- tcg_out_insn(s, RRF, LOCGR, dest, v3, cc);
+ tcg_out_insn(s, RRFc, LOCGR, dest, v3, cc);
}
} else {
c = tcg_invert_cond(c);
@@ -1468,7 +1475,7 @@ static void tgen_clz(TCGContext *s, TCGReg dest, TCGReg
a1,
}
if (HAVE_FACILITY(LOAD_ON_COND)) {
/* Emit: if (one bit found) dest = r0. */
- tcg_out_insn(s, RRF, LOCGR, dest, TCG_REG_R0, 2);
+ tcg_out_insn(s, RRFc, LOCGR, dest, TCG_REG_R0, 2);
} else {
/* Emit: if (no one bit found) goto over; dest = r0; over: */
tcg_out_insn(s, RI, BRC, 8, (4 + 4) >> 1);
@@ -2085,7 +2092,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
} else if (a0 == a1) {
tcg_out_insn(s, RR, SR, a0, a2);
} else {
- tcg_out_insn(s, RRF, SRK, a0, a1, a2);
+ tcg_out_insn(s, RRFa, SRK, a0, a1, a2);
}
break;
@@ -2097,7 +2104,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
} else if (a0 == a1) {
tcg_out_insn(s, RR, NR, a0, a2);
} else {
- tcg_out_insn(s, RRF, NRK, a0, a1, a2);
+ tcg_out_insn(s, RRFa, NRK, a0, a1, a2);
}
break;
case INDEX_op_or_i32:
@@ -2108,7 +2115,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
} else if (a0 == a1) {
tcg_out_insn(s, RR, OR, a0, a2);
} else {
- tcg_out_insn(s, RRF, ORK, a0, a1, a2);
+ tcg_out_insn(s, RRFa, ORK, a0, a1, a2);
}
break;
case INDEX_op_xor_i32:
@@ -2119,7 +2126,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
} else if (a0 == a1) {
tcg_out_insn(s, RR, XR, args[0], args[2]);
} else {
- tcg_out_insn(s, RRF, XRK, a0, a1, a2);
+ tcg_out_insn(s, RRFa, XRK, a0, a1, a2);
}
break;
@@ -2347,7 +2354,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
} else if (a0 == a1) {
tcg_out_insn(s, RRE, SGR, a0, a2);
} else {
- tcg_out_insn(s, RRF, SGRK, a0, a1, a2);
+ tcg_out_insn(s, RRFa, SGRK, a0, a1, a2);
}
break;
@@ -2359,7 +2366,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
} else if (a0 == a1) {
tcg_out_insn(s, RRE, NGR, args[0], args[2]);
} else {
- tcg_out_insn(s, RRF, NGRK, a0, a1, a2);
+ tcg_out_insn(s, RRFa, NGRK, a0, a1, a2);
}
break;
case INDEX_op_or_i64:
@@ -2370,7 +2377,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
} else if (a0 == a1) {
tcg_out_insn(s, RRE, OGR, a0, a2);
} else {
- tcg_out_insn(s, RRF, OGRK, a0, a1, a2);
+ tcg_out_insn(s, RRFa, OGRK, a0, a1, a2);
}
break;
case INDEX_op_xor_i64:
@@ -2381,7 +2388,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
} else if (a0 == a1) {
tcg_out_insn(s, RRE, XGR, a0, a2);
} else {
- tcg_out_insn(s, RRF, XGRK, a0, a1, a2);
+ tcg_out_insn(s, RRFa, XGRK, a0, a1, a2);
}
break;
--
2.34.1
