This patch includes:
- VMSKLTZ.{B/H/W/D};
- VMSKGEZ.B;
- VMSKNZ.B.
Signed-off-by: Song Gao <gaos...@loongson.cn>
---
target/loongarch/disas.c | 7 +++
target/loongarch/helper.h | 7 +++
target/loongarch/insn_trans/trans_lsx.c.inc | 7 +++
target/loongarch/insns.decode | 7 +++
target/loongarch/lsx_helper.c | 54 +++++++++++++++++++++
5 files changed, 82 insertions(+)
diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c
index 34a459410b..b674167120 100644
--- a/target/loongarch/disas.c
+++ b/target/loongarch/disas.c
@@ -1055,3 +1055,10 @@ INSN_LSX(vsigncov_b, vvv)
INSN_LSX(vsigncov_h, vvv)
INSN_LSX(vsigncov_w, vvv)
INSN_LSX(vsigncov_d, vvv)
+
+INSN_LSX(vmskltz_b, vv)
+INSN_LSX(vmskltz_h, vv)
+INSN_LSX(vmskltz_w, vv)
+INSN_LSX(vmskltz_d, vv)
+INSN_LSX(vmskgez_b, vv)
+INSN_LSX(vmsknz_b, vv)
diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h
index c2b4407663..ae9351f513 100644
--- a/target/loongarch/helper.h
+++ b/target/loongarch/helper.h
@@ -410,3 +410,10 @@ DEF_HELPER_4(vsigncov_b, void, env, i32, i32, i32)
DEF_HELPER_4(vsigncov_h, void, env, i32, i32, i32)
DEF_HELPER_4(vsigncov_w, void, env, i32, i32, i32)
DEF_HELPER_4(vsigncov_d, void, env, i32, i32, i32)
+
+DEF_HELPER_3(vmskltz_b, void, env, i32, i32)
+DEF_HELPER_3(vmskltz_h, void, env, i32, i32)
+DEF_HELPER_3(vmskltz_w, void, env, i32, i32)
+DEF_HELPER_3(vmskltz_d, void, env, i32, i32)
+DEF_HELPER_3(vmskgez_b, void, env, i32, i32)
+DEF_HELPER_3(vmsknz_b, void, env, i32,i32)
diff --git a/target/loongarch/insn_trans/trans_lsx.c.inc
b/target/loongarch/insn_trans/trans_lsx.c.inc
index ce207eda05..c02602c409 100644
--- a/target/loongarch/insn_trans/trans_lsx.c.inc
+++ b/target/loongarch/insn_trans/trans_lsx.c.inc
@@ -326,3 +326,10 @@ TRANS(vsigncov_b, gen_vvv, gen_helper_vsigncov_b)
TRANS(vsigncov_h, gen_vvv, gen_helper_vsigncov_h)
TRANS(vsigncov_w, gen_vvv, gen_helper_vsigncov_w)
TRANS(vsigncov_d, gen_vvv, gen_helper_vsigncov_d)
+
+TRANS(vmskltz_b, gen_vv, gen_helper_vmskltz_b)
+TRANS(vmskltz_h, gen_vv, gen_helper_vmskltz_h)
+TRANS(vmskltz_w, gen_vv, gen_helper_vmskltz_w)
+TRANS(vmskltz_d, gen_vv, gen_helper_vmskltz_d)
+TRANS(vmskgez_b, gen_vv, gen_helper_vmskgez_b)
+TRANS(vmsknz_b, gen_vv, gen_helper_vmsknz_b)
diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode
index c7237730d3..864a524fe6 100644
--- a/target/loongarch/insns.decode
+++ b/target/loongarch/insns.decode
@@ -782,3 +782,10 @@ vsigncov_b 0111 00010010 11100 ..... ..... .....
@vvv
vsigncov_h 0111 00010010 11101 ..... ..... ..... @vvv
vsigncov_w 0111 00010010 11110 ..... ..... ..... @vvv
vsigncov_d 0111 00010010 11111 ..... ..... ..... @vvv
+
+vmskltz_b 0111 00101001 11000 10000 ..... ..... @vv
+vmskltz_h 0111 00101001 11000 10001 ..... ..... @vv
+vmskltz_w 0111 00101001 11000 10010 ..... ..... @vv
+vmskltz_d 0111 00101001 11000 10011 ..... ..... @vv
+vmskgez_b 0111 00101001 11000 10100 ..... ..... @vv
+vmsknz_b 0111 00101001 11000 11000 ..... ..... @vv
diff --git a/target/loongarch/lsx_helper.c b/target/loongarch/lsx_helper.c
index 73360e45e2..cea1d99eb6 100644
--- a/target/loongarch/lsx_helper.c
+++ b/target/loongarch/lsx_helper.c
@@ -1858,3 +1858,57 @@ DO_HELPER_VVV(vsigncov_b, 8, helper_vvv, do_vsigncov)
DO_HELPER_VVV(vsigncov_h, 16, helper_vvv, do_vsigncov)
DO_HELPER_VVV(vsigncov_w, 32, helper_vvv, do_vsigncov)
DO_HELPER_VVV(vsigncov_d, 64, helper_vvv, do_vsigncov)
+
+/* Vd, Vj, vd = 0 */
+static void helper_vv_z(CPULoongArchState *env,
+ uint32_t vd, uint32_t vj, int bit,
+ void (*func)(vec_t*, vec_t*, int, int))
+{
+ int i;
+ vec_t *Vd = &(env->fpr[vd].vec);
+ vec_t *Vj = &(env->fpr[vj].vec);
+
+ Vd->D[0] = 0;
+ Vd->D[1] = 0;
+
+ for (i = 0; i < LSX_LEN/bit; i++) {
+ func(Vd, Vj, bit, i);
+ }
+}
+
+static void do_vmskltz(vec_t *Vd, vec_t *Vj, int bit, int n)
+{
+ switch (bit) {
+ case 8:
+ Vd->H[0] |= ((0x80 & Vj->B[n]) == 0) << n;
+ break;
+ case 16:
+ Vd->H[0] |= ((0x8000 & Vj->H[n]) == 0) << n;
+ break;
+ case 32:
+ Vd->H[0] |= ((0x80000000 & Vj->W[n]) == 0) << n;
+ break;
+ case 64:
+ Vd->H[0] |= ((0x8000000000000000 & Vj->D[n]) == 0) << n;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+}
+
+static void do_vmskgez(vec_t *Vd, vec_t *Vj, int bit, int n)
+{
+ Vd->H[0] |= !((0x80 & Vj->B[n]) == 0) << n;
+}
+
+static void do_vmsknz(vec_t *Vd, vec_t *Vj, int bit, int n)
+{
+ Vd->H[0] |= (Vj->B[n] == 0) << n;
+}
+
+DO_HELPER_VV(vmskltz_b, 8, helper_vv_z, do_vmskltz)
+DO_HELPER_VV(vmskltz_h, 16, helper_vv_z, do_vmskltz)
+DO_HELPER_VV(vmskltz_w, 32, helper_vv_z, do_vmskltz)
+DO_HELPER_VV(vmskltz_d, 64, helper_vv_z, do_vmskltz)
+DO_HELPER_VV(vmskgez_b, 8, helper_vv_z, do_vmskgez)
+DO_HELPER_VV(vmsknz_b, 8, helper_vv_z, do_vmsknz)
--
2.31.1
