Currently Qemu CXL emulation support is not availabe on AARCH64 but its available with qemu x86_64 architecture, updating the document to reflect the supported platform.
Signed-off-by: Raghu H <raghuhac...@gmail.com> --- docs/system/devices/cxl.rst | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/docs/system/devices/cxl.rst b/docs/system/devices/cxl.rst index 46f9ae9bf1..c786f0f312 100644 --- a/docs/system/devices/cxl.rst +++ b/docs/system/devices/cxl.rst @@ -302,7 +302,8 @@ Example command lines --------------------- A very simple setup with just one directly attached CXL Type 3 device:: - qemu-system-aarch64 -M virt,gic-version=3,cxl=on -m 4g,maxmem=8G,slots=8 -cpu max \ + qemu-system-x86_64 -m 4G,slots=8,maxmem=8G -smp 4 \ + -machine type=q35,accel=kvm,nvdimm=on,cxl=on -enable-kvm \ ... -object memory-backend-file,id=cxl-mem1,share=on,mem-path=/tmp/cxltest.raw,size=256M \ -object memory-backend-file,id=cxl-lsa1,share=on,mem-path=/tmp/lsa.raw,size=256M \ @@ -315,7 +316,8 @@ A setup suitable for 4 way interleave. Only one fixed window provided, to enable interleave across 2 CXL host bridges. Each host bridge has 2 CXL Root Ports, with the CXL Type3 device directly attached (no switches).:: - qemu-system-aarch64 -M virt,gic-version=3,cxl=on -m 4g,maxmem=8G,slots=8 -cpu max \ + qemu-system-x86_64 -m 4G,slots=8,maxmem=8G -smp 4 \ + -machine type=q35,accel=kvm,nvdimm=on,cxl=on -enable-kvm \ ... -object memory-backend-file,id=cxl-mem1,share=on,mem-path=/tmp/cxltest.raw,size=256M \ -object memory-backend-file,id=cxl-mem2,share=on,mem-path=/tmp/cxltest2.raw,size=256M \ @@ -339,7 +341,8 @@ the CXL Type3 device directly attached (no switches).:: An example of 4 devices below a switch suitable for 1, 2 or 4 way interleave:: - qemu-system-aarch64 -M virt,gic-version=3,cxl=on -m 4g,maxmem=8G,slots=8 -cpu max \ + qemu-system-x86_64 -m 4G,slots=8,maxmem=8G -smp 4 \ + -machine type=q35,accel=kvm,nvdimm=on,cxl=on -enable-kvm \ ... -object memory-backend-file,id=cxl-mem0,share=on,mem-path=/tmp/cxltest.raw,size=256M \ -object memory-backend-file,id=cxl-mem1,share=on,mem-path=/tmp/cxltest1.raw,size=256M \ -- 2.34.1