On Wed, 16 Aug 2023, 5:57 am Richard Henderson, <
richard.hender...@linaro.org> wrote:
> With ISA v3.0, we can use ADDPCIS instead of BCL+MFLR to load NIP.
>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
> ---
> tcg/ppc/tcg-target.c.inc | 25 ++++++++++++++++++++++---
> 1 file changed, 22 insertions(+), 3 deletions(-)
>
> diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
> index 19004fa568..36b4f61236 100644
> --- a/tcg/ppc/tcg-target.c.inc
> +++ b/tcg/ppc/tcg-target.c.inc
> @@ -362,6 +362,7 @@ static bool tcg_target_const_match(int64_t val,
> TCGType type, int ct)
> #define CRNAND XO19(225)
> #define CROR XO19(449)
> #define CRNOR XO19( 33)
> +#define ADDPCIS XO19( 2)
>
> #define EXTSB XO31(954)
> #define EXTSH XO31(922)
> @@ -854,6 +855,19 @@ static inline void tcg_out_sari64(TCGContext *s,
> TCGReg dst, TCGReg src, int c)
> tcg_out32(s, SRADI | RA(dst) | RS(src) | SH(c & 0x1f) | ((c >> 4) &
> 2));
> }
>
> +static void tcg_out_addpcis(TCGContext *s, TCGReg dst, intptr_t imm)
> +{
> + int d0, d1, d2;
> +
> + tcg_debug_assert((imm & 0xffff) == 0);
> + tcg_debug_assert(imm == (int32_t)imm);
> +
>
I think you need imm >>= 16 here.
Without that the next patch in the series crashes.
+ d2 = imm & 1;
> + d1 = (imm >> 1) & 0x1f;
> + d0 = (imm >> 6) & 0x3ff;
> + tcg_out32(s, ADDPCIS | RT(dst) | (d1 << 16) | (d0 << 6) | d2);
> +}
> +
> static void tcg_out_bswap16(TCGContext *s, TCGReg dst, TCGReg src, int
> flags)
> {
> TCGReg tmp = dst == src ? TCG_REG_R0 : dst;
> @@ -2489,9 +2503,14 @@ static void tcg_out_tb_start(TCGContext *s)
> {
> /* Load TCG_REG_TB. */
> if (USE_REG_TB) {
> - /* bcl 20,31,$+4 (preferred form for getting nia) */
> - tcg_out32(s, BC | BO_ALWAYS | BI(7, CR_SO) | 0x4 | LK);
> - tcg_out32(s, MFSPR | RT(TCG_REG_TB) | LR);
> + if (have_isa_3_00) {
> + /* lnia REG_TB */
> + tcg_out_addpcis(s, TCG_REG_TB, 0);
> + } else {
> + /* bcl 20,31,$+4 (preferred form for getting nia) */
> + tcg_out32(s, BC | BO_ALWAYS | BI(7, CR_SO) | 0x4 | LK);
> + tcg_out32(s, MFSPR | RT(TCG_REG_TB) | LR);
> + }
> }
> }
>
> --
> 2.34.1
>
>
