Hi, Jonathan On 2023-09-05 22:34, jonathan.cameron wrote: > > As I understand it the distinction is more about the format / contents of > that memory > than how you access them.
Yes, RCH DP RCRB includes registers from PCIe Type 1 Config Header and PCIe capabilities and extended capabilities while CHBCR includes component registers with the same layout and discovery mechanism in other CXL components. > As an aside, they are described by a static ACPI table, > so they can't be in the MMIO space used for BARs etc. > In CXL 3.0 Spec, the Figure 9-14 (CXL Link/Protocol Register Mapping in a CXL VH) shows that CHBCR is mapped by "Host Proprietary Static Bar". According to your guidance, it is not a standard PCIe BAR using PCIe MMIO Space, so I understand it is a special BAR for MMIO of a platform device? Many thanks Yuquan
