Wolfgang Lenerz wrote: > Are you aware of this: > http://web.archive.org/web/20080507162255/http://gwenole.beauchesne.info/en/projects/68ktester
Thank you. I don't know about this one in particular, but the emulator verification approaches usually do not compare data and addresses on the bus, which is the natural way to verify a hardware core. (Either in simulation or even electrically) Actually at least one of the free 68K cores was verfified by electrical comparison to a real 68000 on the external busses. (Unfortunately with Amiga software). Looking back, it would have saved me time to take the same road. But one needs a separate board design only for the purpose of debugging. And when I started, I had no idea how much debugging would come up. I do have help from Daniele, who has a clever verification approach. And Richard can emulate something very close to a Q68 under UQXL. Both is very helpful but it remains time consuming work. There are other QL tasks I must do first and even those are not done for weeks. Peter _______________________________________________ QL-Users Mailing List http://www.q-v-d.demon.co.uk/smsqe.htm
