Around 14 o'clock on Aug 26, Juliusz Chroboczek wrote:
> What happens to cached memory? Is it possible to map the same memory > multiple times with different memory types? The MTRRs take physical addresses, and I believe the result of creating MTRRs with overlapping ranges is to use the most conservative access mode. What I don't know is if we could set the frame buffer to write-back and add suitable cache flush instructions when switching from accelerated to unaccelerated rendering. The trick is to make sure that any memory modifyied by the accelerator is flushed from the processor cache. Given the expected use of software for much of the Render extension, it might be interesting to investigate this possibility. Keith Packard XFree86 Core Team HP Cambridge Research Lab _______________________________________________ Render mailing list [EMAIL PROTECTED] http://XFree86.Org/mailman/listinfo/render
