On 3/06/2016 18:34, Lukas Jünger wrote:
Hello,
I have been trying for a long time to generate a bootable device tree for my
fpga hardware on my DE0-nano-SoC. However, anyhow I try I fail. I can build a
device tree without problems using make dtbs, but of course that doesn't
include my custom fpga hardware. I made a very simple design now just with a
timer that
should generate an interrupt but it doesn't work. When i follow the
instructions and use sopc2dts my 4.1ltsi-rt kernel just hangs after unzipping.
I tried
different kernel versions, I tried to use earlyprintk to debug. I get some
errors with sopc2dts though. I use the one form altera-opensource github
repository
like this:
java -jar /home/lukas/sopc2dts/sopc2dts.jar -v --input receiver.sopcinfo
--output socfpga.dts --type dts --board
atlas-soc-ghrd/board_info/board_info_ATLAS_SOC_GHRD.xml --board
atlas-soc-ghrd/board_info/hps_common_board_info.xml --bridge-removal all
--clocks
alias ethernet0 /sopc/ethernet@0xff702000
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
Try to eliminate hps_bridge_avalon: hps_0_bridges_f2h
Component generic_timer_0 of class generic_timer is unknown
Component generic_timer_0 of class generic_timer is unknown
dts memory section: No memory nodes specified. Blindly adding them all
When I compare the device tree generated to the one coming from the kernel git,
it uses different syntax and layout, so no surprise that it doesn't work.
What am I doing wrong? Is there a tutorial on how to just get a basic design
working with interrupts in the linux kernel?
G'day Lukas,
You're not doing anything wrong.
The device tree from the sopc2dts doesn't work.
What I've done is setup scripts to:
- Use sopc2dts to generate dts.
- Process it thru a script to strip out everything other than the fpga stuff
converting it to a dtsi.
- Modified the kernel dts and then use it and the sopc2dts to to create a
usuable dtb.
I found the altera tools package with the quartus install lag too far behind
the kernel development to give you something that boots.
The dts from the kernel source is generally more correct than the sopc2dts one.
However depending on you platform you may have different
periphals enabled.
Also don't forget that the spl / uboot need to be updated if you change HPS pin
muxes.
This includes fpga bridges etc.
Also does the generic timer you add have the necessary _hw.tcl code to add
entries into the dts?
--
Regards
Phil Reid
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