Walter Goossens <waltergoossens@...> writes:

> Hi all,
> 
> could you elaborate a bit on what you're missing?
> I haven't focused much on sopc2dts and the latest kernels lately so I'm
> not entirely up to speed I'm afraid.
> When you give me some concrete examples, I might be able to decrease the
> size of your xml files ;)
> 
> Walter

Hi all,

I managed to create an overlay for a design with a timer, using kernel
4.1-ltsi-rt from linux-socfpga, on a DE0 SoC board
To achieve this:
- Use sopc2dts with --pov hps_0_bridges to create an initial version for a
.dtso file
- Using an overlay_info.xml in which the interrupt-parent is replaced by
<&intc> 
- Feeding this .dtso through a python script (using pyfdt.pyfdt) to wrap the
sopc2dts output with the fragment@0 and __overlay__ sections. Here also the
ranges; part (collected from the complete .dtb) is filled-in as well as the
firmware (bitfile) name. 

The kernel driver was created with platform support (obviously). However to
obtain fixed-clock resources I also needed the "Generic driver for fixed
rate clock" which Stefan Kristiansson posted somewhere in 2013. This
actually is a candidate to be merged into linux-socfpga. To use this clock
resource I also DTAppended a fixed-clock generator in overlay_info.xml

Then, when loading the device tree overlay, the required modules are loaded
and interrupts are functioning using the avalon-timer. I just managed to get
this operational today so it may not be very stable yet. It will take some
time to provide a proper example.


Getting a complete .dbt from sopc2dts is something I haven't really tried. I
would suggest, as others already did, to use the kernel provided .dts which
fits better especially with linux 4-series.


Best regards,
Jos


> 
> On 06/06/2016 03:22 PM, Lowell Gilbert wrote:
> > Phil Reid <preid@...> writes:
> >
> >> On 3/06/2016 18:34, Lukas Jünger wrote:
> >>> Hello,
> >>>
> >>> I have been trying for a long time to generate a bootable device
> >>> tree for my fpga hardware on my DE0-nano-SoC. However, anyhow I try
> >>> I fail. I can build a
> >>> device tree without problems using make dtbs, but of course that
> >>> doesn't include my custom fpga hardware. I made a very simple design
> >>> now just with a timer that
> >>> should generate an interrupt but it doesn't work. When i follow the
> >>> instructions and use sopc2dts my 4.1ltsi-rt kernel just hangs after
> >>> unzipping. I tried
> >>> different kernel versions, I tried to use earlyprintk to debug. I
> >>> get some errors with sopc2dts though. I use the one form
> >>> altera-opensource github repository
> >>> like this:
> >>>
> >>> java -jar /home/lukas/sopc2dts/sopc2dts.jar -v --input
receiver.sopcinfo --output socfpga.dts
> --type dts --board
> >>> atlas-soc-ghrd/board_info/board_info_ATLAS_SOC_GHRD.xml --board
> >>> atlas-soc-ghrd/board_info/hps_common_board_info.xml --bridge-removal
> >>> all --clocks
> >>> alias ethernet0 /sopc/ethernet <at> 0xff702000
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Try to eliminate hps_bridge_avalon: hps_0_bridges_f2h
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> Component generic_timer_0 of class generic_timer is unknown
> >>> dts memory section: No memory nodes specified. Blindly adding them all
> >>>
> >>> When I compare the device tree generated to the one coming from the
> >>> kernel git, it uses different syntax and layout, so no surprise that
> >>> it doesn't work.
> >>> What am I doing wrong? Is there a tutorial on how to just get a
> >>> basic design working with interrupts in the linux kernel?
> >>>
> >> G'day Lukas,
> >>
> >> You're not doing anything wrong.
> >> The device tree from the sopc2dts doesn't work.
> >> What I've done is setup scripts to:
> >> - Use sopc2dts to generate dts.
> >> - Process it thru a script to strip out everything other than the fpga
stuff converting it to a dtsi.
> >> - Modified the kernel dts and then use it and the sopc2dts to to create
a usuable dtb.
> >>
> >> I found the altera tools package with the quartus install lag too far
> >> behind the kernel development to give you something that boots.
> >> The dts from the kernel source is generally more correct than the
> >> sopc2dts one. However depending on you platform you may have different
> >> periphals enabled.
> > It's not really that sopc2dts doesn't work, it's just that they need
> > more entries for more recent kernels. I'm up to nearly a thousand lines
> > in my XML files.
> >
> >> Also don't forget that the spl / uboot need to be updated if you change
HPS pin muxes.
> >> This includes fpga bridges etc.
> >>
> >>
> >> Also does the generic timer you add have the necessary _hw.tcl code to
add entries into the dts?
> > It's easier to check this in the dts file than the tcl file, but adds up
> > to the same thing.
> > _______________________________________________
> > Rfi mailing list
> > Rfi@...
> > http://lists.rocketboards.org/cgi-bin/mailman/listinfo/rfi
> >
> 


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