Hi Walter, I found your patch from last year and gave it try recently. It is not creating the overlay quite like my working overlays. It seems to splitting the hps_bridges interfaces, but I have not dug too deeply into it. I made a quick hack to support generating a target-path with string rather than target entry with a phandle. No symbols section is needed with target-path as well.
Matthew Gerlach On Thu, 9 Jun 2016, Walter Goossens wrote: > Hi Matthew, > > On 06/08/2016 11:56 PM, mgerlach wrote: > > Hi Everyone, > > > > This discussion of creating device trees especially in the context of > > upgrading linux is extremely relevant. I have experienced my fair of pain > > debugging device trees during kernel upgrades, and this pain is a frequent > > topic > > at the various Linux conferences. It is safe to say, this problem is not > > unique to SOCFGPAs, but the FPGA can make the pain more acute. > > > > As some background, sopc2dts is an Open Source tool that can help make > > device > > trees based on a FPGA designs described in a "sopcinfo" file produced by > > Altera design tools. Sopc2dts predates SOCFPGAs and was created by > > Walter Goossen originally for Linux running on Nios-II. Sopc2dts can > > also be used to make device trees for SOCFPGAs, but as many folks have > > pointed out, the output of sopc2dts does not always produce suitable > > device > > trees for every version of the Linux kernel. > > > > The SoC Embedded Development Suite (SoCEDS) includes a snapshot of > > sopc2dts and > > a set of "board info" files that can be used to create device trees for > > the > > the reference designs using the kernel version shipped with that version > > of SoCEDS. Version 16.0 of SoCEDS shipped with linux-3.10-ltsi. > > > > When upgrading kernels, the process people have described by taking the > > base > > device tree found in the kernel version's source tree and merging it with > > the FPGA portion of the output to Sopc2dts is a perfectly reasonable work > > flow. Interestingly, this work flow has similarities to using dynamic > > device tree overlays in the boot flow. > > > > With dynamic device tree overlays, Linux could boot using the minimum > > device > > tree to get to user space. Once in user space, one or more overlays could > > be > > applied to the live device tree in order to enable more components on the > > SoC, > > program the FPGA, and instantiate necessary drivers for components in the > > FPGA. > > I think such a boot flow would be easier to debug and provide substantial > > flexibility to manage the overall boot flow. I would like to hear what > > other folks think about using dynamic device tree overlays. > > I also think overlays are the way to go. I actually posted a patch to > sopc2dts a year ago with initial support for this. I currently have no > active projects in which I can easily try this, but if you or anyone > else has the time to look at it that would be awesome. > I'll attach the patch to this mail as well. I haven't tested it but it > still applies and nothing much has changed in the last year so I think > we should be good. > Let me know what you think! > > Walter > > > Matthew Gerlach > > > > _______________________________________________ Rfi mailing list [email protected] http://lists.rocketboards.org/cgi-bin/mailman/listinfo/rfi
