Hi Am Donnerstag, 28. Juli 2016, 14:11:45 schrieb Andrea Galbusera: > Hi all, > > On Tue, Jul 26, 2016 at 12:49 PM, Phil Reid <pr...@electromag.com.au> wrote: > > On 26/07/2016 18:22, Teoh Choon Zone wrote: > >> Hi all, > >> > >> Finally I have everything working (kernel 4.1.22-ltsi, overlay, LW > >> bridge, > >> H2F bridge etc). I write out my steps to save others precious time: > >> > >> 1. Nothing needs to be changed in socfpga.dtsi, socfpga_cyclone5.dtsi. > >> Craft your own dts and overlay. I attached them for your reference. To > >> compile the > >> > >> overlay, at your kernel root directory: > >> ./scripts/dtc/dtc -I dts -O dtb -b 0 -@ -o socfpga_overlay.dtbo > >> > >> socfpga_overlay.dts > >> > >> 3. Put the compiled dtbo and rbf in the /lib/firmware of your root > >> filesystem. > >> > >> 4. To load the rbf: > >> mount -t configfs configfs /config > >> mkdir /config/device-tree/overlays/socwks > >> cd /lib/firmware > >> echo socfpga_overlay.dtbo > /config/device-tree/overlays/socwks/path > >> > >> If everything okay, you should see this line of message in dmesg: > >> fpga_manager fpga0: writing cyclonev_bw.rbf to Altera SOCFPGA FPGA > >> > >> Manager > >> > >> 5. This is the most important step which I never found it anywhere on the > >> > >> internet or handbook, install devmem2 and run: > >> devmem2 0xff800000 w 0x18 > > > > It looks like the fpga bridge driver is writing to the register. > > See _alt_hps2fpga_enable_set & alt_fpga_bridge_probe. > > This is true, indeed. If you use a tree like socfpga-4.1.22-ltsi from > altera-opensource/linux-socfpga on github, the altera-hps2fpga bridge > driver is supposed to manage setting L3 visibility reg accordingly. > However, the implementation is not correct in the sense that one > private structure caching the value of l3_remap exists for each > instance of a bridge device. This cache should be global to the driver > instead. For more detail, see [1], where patch proposal for > upstreaming is being discussed. > > [1] https://lkml.org/lkml/2016/2/5/606 Thanks for that link also if it has been a little late for me after wasting much to much time on this issue. However i have a stopgap solution which while not beeing correct at least leaves the hardware in a correct state if you plan to enable both bridges at once.
>From 3a33f8440a1a4002c1e56f0d31afb3b090f549e6 Mon Sep 17 00:00:00 2001 Hottinger Baldwin Messtechnik GmbH, Im Tiefen See 45, 64293 Darmstadt, Germany | www.hbm.com Registered as GmbH (German limited liability corporation) in the commercial register at the local court of Darmstadt, HRB 1147 Company domiciled in Darmstadt | Managing Director: Andreas Huellhorst | Chairman of the board: Eoghan O'Lionaird Als Gesellschaft mit beschraenkter Haftung eingetragen im Handelsregister des Amtsgerichts Darmstadt unter HRB 1147 Sitz der Gesellschaft: Darmstadt | Geschaeftsfuehrung: Andreas Huellhorst | Aufsichtsratsvorsitzender: Eoghan O'Lionaird The information in this email is confidential. It is intended solely for the addressee. If you are not the intended recipient, please let me know and delete this email. Die in dieser E-Mail enthaltene Information ist vertraulich und lediglich fuer den Empfaenger bestimmt. Sollten Sie nicht der eigentliche Empfaenger sein, informieren Sie mich bitte kurz und loeschen diese E-Mail. From: Tim Sander <tim.san...@hbm.com> Date: Thu, 28 Jul 2016 14:40:16 +0200 Subject: [PATCH] hack: socfpga: unconditionally always enable both bridges --- drivers/fpga/altera-hps2fpga.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/fpga/altera-hps2fpga.c b/drivers/fpga/altera-hps2fpga.c index c15df47336f2..032a240ecc3e 100644 --- a/drivers/fpga/altera-hps2fpga.c +++ b/drivers/fpga/altera-hps2fpga.c @@ -37,8 +37,8 @@ #define ALT_L3_REMAP_OFST 0x0 #define ALT_L3_REMAP_MPUZERO_MSK 0x00000001 -#define ALT_L3_REMAP_H2F_MSK 0x00000008 -#define ALT_L3_REMAP_LWH2F_MSK 0x00000010 +#define ALT_L3_REMAP_H2F_MSK 0x00000018 +#define ALT_L3_REMAP_LWH2F_MSK 0x00000018 #define HPS2FPGA_BRIDGE_NAME "hps2fpga" #define LWHPS2FPGA_BRIDGE_NAME "lwhps2fpga" -- 1.9.1 _______________________________________________ Rfi mailing list Rfi@lists.rocketboards.org http://lists.rocketboards.org/cgi-bin/mailman/listinfo/rfi
