On 25/07/2016 14:10, Teoh Choon Zone wrote:
On Mon, Jul 25, 2016 at 8:43 AM, Phil Reid <pr...@electromag.com.au <mailto:pr...@electromag.com.au>> wrote:G'day Tim, On 22/07/2016 23:09, Tim Sander wrote: Hi Phil Am Freitag, 22. Juli 2016, 16:52:25 schrieb Phil Reid: G'da Teoh, On 22/07/2016 15:09, Teoh Choon Zone wrote: Hi Tim, Just some update, so my problem currently narrows down to HPS could not access FPGA via H2Fbridge. The LWH2Fbridge is now working as I could see the interrupt from FPGA. Same here. I could access my FPGA register exposed via H2Fbridge in kernel 3.10-ltsi but not in 4.1-ltsi. It's tested using mmap in kernel 3.10-ltsi. I suspect is the h2fbridge driver is not mature yet or there are some error in our DTS content. Anyone has idea? Is your boot loader setting things up correctly? Default behaviour of the kernel bridge driver is to leave the bridges alone. So you need to build a custom bootloader for you hps config. Well what do you mean by correctly. I have tested that i can load fpgas and access all registers from the bootloader. So its verified that the fpga is working. Sorry missed that everything was working fro the bootloader. I've caught myself out a couple of time that I've enabled additional HPS interfaces and forgotten to flash the new preloader that's actually responsible for for setting up the HPS pinouts and bridges. Provided you can access the fpga registers from uboot the kernel shouldn't be doing anything to change that by default. I didn't change the FPGA design when I upgrade to kernel 4.1-ltsi, so I don't think it is relevant here. See this from bridge binding docs: Optional properties: - bridge-enable : 0 if driver should disable bridge at startup. 1 if driver should enable bridge at startup. Default is to leave bridge in its current state. I'm running linux-stable 4.7-rc7 with altera patches relevant to my system applied from the latest branch. I have no idea what previous version do. I think the problem is that i am not able to access the hardware registers of the bridge controller with all kernels larger than 4.0 (aka device tree overlay support). The command is "devmem 0xFF401FD0" and should read the value "4" but fails in my case. This is not a FPGA register but a hardware register! So before booting the kernel i can access everything then with linux 4.[1,4,6] bootet all accesses to the bridge registers fail. Do you get and error message from devmem? What does the reset register 0xFFD0501C have? Interestingly, I managed to get '4' when I execute 'devmem2 0xFF401FD0' root@linaro-developer:~/test# devmem2 0xFF401FD0 /dev/mem opened. Memory mapped at address 0xb6f33000. Value at address 0xFF401FD0 (0xb6f33fd0): 0x4 But when I execute 'devmem2 0xC000000D'. It should return me the FPGA version that I embed, but instead I get: /dev/mem opened. [ 421.257710] Unhandled fault: external abort on non-linefetch (0x018) at 0xb6ff900d Memory mapped at address 0xb6ff9000. [ 421.266712] pgd = cc4dc000 [ 421.272684] [b6ff900d] *pgd=0dbbc831, *pte=c0000703, *ppte=c0000e33 [ 421.278964] Internal error: : 18 [#2] SMP ARM [ 421.283301] Modules linked in: bonding [ 421.287064] CPU: 1 PID: 1523 Comm: devmem2 Tainted: G D 4.1.22-ltsi #9 [ 421.294685] Hardware name: Altera SOCFPGA [ 421.298679] task: cdaa7440 ti: ce17a000 task.ti: ce17a000 [ 421.304063] PC is at do_alignment_ldrstr+0x50/0x110 [ 421.308920] LR is at 0x2 [ 421.311446] pc : [<c0021650>] lr : [<00000002>] psr: 000f0113 [ 421.311446] sp : ce17be10 ip : 00000007 fp : ce17be24 [ 421.322870] r10: 00000002 r9 : 0000871a r8 : 00000011 [ 421.328071] r7 : b6ff900d r6 : c086f7c4 r5 : ce17bfb0 r4 : 0000000d [ 421.334569] r3 : 00000000 r2 : ce17bfb0 r1 : 00100000 r0 : b6ff900d [ 421.341067] Flags: nzcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user [ 421.348169] Control: 10c5387d Table: 0c4dc04a DAC: 00000015 [ 421.353889] Process devmem2 (pid: 1523, stack limit = 0xce17a218) [ 421.359954] Stack: (0xce17be10 to 0xce17c000) [ 421.364294] be00: 0000000d ce17bfb0 ce17befc ce17be28 [ 421.372436] be20: c0021ce0 c002160c 200f0013 00000001 00000001 00000004 cd8a3180 00000000 [ 421.380578] be40: 00000001 ce17a000 5967e830 e7947005 00000004 00000000 cdaa7440 ce2a9600 [ 421.388722] be60: ce2a9600 b6ffa025 00000025 ce17a000 ce17be94 c03390ac ce17be94 ce17be88 [ 421.396864] be80: c03390ac c033b71c ce17bed4 ce17be98 c033123c c0339098 ce17befc 00000025 [ 421.405007] bea0: cd8d7240 00000025 c086f8d8 cd8a3180 c03310f8 00000025 ce17bf78 b6ffa000 [ 421.413150] bec0: 00000025 c016212c ce17bf44 ce17bed8 c016212c c080b36c 00000011 c0021b4c [ 421.421293] bee0: b6ff900d ce17bfb0 c000000d 00000003 ce17bfac ce17bf00 c0009258 c0021b58 [ 421.429436] bf00: be8b8584 cd9c45e8 00000002 00000002 00000000 00000000 00001000 cd8a3180 [ 421.437578] bf20: 00000025 cd9c45e8 cd8a3188 00000002 00000025 00000000 ce17bf74 ce17bf48 [ 421.445721] bf40: c0123e6c c0161ed0 00000000 00000000 ce17bf74 cd8a3180 cd8a3180 00000000 [ 421.453863] bf60: 00000000 b6ffa000 ce17bfa4 ce17bf78 c012464c c0123d3c 00000000 00000000 [ 421.462006] bf80: 00000025 b6ffa000 b6fdab58 0000871a 600f0030 ffffffff 10c5387d 10c5387d [ 421.470148] bfa0: 00000000 ce17bfb0 c00148e0 c000921c 00000000 00000000 00000001 b6ff900d [ 421.478291] bfc0: b6ff9000 0000000d 0001105c 00000077 00000002 c000000d 00000003 be8b8874 [ 421.486434] bfe0: 0001100c be8b86e0 b6f40021 0000871c 600f0030 ffffffff 31b7dfff 3716577f [ 421.494586] [<c0021650>] (do_alignment_ldrstr) from [<c0021ce0>] (do_alignment+0x194/0x7c0) [ 421.502906] [<c0021ce0>] (do_alignment) from [<c0009258>] (do_DataAbort+0x48/0xc8) [ 421.510448] [<c0009258>] (do_DataAbort) from [<c00148e0>] (__dabt_usr+0x40/0x60) [ 421.517809] Exception stack(0xce17bfb0 to 0xce17bff8) [ 421.522840] bfa0: 00000000 00000000 00000001 b6ff900d [ 421.530983] bfc0: b6ff9000 0000000d 0001105c 00000077 00000002 c000000d 00000003 be8b8874 [ 421.539125] bfe0: 0001100c be8b86e0 b6f40021 0000871c 600f0030 ffffffff [ 421.545713] Code: 1a00000f e2111601 0a000018 e3a03000 (e4f01001) [ 421.551780] ---[ end trace ed27bb08d1573ef3 ]--- Segmentation fault Is it relevant to this issue?
Whats in brgmodrst (0xFFD0501C)? 0xFF401FD0 is the lw hps2fpga bridge. 0xC000000D looks a bit odd for lw hps2fpga bridge devices. That should be for the high speed hps2fpga bridge. lw hps2fpga is at base 0xFF200000 -- Regards Phil Reid ElectroMagnetic Imaging Technology Pty Ltd Development of Geophysical Instrumentation & Software www.electromag.com.au 3 The Avenue, Midland WA 6056, AUSTRALIA Ph: +61 8 9250 8100 Fax: +61 8 9250 7100 Email: pr...@electromag.com.au _______________________________________________ Rfi mailing list Rfi@lists.rocketboards.org http://lists.rocketboards.org/cgi-bin/mailman/listinfo/rfi
