Patently nonsense. Packet reassembly in hardware is very much
straightforward if one is willing to burn large buffers to do so.
Imagine
The willing part is the impossible part.
taking an implemention in C and simply converting it to Verilog.
Not at all
out of the question.
It certainly is.
In fact, a subset of this problem has been solved for a very long
time.
Remember ATM? Remember a SAR chip? That's reassembly of fixed size
packet
fragments.
Having fixed size per standard makes it much simpler. Don't have that
for IP.
Dino
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