Hi, *Roll: DFx Design Lead*
*Location: Hudson, MA* *Full Time* *JD:* Good understanding of DFX Interact with DFx Architects, Specifcations for DFx Gather DFx requirements and Undersand DFx requirement Own DFx integration for multiple sub-systems Good understanding of SCAN, ATPG, JTAG methodology Plan, own and deliver DFx features for multiple sub-systems Experience in Intel 10/14 nm DFx flow is highly desirable Integrate DFx IP blocks at the sub-system level Disposition DFx issues reported by sub-system team, Physical design team etc, *Abhishek Verma* *Email : [email protected] <[email protected]>* -- You received this message because you are subscribed to "rtc-linux". Membership options at http://groups.google.com/group/rtc-linux . Please read http://groups.google.com/group/rtc-linux/web/checklist before submitting a driver. --- You received this message because you are subscribed to the Google Groups "rtc-linux" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
