Re: [PATCH] lpc24xx/lpc17xx: Probe for ETHERNET PHY MII address

[Sebastian Huber]

Hello Pavel,

On 2014-01-03 14:39, Pavel Pisa wrote:

The default used address 0 is reserved by MII PHY specification
and some PHY do not respond to it. It is possible to use
SCANINC in MCFG register as another alternative.

The DP83848 PHY support is added as well.

Signed-off-by: Pavel Pisa <pp...@pikron.com>
---

  Code requires testing on alredy supported LPC24xx
  and LPC17xx boards equipped by KSZ80X1RNL PHY.


  .../libbsp/arm/shared/lpc/network/lpc-ethernet.c   |   83 +++++++++++++++++---
  1 file changed, 74 insertions(+), 9 deletions(-)

diff --git a/c/src/lib/libbsp/arm/shared/lpc/network/lpc-ethernet.c
b/c/src/lib/libbsp/arm/shared/lpc/network/lpc-ethernet.c
index ca43143..9136860 100644
--- a/c/src/lib/libbsp/arm/shared/lpc/network/lpc-ethernet.c
+++ b/c/src/lib/libbsp/arm/shared/lpc/network/lpc-ethernet.c
@@ -62,8 +62,11 @@
  #endif

  #define DEFAULT_PHY 0
+#define DEFAULT_SELECTED_PHY 0
  #define WATCHDOG_TIMEOUT 5

+static int lpc_eth_selected_phy = DEFAULT_SELECTED_PHY;

does it make sense to add this to the lpc_eth_driver_entry structure?

+
  typedef struct {
    uint32_t start;
    uint32_t control;
@@ -232,6 +235,8 @@ static volatile lpc_eth_controller *const lpc_eth =

  #define ETH_MCFG_CLOCK_SELECT(val) BSP_FLD32(val, 2, 4)

+#define ETH_MCFG_RESETMIIMGMT BSP_BIT32(15)
+
  /* ETH_MCMD */

  #define ETH_MCMD_READ BSP_BIT32(0)
@@ -1089,15 +1094,24 @@ static int lpc_eth_mdio_wait_for_not_busy(void)
      ++i;
    }

+  LPC_ETH_PRINTK("tx: lpc_eth_mdio_wait %s after %d\n",
+                 i != one_second? "succeed": "timeout", i);
+
    return i != one_second ? 0 : ETIMEDOUT;
  }

-static uint32_t lpc_eth_mdio_read_anlpar(void)
+static uint32_t lpc_eth_mdio_read_anlpar(int phy)
  {
-  uint32_t madr = ETH_MADR_REG(MII_ANLPAR) | ETH_MADR_PHY(DEFAULT_PHY);
+  uint32_t madr;
    uint32_t anlpar = 0;
    int eno = 0;

+  if (phy == DEFAULT_PHY)
+    phy = lpc_eth_selected_phy;
+
+  madr = ETH_MADR_REG(MII_ANLPAR) | ETH_MADR_PHY(phy);
+
+
    if (lpc_eth->madr != madr) {
      lpc_eth->madr = madr;
    }
@@ -1128,8 +1142,11 @@ static int lpc_eth_mdio_read(
  {
    int eno = 0;

-  if (phy == -1 || phy == 0) {
-    lpc_eth->madr = ETH_MADR_REG(reg) | ETH_MADR_PHY(DEFAULT_PHY);
+  if (phy == DEFAULT_PHY)
+    phy = lpc_eth_selected_phy;
+
+  if ((phy != -1) && (phy <= 31)) {
+    lpc_eth->madr = ETH_MADR_REG(reg) | ETH_MADR_PHY(phy);
      lpc_eth->mcmd = 0;
      lpc_eth->mcmd = ETH_MCMD_READ;
      eno = lpc_eth_mdio_wait_for_not_busy();
@@ -1153,8 +1170,11 @@ static int lpc_eth_mdio_write(
  {
    int eno = 0;

-  if (phy == -1 || phy == 0) {
-    lpc_eth->madr = ETH_MADR_REG(reg) | ETH_MADR_PHY(DEFAULT_PHY);
+  if (phy == DEFAULT_PHY)
+    phy = lpc_eth_selected_phy;
+
+  if ((phy != -1) || (phy != 0)) {
+    lpc_eth->madr = ETH_MADR_REG(reg) | ETH_MADR_PHY(phy);
      lpc_eth->mwtd = val;
      eno = lpc_eth_mdio_wait_for_not_busy();
    } else {
@@ -1182,6 +1202,7 @@ static int lpc_eth_phy_get_id(uint32_t *id)
  }

  #define PHY_KSZ80X1RNL 0x221550
+#define PHY_DP83848    0x20005c90

  typedef struct {
    unsigned reg;
@@ -1230,9 +1251,41 @@ static const lpc_eth_phy_action 
lpc_eth_phy_up_post_action_KSZ80X1RNL [] = {
    { 0x10, 0x10, 0 }
  };

+#ifdef LPC24XX_PIN_ETHERNET_POWER_DOWN

Is this LPC24XX_PIN_ETHERNET_POWER_DOWN a new BSP option?

[...]


--
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax     : +49 89 189 47 41-09
E-Mail  : sebastian.hu...@embedded-brains.de
PGP     : Public key available on request.

Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
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