--- doc/cpu_supplement/sparc.t | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/doc/cpu_supplement/sparc.t b/doc/cpu_supplement/sparc.t index 320c250..a6862c8 100644 --- a/doc/cpu_supplement/sparc.t +++ b/doc/cpu_supplement/sparc.t @@ -401,6 +401,9 @@ The registers g2 through g4 are reserved for applications. GCC uses them as volatile registers by default. So they are treated like volatile registers in RTEMS as well. +The register g7 is reserved for the operating system and contains the thread +pointer used for thread-local storage (TLS) as mandated by the SPARC ABI. + @subsubsection Floating Point Registers The SPARC V7 architecture includes thirty-two, -- 1.7.7 _______________________________________________ rtems-devel mailing list rtems-devel@rtems.org http://www.rtems.org/mailman/listinfo/rtems-devel
