The exit SPARC system call doesn't have a function entry
point like the others do. This is probably why people use
TA 0x0 instruction directly for shutting down the system.
---
c/src/lib/libcpu/sparc/syscall/syscall.S | 13 +++++++++++++
cpukit/score/cpu/sparc/rtems/score/sparc.h | 25 +++++++++++++++++++++++++
2 files changed, 38 insertions(+), 0 deletions(-)
diff --git a/c/src/lib/libcpu/sparc/syscall/syscall.S
b/c/src/lib/libcpu/sparc/syscall/syscall.S
index 2d53ebe..a0a860c 100644
--- a/c/src/lib/libcpu/sparc/syscall/syscall.S
+++ b/c/src/lib/libcpu/sparc/syscall/syscall.S
@@ -29,6 +29,10 @@
* l1 = pc
* l2 = npc
* g1 = system call id
+ *
+ * System Call 1 (exit):
+ * g2 = additional exit code 1
+ * g3 = additional exit code 2
*/
PUBLIC(syscall)
@@ -70,4 +74,13 @@ SYM(sparc_enable_interrupts):
retl
ta 0
+ PUBLIC(sparc_syscall_exit)
+
+SYM(sparc_syscall_exit):
+
+ mov SYS_exit, %g1
+ mov %o0, %g2 ! Additional exit code 1
+ mov %o1, %g3 ! Additional exit code 2
+ ta 0
+
/* end of file */
diff --git a/cpukit/score/cpu/sparc/rtems/score/sparc.h
b/cpukit/score/cpu/sparc/rtems/score/sparc.h
index 4568300..75f6d96 100644
--- a/cpukit/score/cpu/sparc/rtems/score/sparc.h
+++ b/cpukit/score/cpu/sparc/rtems/score/sparc.h
@@ -266,6 +266,31 @@ uint32_t sparc_disable_interrupts(void);
void sparc_enable_interrupts(uint32_t psr);
/**
+ * @brief SPARC exit through system call 1
+ *
+ * This method is invoked to go into system error halt. The optional
+ * arguments can be given to hypervisor, hardware debugger, simulator or
+ * similar.
+ *
+ * System error mode is entered when taking a trap when traps have been
+ * disabled. What happens when error mode is entered depends on the
motherboard.
+ * In a typical development systems the CPU relingish control to the debugger,
+ * simulator, hypervisor or similar. The following steps are taken:
+ *
+ * 1. Going into system error mode by Software Trap 0
+ * 2. %g1=1 (syscall 1 - Exit)
+ * 3. %g2=Primary exit code
+ * 4. %g3=Secondary exit code. Dependends on %g2 exit type.
+ *
+ * This function never returns.
+ *
+ * @param[in] exitcode1 Primary exit code stored in CPU g2 register after exit
+ * @param[in] exitcode2 Primary exit code stored in CPU g3 register after exit
+ */
+void sparc_syscall_exit(uint32_t exitcode1, uint32_t exitcode2)
+ RTEMS_COMPILER_NO_RETURN_ATTRIBUTE;
+
+/**
* @brief SPARC flash processor interrupts.
*
* This method is invoked to temporarily enable all maskable interrupts.
--
1.7.0.4
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