Re: [PATCH 1/2] SPARC: syscall code clean-up and minor optimizations

[Daniel Hellstrom]

Aah, I realized now that I forgot to incorporate the feedback from 
Daniel Cederman. I will post an additional fix for the PSR 3 instruction 
delay this weekend.

Daniel

On 05/23/2014 04:14 PM, Joel Sherrill wrote:
Both of these are committed.

Thanks.
On 5/23/2014 9:01 AM, Joel Sherrill wrote:
This looks OK as best I can tell.
On 5/23/2014 8:52 AM, Daniel Hellstrom wrote:
---
  c/src/lib/libcpu/sparc/syscall/syscall.S |   27 +++++++++++----------------
  1 files changed, 11 insertions(+), 16 deletions(-)

diff --git a/c/src/lib/libcpu/sparc/syscall/syscall.S 
b/c/src/lib/libcpu/sparc/syscall/syscall.S
index aa69f45..2d53ebe 100644
--- a/c/src/lib/libcpu/sparc/syscall/syscall.S
+++ b/c/src/lib/libcpu/sparc/syscall/syscall.S
@@ -37,42 +37,37 @@ SYM(syscall):

        subcc   %g1, 2, %g0             ! syscall 2, disable interrupts
        bne     3f
+        subcc   %g1, 3, %g0            ! syscall 3, enable interrupts
        or      %l0, 0x0f00, %l4        ! set PIL=15
-       mov     %l4, %psr
-       or      %l0, SPARC_PSR_ET_MASK, %i0     ! return old psr with ET=1
-       ba,a    9f
+       ba      9f
+        or     %l0, SPARC_PSR_ET_MASK, %i0     ! return old psr with ET=1
  3:
-       subcc   %g1, 3, %g0             ! syscall 3, enable interrupts
        bne     1f
-       and     %i0, SPARC_PSR_PIL_MASK, %l4
+        and    %i0, SPARC_PSR_PIL_MASK, %l4
        andn    %l0, SPARC_PSR_PIL_MASK, %l5
        or      %l5, %l4, %l4
-       mov     %l4, %psr
-       ba,a    9f
-
-1:
-       ta      0                       ! halt
  9:                                    ! leave
+       mov     %l4, %psr               ! Update PSR according to Syscall 2 or 3
        mov     0, %g1                  ! clear %g1
-        jmpl    %l2, %g0
-        rett    %l2 + 4
+       jmpl    %l2, %g0
+        rett    %l2 + 4
+1:
+       ta      0                       ! syscall 1 (not 2 or 3), halt

          PUBLIC(sparc_disable_interrupts)

  SYM(sparc_disable_interrupts):

        mov     SYS_irqdis, %g1
-       ta      0
        retl
-       nop
+        ta     0

          PUBLIC(sparc_enable_interrupts)

  SYM(sparc_enable_interrupts):

        mov     SYS_irqen, %g1
-       ta      0
        retl
-       nop
+        ta     0

  /* end of file */
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