Earlier in this group someone discussed "dynamically" programming an FPGA to
achive a "hardware router" under software controll. I am currently working
with Xilinx Spartan series FPGA's that are under control of a RTLinux
application. Does anyone know how to encode (pack bits) of the spartan CLB's.
I assume you can take a working bitstream for a device, and alter a small
portion of it to change one CLB's function (including updating the bit checks
and CRC's.
Thanks
Kirk Smith
[EMAIL PROTECTED]
--- [rtl] ---
To unsubscribe:
echo "unsubscribe rtl" | mail [EMAIL PROTECTED] OR
echo "unsubscribe rtl <Your_email>" | mail [EMAIL PROTECTED]
----
For more information on Real-Time Linux see:
http://www.rtlinux.org/~rtlinux/
