> 
> > Ummm... if I remember rightly, on Sam jp is actually the same number of
> > clock cycles as jr, as everything works in multiples of 4 cycles. I think
> > it was Stefan Drysen (sorry, don't know if that's spelt right) that
> > worked out this one, it's something to do with the ASIC timings.
> 
> Excellent! I'd nearly worked it out, but hadn't resolved it to that much
> detail... btw: that 4 tstate timing is synched to the horiz. and vertical
> flybacks :)

Eh...you must be joking? Surely jr/jp are not affected by the
ASIC internal timing-quirks?

>  
> > Get a Sam, Ian. You really would be a great bonus to Entropy :) :)
> 
> Si
> 


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