> Actually, I'm kind of worried about the UltraRisc chip he's come up with > -- after all, how RISC is RISC? I mean, subtract and branch on result is > as RISC as you can get, (well, add a store command to move data to/from > memory and you're set). >
Hmmm... Chuck Moore (inventor of FORTH) has come up with a number of chips which have about 20 or so instructions, and he calls them MISC (Minimal ISC) chips. His first had a full cpu and a video generator in a 40-pin package, with just 7,000 transistors! I think it ran at 100 MIPS. A newer version, the i21 is used in an iTV web browser - so it must be quite powerful. > Oh, and it has an 8-bit wide bus. Hope he's come up with some way of > putting the memory and the CPU on the same ASIC die. > But if the instructions are 4bits wide, then that's two instructions per fetch. And with a decent on-chip cache, it may not be a problem. I guess fewer bits means fewer pins, simpler pcb, and less power requirements. I have to say, the idea of an 8-bit bus doesn't worry me ---- I think it's quite exciting! Can you imagine an 8-bitter that competes with a Pentium?!! Andy
