Hi,
We have the following needs for *System Engineers (Verification and Validation Engineers)* in TX. Please find if you are comfortable with the given Job description and send me your Updated Resume along with your expected rate for this project ASAP System Verification Engineers Needed Location: Austin, TX *Duration: 6 months* *2 Positions for Verification Engineers: * ASIC / FPGA Verification using OVM or VMM. Extensive Hands-on experience in System Verilog and Verilog. Verification experience in PCIe, HDMI, HD-SDI, Image Processing Pipeline, DDR3C, H.264, XAUI, J2K Decoder etc. logic block is preferrable. Cadence NC-Sim tool exposure is highly desirable. Regards...!! *Prabhu Vedhanayagam* Phone: 925-353-3769 | [email protected] Web Site: www.tridentconsultinginc.com LinkedIn URL: http://www.linkedin.com/in/prabhu020884 (Note: We respect your Online Privacy. This is not an unsolicitedmail. This mail cannot be considered Spam as long as we include Contact information and a method to be removed from our mailing list. If you are not interested in receiving our e-mails then please reply with a "REMOVE" in the subject line. Sorry for any inconvenience caused.) -- *************************************************************************************** For all SAP related tutorials,Articles,Faqs,Tips www.sapbrainsonline.com **************************************************************************************** You received this message because you are subscribed to the Google Groups "sapbrains" group. To post to this group, send email to [email protected] To unsubscribe from this group, send email to [email protected] For more options, visit this group at http://groups.google.com/group/sapbrains?hl=en
