Hello,
those instructions is a workaround for a bug in the stm8 causing a
DIV/DIVW instruction to return a false result (in the interrupted program).
/Ake
On 2018-01-24 01:58, Richard Hodges wrote:
Hello again!
There is something odd in the emitted assembly code for my ISR. Note that the
first two
instructions are "clr a" followed by "div x,a". This makes no sense to me.
void tim2c_isr(void) __interrupt (14)
{
*(volatile char *)(0x5304) = 0;
__asm
__endasm;
}
sdcc -mstm8 -c x1.c
000000 44 _tim2c_isr:
000000 4F [ 1] 45 clr a
000001 62 [ 2] 46 div x, a
47 ; x1.c: 4: *(volatile char *)(0x5304)
= 0;
000002 35 00 53 04 [ 1] 48 mov 0x5304+0, #0x00
49 ; x1.c: 6: __endasm;
000006 80 [11] 50 iret
These two instructions go away if there is no inline assembly.
Any ideas?
Thanks,
-Richard
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