[PATCH] D134678: [Clang][AArch64][SME] Add intrinsics for ZA array load/store (LDR/STR)
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGf225898a7c61: [Clang][AArch64][SME] Add intrinsics for ZA array load/store (LDR/STR) (authored by bryanpkc). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D134678/new/ https://reviews.llvm.org/D134678 Files: clang/include/clang/Basic/arm_sme.td clang/lib/CodeGen/CGBuiltin.cpp clang/lib/CodeGen/CodeGenFunction.h clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp Index: clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp === --- clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp +++ clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp @@ -174,6 +174,11 @@ // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} SVE_ACLE_FUNC(svst1_ver_vnum_za8,,,)(0, -1, 16, pg, ptr, 1); + // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} + SVE_ACLE_FUNC(svldr_vnum_za,,,)(-1, 16, ptr); + // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 15]}} + SVE_ACLE_FUNC(svstr_vnum_za,,,)(-1, -1, ptr); + // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 15]}} SVE_ACLE_FUNC(svread_hor_za128, _s8, _m,)(svundef_s8(), pg, -1, -1, 0); // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} @@ -209,6 +214,9 @@ SVE_ACLE_FUNC(svst1_hor_vnum_za32,,,)(u64, u64, 0, pg, ptr, u64); // expected-error {{argument to 'svst1_hor_vnum_za32' must be a constant integer}} SVE_ACLE_FUNC(svst1_ver_vnum_za64,,,)(0, u64, u64, pg, ptr, u64); // expected-error {{argument to 'svst1_ver_vnum_za64' must be a constant integer}} + SVE_ACLE_FUNC(svldr_vnum_za,,,)(u64, u64, ptr); // expected-error {{argument to 'svldr_vnum_za' must be a constant integer}} + SVE_ACLE_FUNC(svstr_vnum_za,,,)(u64, u64, ptr); // expected-error {{argument to 'svstr_vnum_za' must be a constant integer}} + SVE_ACLE_FUNC(svread_hor_za8, _s8, _m,)(svundef_s8(), pg, 0, u64, u64); // expected-error-re {{argument to 'svread_hor_za8{{.*}}_m' must be a constant integer}} SVE_ACLE_FUNC(svread_ver_za16, _s16, _m,)(svundef_s16(), pg, u64, u64, 0); // expected-error-re {{argument to 'svread_ver_za16{{.*}}_m' must be a constant integer}} SVE_ACLE_FUNC(svwrite_hor_za32, _s32, _m,)(0, u64, u64, pg, svundef_s32()); // expected-error-re {{argument to 'svwrite_hor_za32{{.*}}_m' must be a constant integer}} Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c === --- /dev/null +++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c @@ -0,0 +1,30 @@ +// REQUIRES: aarch64-registered-target +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s + +#include + +// CHECK-C-LABEL: @test_svstr_vnum_za( +// CHECK-CXX-LABEL: @_Z18test_svstr_vnum_zajPv( +// CHECK-NEXT: entry: +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]]) +// CHECK-NEXT:ret void +// +void test_svstr_vnum_za(uint32_t slice_base, void *ptr) { + svstr_vnum_za(slice_base, 0, ptr); +} + +// CHECK-C-LABEL: @test_svstr_vnum_za_1( +// CHECK-CXX-LABEL: @_Z20test_svstr_vnum_za_1jPv( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[VSCALE:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT:[[MULVL:%.*]] = mul nuw nsw i64 [[VSCALE]], 240 +// CHECK-NEXT:[[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] +// CHECK-NEXT:[[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 15 +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[TILESLICE]], ptr [[TMP0]]) +// CHECK-NEXT:ret void +// +void test_svstr_vnum_za_1(uint32_t slice_base, void *ptr) { + svstr_vnum_za(slice_base, 15, ptr); +} Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c === --- /dev/null +++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c @@ -0,0 +1,30 @@ +// REQUIRES: aarch64-registered-target +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve
[PATCH] D134678: [Clang][AArch64][SME] Add intrinsics for ZA array load/store (LDR/STR)
sdesmalen accepted this revision. sdesmalen added a comment. This revision is now accepted and ready to land. Thanks for the quick fix! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D134678/new/ https://reviews.llvm.org/D134678 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D134678: [Clang][AArch64][SME] Add intrinsics for ZA array load/store (LDR/STR)
bryanpkc updated this revision to Diff 541132. bryanpkc marked an inline comment as done. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D134678/new/ https://reviews.llvm.org/D134678 Files: clang/include/clang/Basic/arm_sme.td clang/lib/CodeGen/CGBuiltin.cpp clang/lib/CodeGen/CodeGenFunction.h clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp Index: clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp === --- clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp +++ clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp @@ -174,6 +174,11 @@ // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} SVE_ACLE_FUNC(svst1_ver_vnum_za8,,,)(0, -1, 16, pg, ptr, 1); + // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} + SVE_ACLE_FUNC(svldr_vnum_za,,,)(-1, 16, ptr); + // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 15]}} + SVE_ACLE_FUNC(svstr_vnum_za,,,)(-1, -1, ptr); + // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 15]}} SVE_ACLE_FUNC(svread_hor_za128, _s8, _m,)(svundef_s8(), pg, -1, -1, 0); // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} @@ -209,6 +214,9 @@ SVE_ACLE_FUNC(svst1_hor_vnum_za32,,,)(u64, u64, 0, pg, ptr, u64); // expected-error {{argument to 'svst1_hor_vnum_za32' must be a constant integer}} SVE_ACLE_FUNC(svst1_ver_vnum_za64,,,)(0, u64, u64, pg, ptr, u64); // expected-error {{argument to 'svst1_ver_vnum_za64' must be a constant integer}} + SVE_ACLE_FUNC(svldr_vnum_za,,,)(u64, u64, ptr); // expected-error {{argument to 'svldr_vnum_za' must be a constant integer}} + SVE_ACLE_FUNC(svstr_vnum_za,,,)(u64, u64, ptr); // expected-error {{argument to 'svstr_vnum_za' must be a constant integer}} + SVE_ACLE_FUNC(svread_hor_za8, _s8, _m,)(svundef_s8(), pg, 0, u64, u64); // expected-error-re {{argument to 'svread_hor_za8{{.*}}_m' must be a constant integer}} SVE_ACLE_FUNC(svread_ver_za16, _s16, _m,)(svundef_s16(), pg, u64, u64, 0); // expected-error-re {{argument to 'svread_ver_za16{{.*}}_m' must be a constant integer}} SVE_ACLE_FUNC(svwrite_hor_za32, _s32, _m,)(0, u64, u64, pg, svundef_s32()); // expected-error-re {{argument to 'svwrite_hor_za32{{.*}}_m' must be a constant integer}} Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c === --- /dev/null +++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c @@ -0,0 +1,30 @@ +// REQUIRES: aarch64-registered-target +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s + +#include + +// CHECK-C-LABEL: @test_svstr_vnum_za( +// CHECK-CXX-LABEL: @_Z18test_svstr_vnum_zajPv( +// CHECK-NEXT: entry: +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]]) +// CHECK-NEXT:ret void +// +void test_svstr_vnum_za(uint32_t slice_base, void *ptr) { + svstr_vnum_za(slice_base, 0, ptr); +} + +// CHECK-C-LABEL: @test_svstr_vnum_za_1( +// CHECK-CXX-LABEL: @_Z20test_svstr_vnum_za_1jPv( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[VSCALE:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT:[[MULVL:%.*]] = mul nuw nsw i64 [[VSCALE]], 240 +// CHECK-NEXT:[[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] +// CHECK-NEXT:[[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 15 +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[TILESLICE]], ptr [[TMP0]]) +// CHECK-NEXT:ret void +// +void test_svstr_vnum_za_1(uint32_t slice_base, void *ptr) { + svstr_vnum_za(slice_base, 15, ptr); +} Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c === --- /dev/null +++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c @@ -0,0 +1,30 @@ +// REQUIRES: aarch64-registered-target +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme
[PATCH] D134678: [Clang][AArch64][SME] Add intrinsics for ZA array load/store (LDR/STR)
bryanpkc marked an inline comment as done. bryanpkc added inline comments. Comment at: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c:24 +// CHECK-NEXT:[[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[TMP0]]) +// CHECK-NEXT:ret void sdesmalen wrote: > This is missing an `add` of `15` to `%slice_base`. Thanks for catching that. Fixed. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D134678/new/ https://reviews.llvm.org/D134678 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D134678: [Clang][AArch64][SME] Add intrinsics for ZA array load/store (LDR/STR)
sdesmalen added inline comments. Comment at: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c:24 +// CHECK-NEXT:[[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[TMP0]]) +// CHECK-NEXT:ret void This is missing an `add` of `15` to `%slice_base`. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D134678/new/ https://reviews.llvm.org/D134678 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D134678: [Clang][AArch64][SME] Add intrinsics for ZA array load/store (LDR/STR)
bryanpkc updated this revision to Diff 540839. bryanpkc added a comment. Removed the attribute macro from tests, as @sdesmalen suggested. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D134678/new/ https://reviews.llvm.org/D134678 Files: clang/include/clang/Basic/arm_sme.td clang/lib/CodeGen/CGBuiltin.cpp clang/lib/CodeGen/CodeGenFunction.h clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp Index: clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp === --- clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp +++ clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp @@ -174,6 +174,11 @@ // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} SVE_ACLE_FUNC(svst1_ver_vnum_za8,,,)(0, -1, 16, pg, ptr, 1); + // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} + SVE_ACLE_FUNC(svldr_vnum_za,,,)(-1, 16, ptr); + // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 15]}} + SVE_ACLE_FUNC(svstr_vnum_za,,,)(-1, -1, ptr); + // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 15]}} SVE_ACLE_FUNC(svread_hor_za128, _s8, _m,)(svundef_s8(), pg, -1, -1, 0); // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} @@ -209,6 +214,9 @@ SVE_ACLE_FUNC(svst1_hor_vnum_za32,,,)(u64, u64, 0, pg, ptr, u64); // expected-error {{argument to 'svst1_hor_vnum_za32' must be a constant integer}} SVE_ACLE_FUNC(svst1_ver_vnum_za64,,,)(0, u64, u64, pg, ptr, u64); // expected-error {{argument to 'svst1_ver_vnum_za64' must be a constant integer}} + SVE_ACLE_FUNC(svldr_vnum_za,,,)(u64, u64, ptr); // expected-error {{argument to 'svldr_vnum_za' must be a constant integer}} + SVE_ACLE_FUNC(svstr_vnum_za,,,)(u64, u64, ptr); // expected-error {{argument to 'svstr_vnum_za' must be a constant integer}} + SVE_ACLE_FUNC(svread_hor_za8, _s8, _m,)(svundef_s8(), pg, 0, u64, u64); // expected-error-re {{argument to 'svread_hor_za8{{.*}}_m' must be a constant integer}} SVE_ACLE_FUNC(svread_ver_za16, _s16, _m,)(svundef_s16(), pg, u64, u64, 0); // expected-error-re {{argument to 'svread_ver_za16{{.*}}_m' must be a constant integer}} SVE_ACLE_FUNC(svwrite_hor_za32, _s32, _m,)(0, u64, u64, pg, svundef_s32()); // expected-error-re {{argument to 'svwrite_hor_za32{{.*}}_m' must be a constant integer}} Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c === --- /dev/null +++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c @@ -0,0 +1,29 @@ +// REQUIRES: aarch64-registered-target +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s + +#include + +// CHECK-C-LABEL: @test_svstr_vnum_za( +// CHECK-CXX-LABEL: @_Z18test_svstr_vnum_zajPv( +// CHECK-NEXT: entry: +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]]) +// CHECK-NEXT:ret void +// +void test_svstr_vnum_za(uint32_t slice_base, void *ptr) { + svstr_vnum_za(slice_base, 0, ptr); +} + +// CHECK-C-LABEL: @test_svstr_vnum_za_1( +// CHECK-CXX-LABEL: @_Z20test_svstr_vnum_za_1jPv( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[VSCALE:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT:[[MULVL:%.*]] = mul nuw nsw i64 [[VSCALE]], 240 +// CHECK-NEXT:[[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[TMP0]]) +// CHECK-NEXT:ret void +// +void test_svstr_vnum_za_1(uint32_t slice_base, void *ptr) { + svstr_vnum_za(slice_base, 15, ptr); +} Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c === --- /dev/null +++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c @@ -0,0 +1,29 @@ +// REQUIRES: aarch64-registered-target +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S
[PATCH] D134678: [Clang][AArch64][SME] Add intrinsics for ZA array load/store (LDR/STR)
bryanpkc updated this revision to Diff 531953. bryanpkc added a comment. Also added SME attributes to the tests. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D134678/new/ https://reviews.llvm.org/D134678 Files: clang/include/clang/Basic/arm_sme.td clang/lib/CodeGen/CGBuiltin.cpp clang/lib/CodeGen/CodeGenFunction.h clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp Index: clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp === --- clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp +++ clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp @@ -187,6 +187,11 @@ // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} SVE_ACLE_FUNC(svst1_ver_vnum_za8,,,)(0, -1, 16, pg, ptr, 1); + // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} + SVE_ACLE_FUNC(svldr_vnum_za,,,)(-1, 16, ptr); + // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 15]}} + SVE_ACLE_FUNC(svstr_vnum_za,,,)(-1, -1, ptr); + // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 15]}} SVE_ACLE_FUNC(svread_hor_za128, _s8, _m,)(svundef_s8(), pg, -1, -1, 0); // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} @@ -224,6 +229,9 @@ SVE_ACLE_FUNC(svst1_hor_vnum_za32,,,)(u64, u64, 0, pg, ptr, u64); // expected-error {{argument to 'svst1_hor_vnum_za32' must be a constant integer}} SVE_ACLE_FUNC(svst1_ver_vnum_za64,,,)(0, u64, u64, pg, ptr, u64); // expected-error {{argument to 'svst1_ver_vnum_za64' must be a constant integer}} + SVE_ACLE_FUNC(svldr_vnum_za,,,)(u64, u64, ptr); // expected-error {{argument to 'svldr_vnum_za' must be a constant integer}} + SVE_ACLE_FUNC(svstr_vnum_za,,,)(u64, u64, ptr); // expected-error {{argument to 'svstr_vnum_za' must be a constant integer}} + SVE_ACLE_FUNC(svread_hor_za8, _s8, _m,)(svundef_s8(), pg, 0, u64, u64); // expected-error-re {{argument to 'svread_hor_za8{{.*}}_m' must be a constant integer}} SVE_ACLE_FUNC(svread_ver_za16, _s16, _m,)(svundef_s16(), pg, u64, u64, 0); // expected-error-re {{argument to 'svread_ver_za16{{.*}}_m' must be a constant integer}} SVE_ACLE_FUNC(svwrite_hor_za32, _s32, _m,)(0, u64, u64, pg, svundef_s32()); // expected-error-re {{argument to 'svwrite_hor_za32{{.*}}_m' must be a constant integer}} Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c === --- /dev/null +++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c @@ -0,0 +1,35 @@ +// REQUIRES: aarch64-registered-target +// RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C +// RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX +// RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s + +#include + +#ifdef DISABLE_SME_ATTRIBUTES +#define ARM_SHARED_ZA_ATTR +#else +#define ARM_SHARED_ZA_ATTR __attribute__((arm_shared_za)) +#endif + +// CHECK-C-LABEL: @test_svstr_vnum_za( +// CHECK-CXX-LABEL: @_Z18test_svstr_vnum_zajPv( +// CHECK-NEXT: entry: +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]]) +// CHECK-NEXT:ret void +// +ARM_SHARED_ZA_ATTR void test_svstr_vnum_za(uint32_t slice_base, void *ptr) { + svstr_vnum_za(slice_base, 0, ptr); +} + +// CHECK-C-LABEL: @test_svstr_vnum_za_1( +// CHECK-CXX-LABEL: @_Z20test_svstr_vnum_za_1jPv( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[VSCALE:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT:[[MULVL:%.*]] = mul nuw nsw i64 [[VSCALE]], 240 +// CHECK-NEXT:[[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[TMP0]]) +// CHECK-NEXT:ret void +// +ARM_SHARED_ZA_ATTR void test_svstr_vnum_za_1(uint32_t slice_base, void *ptr) { + svstr_vnum_za(slice_base, 15, ptr); +} Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c === --- /dev/null +++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c @@ -0,0 +1,35 @@ +// REQUIRES: aarch64-registered-target +// RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C +// RUN: %clang_cc1
[PATCH] D134678: [Clang][AArch64][SME] Add intrinsics for ZA array load/store (LDR/STR)
bryanpkc updated this revision to Diff 531949. bryanpkc added a comment. Instead of defining new type flags, `EmitAArch64SMEBuiltinExpr` is updated to switch on `BuiltinID`, as suggested by @sdesmalen. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D134678/new/ https://reviews.llvm.org/D134678 Files: clang/include/clang/Basic/arm_sme.td clang/lib/CodeGen/CGBuiltin.cpp clang/lib/CodeGen/CodeGenFunction.h clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp Index: clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp === --- clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp +++ clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp @@ -187,6 +187,11 @@ // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} SVE_ACLE_FUNC(svst1_ver_vnum_za8,,,)(0, -1, 16, pg, ptr, 1); + // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} + SVE_ACLE_FUNC(svldr_vnum_za,,,)(-1, 16, ptr); + // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 15]}} + SVE_ACLE_FUNC(svstr_vnum_za,,,)(-1, -1, ptr); + // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 15]}} SVE_ACLE_FUNC(svread_hor_za128, _s8, _m,)(svundef_s8(), pg, -1, -1, 0); // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} @@ -224,6 +229,9 @@ SVE_ACLE_FUNC(svst1_hor_vnum_za32,,,)(u64, u64, 0, pg, ptr, u64); // expected-error {{argument to 'svst1_hor_vnum_za32' must be a constant integer}} SVE_ACLE_FUNC(svst1_ver_vnum_za64,,,)(0, u64, u64, pg, ptr, u64); // expected-error {{argument to 'svst1_ver_vnum_za64' must be a constant integer}} + SVE_ACLE_FUNC(svldr_vnum_za,,,)(u64, u64, ptr); // expected-error {{argument to 'svldr_vnum_za' must be a constant integer}} + SVE_ACLE_FUNC(svstr_vnum_za,,,)(u64, u64, ptr); // expected-error {{argument to 'svstr_vnum_za' must be a constant integer}} + SVE_ACLE_FUNC(svread_hor_za8, _s8, _m,)(svundef_s8(), pg, 0, u64, u64); // expected-error-re {{argument to 'svread_hor_za8{{.*}}_m' must be a constant integer}} SVE_ACLE_FUNC(svread_ver_za16, _s16, _m,)(svundef_s16(), pg, u64, u64, 0); // expected-error-re {{argument to 'svread_ver_za16{{.*}}_m' must be a constant integer}} SVE_ACLE_FUNC(svwrite_hor_za32, _s32, _m,)(0, u64, u64, pg, svundef_s32()); // expected-error-re {{argument to 'svwrite_hor_za32{{.*}}_m' must be a constant integer}} Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c === --- /dev/null +++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c @@ -0,0 +1,29 @@ +// REQUIRES: aarch64-registered-target +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s + +#include + +// CHECK-C-LABEL: @test_svstr_vnum_za( +// CHECK-CXX-LABEL: @_Z18test_svstr_vnum_zajPv( +// CHECK-NEXT: entry: +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]]) +// CHECK-NEXT:ret void +// +void test_svstr_vnum_za(uint32_t slice_base, void *ptr) { + svstr_vnum_za(slice_base, 0, ptr); +} + +// CHECK-C-LABEL: @test_svstr_vnum_za_1( +// CHECK-CXX-LABEL: @_Z20test_svstr_vnum_za_1jPv( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[VSCALE:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT:[[MULVL:%.*]] = mul nuw nsw i64 [[VSCALE]], 240 +// CHECK-NEXT:[[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[TMP0]]) +// CHECK-NEXT:ret void +// +void test_svstr_vnum_za_1(uint32_t slice_base, void *ptr) { + svstr_vnum_za(slice_base, 15, ptr); +} Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c === --- /dev/null +++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c @@ -0,0 +1,29 @@ +// REQUIRES: aarch64-registered-target +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX +// RUN: %clang_cc1 -triple
[PATCH] D134678: [Clang][AArch64][SME] Add intrinsics for ZA array load/store (LDR/STR)
bryanpkc updated this revision to Diff 526361. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D134678/new/ https://reviews.llvm.org/D134678 Files: clang/include/clang/Basic/TargetBuiltins.h clang/include/clang/Basic/arm_sme.td clang/include/clang/Basic/arm_sve_sme_incl.td clang/lib/CodeGen/CGBuiltin.cpp clang/lib/CodeGen/CodeGenFunction.h clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp Index: clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp === --- clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp +++ clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp @@ -185,6 +185,11 @@ // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} SVE_ACLE_FUNC(svst1_ver_vnum_za8,,,)(0, -1, 16, pg, ptr, 1); + // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} + SVE_ACLE_FUNC(svldr_vnum_za,,,)(-1, 16, ptr); + // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 15]}} + SVE_ACLE_FUNC(svstr_vnum_za,,,)(-1, -1, ptr); + // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 15]}} SVE_ACLE_FUNC(svread_hor_za128, _s8, _m,)(svundef_s8(), pg, -1, -1, 0); // expected-error@+1 {{argument value 16 is outside the valid range [0, 15]}} @@ -222,6 +227,9 @@ SVE_ACLE_FUNC(svst1_hor_vnum_za32,,,)(u64, u64, 0, pg, ptr, u64); // expected-error {{argument to 'svst1_hor_vnum_za32' must be a constant integer}} SVE_ACLE_FUNC(svst1_ver_vnum_za64,,,)(0, u64, u64, pg, ptr, u64); // expected-error {{argument to 'svst1_ver_vnum_za64' must be a constant integer}} + SVE_ACLE_FUNC(svldr_vnum_za,,,)(u64, u64, ptr); // expected-error {{argument to 'svldr_vnum_za' must be a constant integer}} + SVE_ACLE_FUNC(svstr_vnum_za,,,)(u64, u64, ptr); // expected-error {{argument to 'svstr_vnum_za' must be a constant integer}} + SVE_ACLE_FUNC(svread_hor_za8, _s8, _m,)(svundef_s8(), pg, 0, u64, u64); // expected-error-re {{argument to 'svread_hor_za8{{.*}}_m' must be a constant integer}} SVE_ACLE_FUNC(svread_ver_za16, _s16, _m,)(svundef_s16(), pg, u64, u64, 0); // expected-error-re {{argument to 'svread_ver_za16{{.*}}_m' must be a constant integer}} SVE_ACLE_FUNC(svwrite_hor_za32, _s32, _m,)(0, u64, u64, pg, svundef_s32()); // expected-error-re {{argument to 'svwrite_hor_za32{{.*}}_m' must be a constant integer}} Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c === --- /dev/null +++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c @@ -0,0 +1,29 @@ +// REQUIRES: aarch64-registered-target +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s + +#include + +// CHECK-C-LABEL: @test_svstr_vnum_za( +// CHECK-CXX-LABEL: @_Z18test_svstr_vnum_zajPv( +// CHECK-NEXT: entry: +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]]) +// CHECK-NEXT:ret void +// +void test_svstr_vnum_za(uint32_t slice_base, void *ptr) { + svstr_vnum_za(slice_base, 0, ptr); +} + +// CHECK-C-LABEL: @test_svstr_vnum_za_1( +// CHECK-CXX-LABEL: @_Z20test_svstr_vnum_za_1jPv( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[VSCALE:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT:[[MULVL:%.*]] = mul nuw nsw i64 [[VSCALE]], 240 +// CHECK-NEXT:[[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[TMP0]]) +// CHECK-NEXT:ret void +// +void test_svstr_vnum_za_1(uint32_t slice_base, void *ptr) { + svstr_vnum_za(slice_base, 15, ptr); +} Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c === --- /dev/null +++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c @@ -0,0 +1,29 @@ +// REQUIRES: aarch64-registered-target +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S
[PATCH] D134678: [Clang][AArch64][SME] Add intrinsics for ZA array load/store (LDR/STR)
bryanpkc updated this revision to Diff 492679. bryanpkc retitled this revision from "[Clang][AArch64] Add SME ldr and str intrinsic" to "[Clang][AArch64][SME] Add intrinsics for ZA array load/store (LDR/STR)". bryanpkc edited the summary of this revision. bryanpkc added a comment. Rebased and cleaned up the patch. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D134678/new/ https://reviews.llvm.org/D134678 Files: clang/include/clang/Basic/TargetBuiltins.h clang/include/clang/Basic/arm_sme.td clang/include/clang/Basic/arm_sve_sme_incl.td clang/lib/CodeGen/CGBuiltin.cpp clang/lib/CodeGen/CodeGenFunction.h clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c === --- /dev/null +++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c @@ -0,0 +1,43 @@ +// REQUIRES: aarch64-registered-target +// RUN: %clang_cc1 -D__ARM_FEATURE_SME -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C +// RUN: %clang_cc1 -D__ARM_FEATURE_SME -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX +// RUN: %clang_cc1 -D__ARM_FEATURE_SME -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s + +#include + + +// CHECK-C-LABEL: @test_svstr_vnum_za( +// CHECK-CXX-LABEL: @_Z18test_svstr_vnum_zajPv( +// CHECK-NEXT: entry: +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]]) +// CHECK-NEXT:ret void +// +void test_svstr_vnum_za(uint32_t slice_base, void *ptr) { + svstr_vnum_za(slice_base, 0, ptr); +} + +// CHECK-C-LABEL: @test_svstr_vnum_za_1( +// CHECK-CXX-LABEL: @_Z20test_svstr_vnum_za_1jPv( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[VSCALE:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT:[[MULVL:%.*]] = mul nuw nsw i64 [[VSCALE]], 240 +// CHECK-NEXT:[[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[TMP0]]) +// CHECK-NEXT:ret void +// +void test_svstr_vnum_za_1(uint32_t slice_base, void *ptr) { + svstr_vnum_za(slice_base, 15, ptr); +} + +// CHECK-C-LABEL: @test_svstr_vnum_za_2( +// CHECK-CXX-LABEL: @_Z20test_svstr_vnum_za_2jPv( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[VSCALE:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT:[[MULVL:%.*]] = shl nuw nsw i64 [[VSCALE]], 8 +// CHECK-NEXT:[[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] +// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[TMP0]]) +// CHECK-NEXT:ret void +// +void test_svstr_vnum_za_2(uint32_t slice_base, void *ptr) { + svstr_vnum_za(slice_base, 16, ptr); +} Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c === --- /dev/null +++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c @@ -0,0 +1,42 @@ +// REQUIRES: aarch64-registered-target +// RUN: %clang_cc1 -D__ARM_FEATURE_SME -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C +// RUN: %clang_cc1 -D__ARM_FEATURE_SME -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX +// RUN: %clang_cc1 -D__ARM_FEATURE_SME -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s + +#include + +// CHECK-C-LABEL: @test_svldr_vnum_za( +// CHECK-CXX-LABEL: @_Z18test_svldr_vnum_zajPKv( +// CHECK-NEXT: entry: +// CHECK-NEXT:tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]]) +// CHECK-NEXT:ret void +// +void test_svldr_vnum_za(uint32_t slice_base, const void *ptr) { + svldr_vnum_za(slice_base, 0, ptr); +} + +// CHECK-C-LABEL: @test_svldr_vnum_za_1( +// CHECK-CXX-LABEL: @_Z20test_svldr_vnum_za_1jPKv( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[VSCALE:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT:[[MULVL:%.*]] = mul nuw nsw i64 [[VSCALE]], 240 +// CHECK-NEXT:[[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] +// CHECK-NEXT:tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE:%.*]], ptr [[TMP0]]) +// CHECK-NEXT:ret void +// +void test_svldr_vnum_za_1(uint32_t slice_base, const void *ptr) { + svldr_vnum_za(slice_base, 15, ptr); +} + +// CHECK-C-LABEL: @test_svldr_vnum_za_2( +// CHECK-CXX-LABEL: @_Z20test_svldr_vnum_za_2jPKv( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[VSCALE:%.*]] = tail call i64