subject:"\\\\\\\[m5\\\\\\\-dev\\\\\\\] changeset in m5\\\\\\\: X86\\\\\\\: Rework interrupt pins to allow one to many..."

[m5-dev] changeset in m5: X86: Rework interrupt pins to allow one to many...

2009-02-01 Thread Gabe Black

changeset ac2c268bf4f1 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=ac2c268bf4f1
description:
X86: Rework interrupt pins to allow one to many connections.

diffstat:

16 files changed, 209 insertions(+), 70 deletions(-)
src/dev/x86/Cmos.py|4 +
src/dev/x86/I82094AA.py|5 +-
src/dev/x86/I8254.py   |4 +
src/dev/x86/I8259.py   |8 ++-
src/dev/x86/SouthBridge.py |   21 +++--
src/dev/x86/X86IntPin.py   |   24 ---
src/dev/x86/cmos.cc|4 +
src/dev/x86/cmos.hh|6 +-
src/dev/x86/i82094aa.cc|   20 -
src/dev/x86/i82094aa.hh|9 +---
src/dev/x86/i8254.cc   |7 ++-
src/dev/x86/i8254.hh   |4 -
src/dev/x86/i8259.cc   |   38 +++--
src/dev/x86/i8259.hh   |   11 +
src/dev/x86/intdev.cc  |   18 ++--
src/dev/x86/intdev.hh  |   96 

diffs (truncated from 575 to 300 lines):

diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/Cmos.py
--- a/src/dev/x86/Cmos.py   Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/Cmos.py   Sat Jan 31 23:33:54 2009 -0800
@@ -29,6 +29,7 @@
 from m5.params import *
 from m5.proxy import *
 from Device import BasicPioDevice
+from X86IntPin import X86IntSourcePin
 
 class Cmos(BasicPioDevice):
 type = 'Cmos'
@@ -36,4 +37,5 @@
 time = Param.Time('01/01/2009',
 System time to use ('Now' for actual time))
 pio_latency = Param.Latency('1ns', Programmed IO latency in simticks)
-int_pin = Param.X86IntPin('Pin to signal RTC alarm interrupts to')
+int_pin = Param.X86IntSourcePin(X86IntSourcePin(),
+'Pin to signal RTC alarm interrupts to')
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/I82094AA.py
--- a/src/dev/x86/I82094AA.py   Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/I82094AA.py   Sat Jan 31 23:33:54 2009 -0800
@@ -29,7 +29,7 @@
 from m5.params import *
 from m5.proxy import *
 from Device import BasicPioDevice
-from X86IntPin import X86IntPin
+from X86IntPin import X86IntSinkPin
 
 class I82094AA(BasicPioDevice):
 type = 'I82094AA'
@@ -37,6 +37,7 @@
 pio_latency = Param.Latency('1ns', Programmed IO latency in simticks)
 pio_addr = Param.Addr(Device address)
 int_port = Port(Port for sending and receiving interrupt messages)
+external_int_pic = Param.I8259(External PIC, if any)
 
 def pin(self, line):
-return X86IntPin(device=self, line=line)
+return X86IntSinkPin(device=self, number=line)
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/I8254.py
--- a/src/dev/x86/I8254.py  Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/I8254.py  Sat Jan 31 23:33:54 2009 -0800
@@ -29,9 +29,11 @@
 from m5.params import *
 from m5.proxy import *
 from Device import BasicPioDevice
+from X86IntPin import X86IntSourcePin
 
 class I8254(BasicPioDevice):
 type = 'I8254'
 cxx_class = 'X86ISA::I8254'
 pio_latency = Param.Latency('1ns', Programmed IO latency in simticks)
-int_pin = Param.X86IntPin('Pin to signal timer interrupts to')
+int_pin = Param.X86IntSourcePin(X86IntSourcePin(),
+'Pin to signal timer interrupts to')
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/I8259.py
--- a/src/dev/x86/I8259.py  Sat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/I8259.py  Sat Jan 31 23:33:54 2009 -0800
@@ -29,7 +29,7 @@
 from m5.params import *
 from m5.proxy import *
 from Device import BasicPioDevice
-from X86IntPin import X86IntPin
+from X86IntPin import X86IntSourcePin, X86IntSinkPin
 
 class X86I8259CascadeMode(Enum):
 map = {'I8259Master' : 0,
@@ -41,8 +41,10 @@
 type = 'I8259'
 cxx_class='X86ISA::I8259'
 pio_latency = Param.Latency('1ns', Programmed IO latency in simticks)
-output = Param.X86IntPin('The pin this I8259 drives')
+output = Param.X86IntSourcePin(X86IntSourcePin(),
+'The pin this I8259 drives')
 mode = Param.X86I8259CascadeMode('How this I8259 is cascaded')
+slave = Param.I8259('Slave I8259, if any')
 
 def pin(self, line):
-return X86IntPin(device=self, line=line)
+return X86IntSinkPin(device=self, number=line)
diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/SouthBridge.py
--- a/src/dev/x86/SouthBridge.pySat Jan 31 23:26:43 2009 -0800
+++ b/src/dev/x86/SouthBridge.pySat Jan 31 23:33:54 2009 -0800
@@ -34,6 +34,7 @@
 from I8254 import I8254
 from I8259 import I8259
 from PcSpeaker import PcSpeaker
+from X86IntPin import X86IntLine
 from m5.SimObject import SimObject
 
 def x86IOAddress(port):
@@ -52,6 +53,9 @@
 _pit = I8254(pio_addr=x86IOAddress(0x40))
 _speaker = PcSpeaker(pio_addr=x86IOAddress(0x61))
 _io_apic = I82094AA(pio_addr=0xFEC0)
+# This is to make sure the interrupt lines are instantiated. Don't use
+# it for anything directly.
+int_lines = VectorParam.X86IntLine([], Interrupt lines)
 
 pic1 = Param.I8259(_pic1, Master PIC)
 pic2 = Param.I8259(_pic2,

Re: [m5-dev] changeset in m5: X86: Rework interrupt pins to allow one to many...

2009-02-01 Thread Gabe Black

Sure. Does that work like warn once?  It's in a position to be called a lot.

Gabe

nathan binkert wrote:
 For the XXX this is a hack, can you please use the newish hack() function?

 Thanks,
Nate

 On Sun, Feb 1, 2009 at 5:18 PM, Gabe Black gbl...@eecs.umich.edu wrote:
   
 changeset ac2c268bf4f1 in /z/repo/m5
 details: http://repo.m5sim.org/m5?cmd=changeset;node=ac2c268bf4f1
 description:
X86: Rework interrupt pins to allow one to many connections.

 diffstat:

 16 files changed, 209 insertions(+), 70 deletions(-)
 src/dev/x86/Cmos.py|4 +
 src/dev/x86/I82094AA.py|5 +-
 src/dev/x86/I8254.py   |4 +
 src/dev/x86/I8259.py   |8 ++-
 src/dev/x86/SouthBridge.py |   21 +++--
 src/dev/x86/X86IntPin.py   |   24 ---
 src/dev/x86/cmos.cc|4 +
 src/dev/x86/cmos.hh|6 +-
 src/dev/x86/i82094aa.cc|   20 -
 src/dev/x86/i82094aa.hh|9 +---
 src/dev/x86/i8254.cc   |7 ++-
 src/dev/x86/i8254.hh   |4 -
 src/dev/x86/i8259.cc   |   38 +++--
 src/dev/x86/i8259.hh   |   11 +
 src/dev/x86/intdev.cc  |   18 ++--
 src/dev/x86/intdev.hh  |   96 
 

 diffs (truncated from 575 to 300 lines):

 diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/Cmos.py
 --- a/src/dev/x86/Cmos.py   Sat Jan 31 23:26:43 2009 -0800
 +++ b/src/dev/x86/Cmos.py   Sat Jan 31 23:33:54 2009 -0800
 @@ -29,6 +29,7 @@
  from m5.params import *
  from m5.proxy import *
  from Device import BasicPioDevice
 +from X86IntPin import X86IntSourcePin

  class Cmos(BasicPioDevice):
 type = 'Cmos'
 @@ -36,4 +37,5 @@
 time = Param.Time('01/01/2009',
 System time to use ('Now' for actual time))
 pio_latency = Param.Latency('1ns', Programmed IO latency in simticks)
 -int_pin = Param.X86IntPin('Pin to signal RTC alarm interrupts to')
 +int_pin = Param.X86IntSourcePin(X86IntSourcePin(),
 +'Pin to signal RTC alarm interrupts to')
 diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/I82094AA.py
 --- a/src/dev/x86/I82094AA.py   Sat Jan 31 23:26:43 2009 -0800
 +++ b/src/dev/x86/I82094AA.py   Sat Jan 31 23:33:54 2009 -0800
 @@ -29,7 +29,7 @@
  from m5.params import *
  from m5.proxy import *
  from Device import BasicPioDevice
 -from X86IntPin import X86IntPin
 +from X86IntPin import X86IntSinkPin

  class I82094AA(BasicPioDevice):
 type = 'I82094AA'
 @@ -37,6 +37,7 @@
 pio_latency = Param.Latency('1ns', Programmed IO latency in simticks)
 pio_addr = Param.Addr(Device address)
 int_port = Port(Port for sending and receiving interrupt messages)
 +external_int_pic = Param.I8259(External PIC, if any)

 def pin(self, line):
 -return X86IntPin(device=self, line=line)
 +return X86IntSinkPin(device=self, number=line)
 diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/I8254.py
 --- a/src/dev/x86/I8254.py  Sat Jan 31 23:26:43 2009 -0800
 +++ b/src/dev/x86/I8254.py  Sat Jan 31 23:33:54 2009 -0800
 @@ -29,9 +29,11 @@
  from m5.params import *
  from m5.proxy import *
  from Device import BasicPioDevice
 +from X86IntPin import X86IntSourcePin

  class I8254(BasicPioDevice):
 type = 'I8254'
 cxx_class = 'X86ISA::I8254'
 pio_latency = Param.Latency('1ns', Programmed IO latency in simticks)
 -int_pin = Param.X86IntPin('Pin to signal timer interrupts to')
 +int_pin = Param.X86IntSourcePin(X86IntSourcePin(),
 +'Pin to signal timer interrupts to')
 diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/I8259.py
 --- a/src/dev/x86/I8259.py  Sat Jan 31 23:26:43 2009 -0800
 +++ b/src/dev/x86/I8259.py  Sat Jan 31 23:33:54 2009 -0800
 @@ -29,7 +29,7 @@
  from m5.params import *
  from m5.proxy import *
  from Device import BasicPioDevice
 -from X86IntPin import X86IntPin
 +from X86IntPin import X86IntSourcePin, X86IntSinkPin

  class X86I8259CascadeMode(Enum):
 map = {'I8259Master' : 0,
 @@ -41,8 +41,10 @@
 type = 'I8259'
 cxx_class='X86ISA::I8259'
 pio_latency = Param.Latency('1ns', Programmed IO latency in simticks)
 -output = Param.X86IntPin('The pin this I8259 drives')
 +output = Param.X86IntSourcePin(X86IntSourcePin(),
 +'The pin this I8259 drives')
 mode = Param.X86I8259CascadeMode('How this I8259 is cascaded')
 +slave = Param.I8259('Slave I8259, if any')

 def pin(self, line):
 -return X86IntPin(device=self, line=line)
 +return X86IntSinkPin(device=self, number=line)
 diff -r e0d0e58cfd8d -r ac2c268bf4f1 src/dev/x86/SouthBridge.py
 --- a/src/dev/x86/SouthBridge.pySat Jan 31 23:26:43 2009 -0800
 +++ b/src/dev/x86/SouthBridge.pySat Jan 31 23:33:54 2009 -0800
 @@ -34,6 +34,7 @@
  from I8254 import I8254
  from I8259 import I8259
  from PcSpeaker import PcSpeaker
 +from X86IntPin import X86IntLine
  from m5.SimObject import SimObject

  def x86IOAddress(port):
 @@ -52,6 +53,9 @@
 _pit =

Re: [m5-dev] changeset in m5: X86: Rework interrupt pins to allow one to many...

2009-02-01 Thread nathan binkert

 Sure. Does that work like warn once?  It's in a position to be called a lot.

There's hack() and hack_once().  Though, you bring up a good point as
to whether it is worth ever printing a hack message more than once.

  Nate
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