[PATCH -next] iommu/tegra-smmu: Fix return value check in tegra_smmu_group_get()

2017-12-19 Thread Wei Yongjun 
In case of error, the function iommu_group_alloc() returns ERR_PTR() and
never returns NULL. The NULL test in the return value check should be
replaced with IS_ERR().

Fixes: 7f4c9176f760 ("iommu/tegra: Allow devices to be grouped")
Signed-off-by: Wei Yongjun 
---
 drivers/iommu/tegra-smmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
index 8885635..44d40bc 100644
--- a/drivers/iommu/tegra-smmu.c
+++ b/drivers/iommu/tegra-smmu.c
@@ -832,7 +832,7 @@ static struct iommu_group *tegra_smmu_group_get(struct 
tegra_smmu *smmu,
group->soc = soc;
 
group->group = iommu_group_alloc();
-   if (!group->group) {
+   if (IS_ERR(group->group)) {
devm_kfree(smmu->dev, group);
mutex_unlock(>lock);
return NULL;

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Re: [PATCH v4 0/5] Add Intel IOMMU debugfs support

2017-12-19 Thread Mehta, Sohil 
On Tue, 2017-12-19 at 23:25 +0200, Andy Shevchenko wrote:
> 
> Perhaps you need to switch to SPDX license pointer.
> I dunno if Thomas' patch with documentation how to do this made
> upstream
>  / linux-next yet.
> 

Thanks. I found the information at https://patchwork.kernel.org/patch/1
0091607/. 
I'll replace the GPL 2.0 license information in intel-iommu-debug.c
with the tag:
// SPDX-License-Identifier: GPL-2.0

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Re: [PATCH v4 5/5] iommu/vt-d: Add debugfs support for Interrupt remapping

2017-12-19 Thread Mehta, Sohil 

On Tue, 2017-12-19 at 23:30 +0200, Andy Shevchenko wrote:
> On Tue, 2017-12-19 at 13:08 -0800, Sohil Mehta wrote:
> > 
> > Debugfs extension for Intel IOMMU to dump Interrupt remapping table
> > entries for Interrupt remapping and Interrupt posting.
> > 
> > The file /sys/kernel/debug/intel_iommu/ir_translation_struct
> > provides
> > detailed information, such as Index, Source Id, Destination Id,
> > Vector
> > and the raw values for entries with the present bit set, in the
> > format
> > shown.
> > 
> > Remapped Interrupt supported on IOMMU: dmar5
> >  IR table address:93e09d54c310
> > ---
> >  Index  SID  Dest_ID  Vct Raw_value_high   Raw_value_low
> >  1  3a00 0600 2c  00043a00 062c0009
> >  1114301 0900 a2  00044301 09a20009
> > 
> > Posted Interrupt supported on IOMMU: dmar5
> >  IR table address:93e09d54c310
> > -
> > ---
> >  Index  SID  PDA_high PDA_low  Vct Raw_value_high   Raw_value_low
> >  4  4300 0010 40c7c880 41  00144300
> > 40c7c88000418001
> >  5  4300 0010 40c7c880 51  00144300
> > 40c7c88000518001
> > 
> > 
> > 
> > +   seq_printf(m, "\nRemapped Interrupt supported on
> > IOMMU: %s\n"
> Please, avoid leading \n.

Sure. I'll add a separate seq_puts(m, "\n") after each of the loops to
avoid having the leading '\n's.

> 
> > 
> > +      " IR table address:%p\n", iommu->name,
> > +      iommu->ir_table);
> > +
> > +   seq_puts(m, "-
> > -
> > -"
> > +    "\n");
> It's okay to use long string literal on one line. So, don't split (or
> for multi-line string literals, split by \n like you do above).
> 
Thanks. Will fix this and the other one.

> > 
> > +   seq_puts(m,
> > "\n\t\t\t\t\t\t\t\n");
> Leading \n.
> 
> > 
> > +   seq_printf(m, "\nPosted Interrupt supported on
> > IOMMU:
> > %s\n"
> Ditto.
> 
> > 
> > +      " IR table address:%p\n", iommu->name,
> > +      iommu->ir_table);
> > +
> > +   seq_puts(m, "-
> > -
> > --"
> > +    "\n");
> Join back.
> 
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[PATCH V2] iommu/amd - Set the device table entry PPR bit for IOMMU V2 devices

2017-12-19 Thread Gary R Hook 
The AMD IOMMU specification Rev 3.00 (December 2016) introduces a
new Enhanced PPR Handling Support (EPHSup) bit in the MMIO register
offset 0030h (IOMMU Extended Feature Register).

When EPHSup=1, the IOMMU hardware requires the PPR bit of the
device table entry (DTE) to be set in order to support PPR for a
particular endpoint device.

Please see https://support.amd.com/TechDocs/48882_IOMMU.pdf for
this revision of the AMD IOMMU specification.

Signed-off-by: Gary R Hook 
---
 0 files changed

diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index cb78933ef53f..5f3da95ff6a0 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -1818,7 +1818,8 @@ static bool dma_ops_domain(struct protection_domain 
*domain)
return domain->flags & PD_DMA_OPS_MASK;
 }
 
-static void set_dte_entry(u16 devid, struct protection_domain *domain, bool 
ats)
+static void set_dte_entry(u16 devid, struct protection_domain *domain,
+ bool ats, bool ppr)
 {
u64 pte_root = 0;
u64 flags = 0;
@@ -1835,6 +1836,13 @@ static void set_dte_entry(u16 devid, struct 
protection_domain *domain, bool ats)
if (ats)
flags |= DTE_FLAG_IOTLB;
 
+   if (ppr) {
+   struct amd_iommu *iommu = amd_iommu_rlookup_table[devid];
+
+   if (iommu_feature(iommu, FEATURE_EPHSUP))
+   pte_root |= 1ULL << DEV_ENTRY_PPR;
+   }
+
if (domain->flags & PD_IOMMUV2_MASK) {
u64 gcr3 = iommu_virt_to_phys(domain->gcr3_tbl);
u64 glx  = domain->glx;
@@ -1897,9 +1905,9 @@ static void do_attach(struct iommu_dev_data *dev_data,
domain->dev_cnt += 1;
 
/* Update device table */
-   set_dte_entry(dev_data->devid, domain, ats);
+   set_dte_entry(dev_data->devid, domain, ats, dev_data->iommu_v2);
if (alias != dev_data->devid)
-   set_dte_entry(alias, domain, ats);
+   set_dte_entry(alias, domain, ats, dev_data->iommu_v2);
 
device_flush_dte(dev_data);
 }
@@ -2278,13 +2286,15 @@ static void update_device_table(struct 
protection_domain *domain)
struct iommu_dev_data *dev_data;
 
list_for_each_entry(dev_data, >dev_list, list) {
-   set_dte_entry(dev_data->devid, domain, dev_data->ats.enabled);
+   set_dte_entry(dev_data->devid, domain, dev_data->ats.enabled,
+ dev_data->iommu_v2);
 
if (dev_data->devid == dev_data->alias)
continue;
 
/* There is an alias, update device table entry for it */
-   set_dte_entry(dev_data->alias, domain, dev_data->ats.enabled);
+   set_dte_entry(dev_data->alias, domain, dev_data->ats.enabled,
+ dev_data->iommu_v2);
}
 }
 
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h
index f6b24c7d8b70..6a877ebd058b 100644
--- a/drivers/iommu/amd_iommu_types.h
+++ b/drivers/iommu/amd_iommu_types.h
@@ -98,6 +98,7 @@
 #define FEATURE_HE (1ULL<<8)
 #define FEATURE_PC (1ULL<<9)
 #define FEATURE_GAM_VAPIC  (1ULL<<21)
+#define FEATURE_EPHSUP (1ULL<<50)
 
 #define FEATURE_PASID_SHIFT32
 #define FEATURE_PASID_MASK (0x1fULL << FEATURE_PASID_SHIFT)
@@ -192,6 +193,7 @@
 /* macros and definitions for device table entries */
 #define DEV_ENTRY_VALID 0x00
 #define DEV_ENTRY_TRANSLATION   0x01
+#define DEV_ENTRY_PPR   0x34
 #define DEV_ENTRY_IR0x3d
 #define DEV_ENTRY_IW0x3e
 #define DEV_ENTRY_NO_PAGE_FAULT0x62

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Re: [PATCH v4 5/5] iommu/vt-d: Add debugfs support for Interrupt remapping

2017-12-19 Thread Andy Shevchenko 
On Tue, 2017-12-19 at 13:08 -0800, Sohil Mehta wrote:
> Debugfs extension for Intel IOMMU to dump Interrupt remapping table
> entries for Interrupt remapping and Interrupt posting.
> 
> The file /sys/kernel/debug/intel_iommu/ir_translation_struct provides
> detailed information, such as Index, Source Id, Destination Id, Vector
> and the raw values for entries with the present bit set, in the format
> shown.
> 
> Remapped Interrupt supported on IOMMU: dmar5
>  IR table address:93e09d54c310
> ---
>  Index  SID  Dest_ID  Vct Raw_value_high   Raw_value_low
>  1  3a00 0600 2c  00043a00 062c0009
>  1114301 0900 a2  00044301 09a20009
> 
> Posted Interrupt supported on IOMMU: dmar5
>  IR table address:93e09d54c310
> 
>  Index  SID  PDA_high PDA_low  Vct Raw_value_high   Raw_value_low
>  4  4300 0010 40c7c880 41  00144300 40c7c88000418001
>  5  4300 0010 40c7c880 51  00144300 40c7c88000518001
> 
> 

> + seq_printf(m, "\nRemapped Interrupt supported on
> IOMMU: %s\n"

Please, avoid leading \n.

> +" IR table address:%p\n", iommu->name,
> +iommu->ir_table);
> +
> + seq_puts(m, "--
> -"
> +  "\n");

It's okay to use long string literal on one line. So, don't split (or
for multi-line string literals, split by \n like you do above).

> + seq_puts(m,
> "\n\t\t\t\t\t\t\t\n");

Leading \n.

> + seq_printf(m, "\nPosted Interrupt supported on IOMMU:
> %s\n"

Ditto.

> +" IR table address:%p\n", iommu->name,
> +iommu->ir_table);
> +
> + seq_puts(m, "--
> --"
> +  "\n");

Join back.

-- 
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Intel Finland Oy
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Re: [PATCH v4 0/5] Add Intel IOMMU debugfs support

2017-12-19 Thread Andy Shevchenko 
On Tue, 2017-12-19 at 13:08 -0800, Sohil Mehta wrote:
> Hi All,
> 
> This series aims to add debugfs support for Intel IOMMU. It exposes
> IOMMU
> registers, internal context and dumps individual table entries to help
> debug
> Intel IOMMUs.
> 
> The first patch does the ground work for the following patches by
> creating a
> new Kconfig option - INTEL_IOMMU_DEBUG. It also reorganizes some Intel
> IOMMU
> data structures. The next four patches add debugfs support for IOMMU
> context
> internals, register contents, PASID internals, and Interrupt remapping
> in 
> that order. The information can be accessed in sysfs at
> '/sys/kernel/debug/intel_iommu/'.

Perhaps you need to switch to SPDX license pointer.
I dunno if Thomas' patch with documentation how to do this made upstream
 / linux-next yet.

> 
> Regards,
> Sohil
> 
> Changes since v3:
>  - Remove an unused function parameter from some of the functions
>  - Fix checkpatch.pl warnings
>  - Remove error reporting for debugfs_create_file functions
>  - Fix unnecessary reprogramming of the context entries
>  - Simplify and merge the show context and extended context patch into
> one
>  - Remove redundant IOMMU null check under for_each_active_iommu
>  - Update the commit title to be consistent
> 
> Changes since v2:
>  - Added a macro for seq file operations based on recommendation by
> Andy 
>Shevchenko. The marco can be moved to seq_file.h at a future point
>  - Changed the debugfs file names to more relevant ones
>  - Added information for MTRR registers in the regset file
> 
> Changes since v1:
>  - Fixed seq_printf formatting
>  - Handled the case when Interrupt remapping is not enabled
> 
> Gayatri Kammela (4):
>   iommu/vt-d: Add debugfs support for Intel IOMMU internals
>   iommu/vt-d: Add debugfs support to show context internals
>   iommu/vt-d: Add debugfs support to show register contents
>   iommu/vt-d: Add debugfs support to show Pasid table contents
> 
> Sohil Mehta (1):
>   iommu/vt-d: Add debugfs support for Interrupt remapping
> 
>  drivers/iommu/Kconfig |  10 ++
>  drivers/iommu/Makefile|   1 +
>  drivers/iommu/intel-iommu-debug.c | 355
> ++
>  drivers/iommu/intel-iommu.c   |  35 +---
>  drivers/iommu/intel-svm.c |   8 -
>  include/linux/intel-iommu.h   |  34 
>  include/linux/intel-svm.h |  10 +-
>  7 files changed, 416 insertions(+), 37 deletions(-)
>  create mode 100644 drivers/iommu/intel-iommu-debug.c
> 

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[PATCH v4 1/5] iommu/vt-d: Add debugfs support for Intel IOMMU internals

2017-12-19 Thread Sohil Mehta 
From: Gayatri Kammela 

Enable Intel IOMMU debug to export Intel IOMMU internals in debugfs

Cc: Sohil Mehta 
Cc: Fenghua Yu 
Cc: Ashok Raj 
Signed-off-by: Jacob Pan 
Signed-off-by: Gayatri Kammela 
---

v4: No change

v3: No change

v2: No change

 drivers/iommu/Kconfig   | 10 ++
 drivers/iommu/intel-iommu.c | 31 +++
 include/linux/intel-iommu.h | 32 
 include/linux/intel-svm.h   |  2 +-
 4 files changed, 46 insertions(+), 29 deletions(-)

diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index f3a2134..d7588ee 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -152,6 +152,16 @@ config INTEL_IOMMU
  and include PCI device scope covered by these DMA
  remapping devices.
 
+config INTEL_IOMMU_DEBUG
+   bool "Export Intel IOMMU internals in DebugFS"
+   depends on INTEL_IOMMU && DEBUG_FS
+   default n
+   help
+ IOMMU internal states such as context, PASID tables can be seen via
+ debugfs. Select this option if you want to export these internals.
+
+ Say Y if you need this.
+
 config INTEL_IOMMU_SVM
bool "Support for Shared Virtual Memory with Intel IOMMU"
depends on INTEL_IOMMU && X86
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 4a2de34..e05b8e0 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -183,16 +183,6 @@ static int rwbf_quirk;
 static int force_on = 0;
 int intel_iommu_tboot_noforce;
 
-/*
- * 0: Present
- * 1-11: Reserved
- * 12-63: Context Ptr (12 - (haw-1))
- * 64-127: Reserved
- */
-struct root_entry {
-   u64 lo;
-   u64 hi;
-};
 #define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))
 
 /*
@@ -218,21 +208,6 @@ static phys_addr_t root_entry_uctp(struct root_entry *re)
 
return re->hi & VTD_PAGE_MASK;
 }
-/*
- * low 64 bits:
- * 0: present
- * 1: fault processing disable
- * 2-3: translation type
- * 12-63: address space root
- * high 64 bits:
- * 0-2: address width
- * 3-6: aval
- * 8-23: domain id
- */
-struct context_entry {
-   u64 lo;
-   u64 hi;
-};
 
 static inline void context_clear_pasid_enable(struct context_entry *context)
 {
@@ -259,7 +234,7 @@ static inline bool __context_present(struct context_entry 
*context)
return (context->lo & 1);
 }
 
-static inline bool context_present(struct context_entry *context)
+bool context_present(struct context_entry *context)
 {
return context_pasid_enabled(context) ?
 __context_present(context) :
@@ -819,7 +794,7 @@ static void domain_update_iommu_cap(struct dmar_domain 
*domain)
domain->iommu_superpage = domain_update_iommu_superpage(NULL);
 }
 
-static inline struct context_entry *iommu_context_addr(struct intel_iommu 
*iommu,
+struct context_entry *iommu_context_addr(struct intel_iommu *iommu,
   u8 bus, u8 devfn, int 
alloc)
 {
struct root_entry *root = >root_entry[bus];
@@ -5208,7 +5183,7 @@ static void intel_iommu_put_resv_regions(struct device 
*dev,
 
 #ifdef CONFIG_INTEL_IOMMU_SVM
 #define MAX_NR_PASID_BITS (20)
-static inline unsigned long intel_iommu_get_pts(struct intel_iommu *iommu)
+unsigned long intel_iommu_get_pts(struct intel_iommu *iommu)
 {
/*
 * Convert ecap_pss to extend context entry pts encoding, also
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index f3274d9..b8591dc 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -383,6 +383,33 @@ struct pasid_entry;
 struct pasid_state_entry;
 struct page_req_dsc;
 
+/*
+ * 0: Present
+ * 1-11: Reserved
+ * 12-63: Context Ptr (12 - (haw-1))
+ * 64-127: Reserved
+ */
+struct root_entry {
+   u64 lo;
+   u64 hi;
+};
+
+/*
+ * low 64 bits:
+ * 0: present
+ * 1: fault processing disable
+ * 2-3: translation type
+ * 12-63: address space root
+ * high 64 bits:
+ * 0-2: address width
+ * 3-6: aval
+ * 8-23: domain id
+ */
+struct context_entry {
+   u64 lo;
+   u64 hi;
+};
+
 struct intel_iommu {
void __iomem*reg; /* Pointer to hardware regs, virtual addr */
u64 reg_phys; /* physical address of hw register set */
@@ -488,8 +515,13 @@ struct intel_svm {
 
 extern int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct 
intel_svm_dev *sdev);
 extern struct intel_iommu *intel_svm_device_to_iommu(struct device *dev);
+extern unsigned long intel_iommu_get_pts(struct intel_iommu *iommu);
 #endif
 
 extern const struct attribute_group *intel_iommu_groups[];
+extern void intel_iommu_debugfs_init(void);
+extern bool context_present(struct context_entry *context);
+extern struct context_entry *iommu_context_addr(struct intel_iommu *iommu,
+

[PATCH v4 3/5] iommu/vt-d: Add debugfs support to show register contents

2017-12-19 Thread Sohil Mehta 
From: Gayatri Kammela 

Debugfs extension to dump all the register contents for each IOMMU
device to the user space via debugfs.

example:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/iommu_regset

DMAR: dmar1: reg_base_addr fed9
Name Offset Contents
VER  0x00   0x0010
CAP  0x08   0x01cc40660462
ECAP 0x10   0x019e2ff0505e
GCMD 0x18   0x
GSTS 0x1c   0xc700
RTADDR   0x20   0x0004558d6800
CCMD 0x28   0x0800
FSTS 0x34   0x
FECTL0x38   0x
FEDATA   0x3c   0xfee0100c4141

Cc: Sohil Mehta 
Cc: Fenghua Yu 
Cc: Jacob Pan 
Cc: Ashok Raj 
Signed-off-by: Gayatri Kammela 
---

v4: Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Remove redundant IOMMU null check under for_each_active_iommu

v3: Use a macro for seq file operations 
Change the intel_iommu_regset file name to iommu_regset
Add information for MTRR registers

v2: Fix seq_printf formatting

 drivers/iommu/intel-iommu-debug.c | 78 +++
 include/linux/intel-iommu.h   |  2 +
 2 files changed, 80 insertions(+)

diff --git a/drivers/iommu/intel-iommu-debug.c 
b/drivers/iommu/intel-iommu-debug.c
index fa458904..c45c0f6 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -132,6 +132,81 @@ static int dmar_translation_struct_show(struct seq_file 
*m, void *unused)
 
 DEFINE_SHOW_ATTRIBUTE(dmar_translation_struct);
 
+static int iommu_regset_show(struct seq_file *m, void *unused)
+{
+   struct dmar_drhd_unit *drhd;
+   struct intel_iommu *iommu;
+   unsigned long long base;
+   int i;
+   struct regset {
+   int offset;
+   char *regs;
+   };
+
+   static const struct regset regstr[] = {{DMAR_VER_REG, "VER"},
+  {DMAR_CAP_REG, "CAP"},
+  {DMAR_ECAP_REG, "ECAP"},
+  {DMAR_GCMD_REG, "GCMD"},
+  {DMAR_GSTS_REG, "GSTS"},
+  {DMAR_RTADDR_REG, "RTADDR"},
+  {DMAR_CCMD_REG, "CCMD"},
+  {DMAR_FSTS_REG, "FSTS"},
+  {DMAR_FECTL_REG, "FECTL"},
+  {DMAR_FEDATA_REG, "FEDATA"},
+  {DMAR_FEADDR_REG, "FEADDR"},
+  {DMAR_FEUADDR_REG, "FEUADDR"},
+  {DMAR_AFLOG_REG, "AFLOG"},
+  {DMAR_PMEN_REG, "PMEN"},
+  {DMAR_PLMBASE_REG, "PLMBASE"},
+  {DMAR_PLMLIMIT_REG, "PLMLIMIT"},
+  {DMAR_PHMBASE_REG, "PHMBASE"},
+  {DMAR_PHMLIMIT_REG,  "PHMLIMIT"},
+  {DMAR_IQH_REG, "IQH"},
+  {DMAR_IQT_REG, "IQT"},
+  {DMAR_IQ_SHIFT, "IQ"},
+  {DMAR_IQA_REG, "IQA"},
+  {DMAR_ICS_REG, "ICS"},
+  {DMAR_IRTA_REG, "IRTA"},
+  {DMAR_PQH_REG, "PQH"},
+  {DMAR_PQT_REG, "PQT"},
+  {DMAR_PQA_REG, "PQA"},
+  {DMAR_PRS_REG, "PRS"},
+  {DMAR_PECTL_REG, "PECTL"},
+  {DMAR_PEDATA_REG, "PEDATA"},
+  {DMAR_PEADDR_REG, "PEADDR"},
+  {DMAR_PEUADDR_REG, "PEUADDR"},
+  {DMAR_MTRRCAP_REG, "MTRRCAP"},
+  {DMAR_MTRRDEF_REG, "MTRRDEF"} };
+
+   rcu_read_lock();
+   for_each_active_iommu(iommu, drhd) {
+   if (!drhd->reg_base_addr) {
+   seq_puts(m, "IOMMU: Invalid base address\n");
+   rcu_read_unlock();
+   return -EINVAL;
+   }
+
+   base = drhd->reg_base_addr;
+   seq_printf(m, "\nDMAR: %s: reg_base_addr %llx\n", iommu->name,
+

[PATCH v4 2/5] iommu/vt-d: Add debugfs support to show context internals

2017-12-19 Thread Sohil Mehta 
From: Gayatri Kammela 

IOMMU internals states such as root and context can be exported to the
userspace.

Example of such dump in Kabylake:

root@OTC-KBLH-01:~# cat
/sys/kernel/debug/intel_iommu/dmar_translation_struct

IOMMU dmar0: Extended Root Table Addr:402b9e800
Extended Root table entries:
Bus 0 L: 402150001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[80]:00:0a.00   40214fa05   102
Higher Context table entries for Bus: 0
[80]:00:0a.00   4026c   0

IOMMU dmar1:Root Table Addr:4558a3000
 Root tbl entries:
Bus 0 L: 4558aa001 H: 0
 Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[160]   :00:14.00   4558a9001   102
[184]   :00:17.00   400eac001   302
[248]   :00:1f.00   4558af001   202
[251]   :00:1f.03   40070e001   502
[254]   :00:1f.06   4467c9001   602
 Root tbl entries:
Bus 1 L: 3fc8c2001 H: 0
 Context table entries for Bus: 1
[entry] DID :B :D .FLow High
[0] :01:00.00   3fc8c3001   402

Cc: Sohil Mehta 
Cc: Fenghua Yu 
Cc: Ashok Raj 
Signed-off-by: Jacob Pan 
Signed-off-by: Gayatri Kammela 
---

v4: Remove the unused function parameter
Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Fix unnecessary reprogramming of the context entries
Simplify and merge the show context and extended context patch into one
Remove redundant IOMMU null check under for_each_active_iommu

v3: Add a macro for seq file operations 
Change the intel_iommu_ctx file name to dmar_translation_struct

v2: No change

 drivers/iommu/Makefile|   1 +
 drivers/iommu/intel-iommu-debug.c | 146 ++
 drivers/iommu/intel-iommu.c   |   4 ++
 3 files changed, 151 insertions(+)
 create mode 100644 drivers/iommu/intel-iommu-debug.c

diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index 1fb6958..fdbaf46 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ARM_SMMU) += arm-smmu.o
 obj-$(CONFIG_ARM_SMMU_V3) += arm-smmu-v3.o
 obj-$(CONFIG_DMAR_TABLE) += dmar.o
 obj-$(CONFIG_INTEL_IOMMU) += intel-iommu.o
+obj-$(CONFIG_INTEL_IOMMU_DEBUG) += intel-iommu-debug.o
 obj-$(CONFIG_INTEL_IOMMU_SVM) += intel-svm.o
 obj-$(CONFIG_IPMMU_VMSA) += ipmmu-vmsa.o
 obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o
diff --git a/drivers/iommu/intel-iommu-debug.c 
b/drivers/iommu/intel-iommu-debug.c
new file mode 100644
index 000..fa458904
--- /dev/null
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -0,0 +1,146 @@
+/*
+ * Copyright © 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * Authors: Gayatri Kammela 
+ *  Jacob Pan 
+ *
+ */
+
+#define pr_fmt(fmt) "INTEL_IOMMU: " fmt
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "irq_remapping.h"
+
+#define TOTAL_BUS_NR (256) /* full bus range 256 */
+#define DEFINE_SHOW_ATTRIBUTE(__name)  \
+static int __name ## _open(struct inode *inode, struct file *file) \
+{  \
+   return single_open(file, __name ## _show, inode->i_private);\
+}  \
+static const struct file_operations __name ## _fops =  \
+{  \
+   .open   = __name ## _open,  \
+   .read   = seq_read, \
+   .llseek = seq_lseek,\
+   .release= single_release,   \
+   .owner  = THIS_MODULE,  \
+}
+
+static void ctx_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu,
+  int bus, bool ext, bool new_ext)
+{
+   struct context_entry *context;
+   int ctx;
+   unsigned long flags;
+
+   seq_printf(m, "%s Context table entries for Bus: %d\n",
+  ext ? "Lower" : "", bus);
+   seq_puts(m, "[entry]\tDID :B :D .F\tLow\t\tHigh\n");
+
+

[PATCH v4 5/5] iommu/vt-d: Add debugfs support for Interrupt remapping

2017-12-19 Thread Sohil Mehta 
Debugfs extension for Intel IOMMU to dump Interrupt remapping table
entries for Interrupt remapping and Interrupt posting.

The file /sys/kernel/debug/intel_iommu/ir_translation_struct provides
detailed information, such as Index, Source Id, Destination Id, Vector
and the raw values for entries with the present bit set, in the format
shown.

Remapped Interrupt supported on IOMMU: dmar5
 IR table address:93e09d54c310
---
 Index  SID  Dest_ID  Vct Raw_value_high   Raw_value_low
 1  3a00 0600 2c  00043a00 062c0009
 1114301 0900 a2  00044301 09a20009

Posted Interrupt supported on IOMMU: dmar5
 IR table address:93e09d54c310

 Index  SID  PDA_high PDA_low  Vct Raw_value_high   Raw_value_low
 4  4300 0010 40c7c880 41  00144300 40c7c88000418001
 5  4300 0010 40c7c880 51  00144300 40c7c88000518001

Cc: Gayatri Kammela 
Cc: Jacob Pan 
Cc: Fenghua Yu 
Cc: Ashok Raj 
Signed-off-by: Sohil Mehta 
---

v4: Remove the unused function parameter
Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Remove redundant IOMMU null check under for_each_active_iommu

v3: Use a macro for seq file operations 
Change the intel_iommu_interrupt_remap file name to ir_translation_struct

v2: Handle the case when IR is not enabled. Fix seq_printf formatting

 drivers/iommu/intel-iommu-debug.c | 100 ++
 1 file changed, 100 insertions(+)

diff --git a/drivers/iommu/intel-iommu-debug.c 
b/drivers/iommu/intel-iommu-debug.c
index c751d53..12a7c04 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -12,6 +12,7 @@
  *
  * Authors: Gayatri Kammela 
  *  Jacob Pan 
+ *  Sohil Mehta 
  *
  */
 
@@ -238,6 +239,100 @@ static int iommu_regset_show(struct seq_file *m, void 
*unused)
 
 DEFINE_SHOW_ATTRIBUTE(iommu_regset);
 
+#ifdef CONFIG_IRQ_REMAP
+static void ir_tbl_remap_entry_show(struct seq_file *m,
+   struct intel_iommu *iommu)
+{
+   int idx;
+   struct irte *ri_entry;
+
+   /* Print the header only once */
+   seq_puts(m, " Index  SID  Dest_ID  Vct Raw_value_high   
Raw_value_low\n");
+
+   for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+   ri_entry = >ir_table->base[idx];
+   if (!ri_entry->present || ri_entry->p_pst)
+   continue;
+   seq_printf(m, " %d\t%04x %08x %02x  %016llx %016llx\n", idx,
+  ri_entry->sid, ri_entry->dest_id, ri_entry->vector,
+  ri_entry->high, ri_entry->low);
+   }
+}
+
+static void ir_tbl_posted_entry_show(struct seq_file *m,
+struct intel_iommu *iommu)
+{
+   int idx;
+   struct irte *pi_entry;
+
+   /* Print the header only once */
+   seq_puts(m, " Index  SID  PDA_high PDA_low  Vct Raw_value_high   
Raw_value_low\n");
+
+   for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+   pi_entry = >ir_table->base[idx];
+   if (!pi_entry->present || !pi_entry->p_pst)
+   continue;
+   seq_printf(m, " %d\t%04x %08x %08x %02x  %016llx %016llx\n",
+  idx, pi_entry->sid, pi_entry->pda_h,
+  (pi_entry->pda_l)<<6, pi_entry->vector,
+  pi_entry->high, pi_entry->low);
+   }
+}
+
+/*
+ * For active IOMMUs go through the Interrupt remapping
+ * table and print valid entries in a table format for
+ * Remapped and Posted Interrupts.
+ */
+static int ir_translation_struct_show(struct seq_file *m, void *unused)
+{
+   struct dmar_drhd_unit *drhd;
+   struct intel_iommu *iommu;
+
+   rcu_read_lock();
+   for_each_active_iommu(iommu, drhd) {
+   if (!ecap_ir_support(iommu->ecap))
+   continue;
+
+   seq_printf(m, "\nRemapped Interrupt supported on IOMMU: %s\n"
+  " IR table address:%p\n", iommu->name,
+  iommu->ir_table);
+
+   seq_puts(m, "---"
+"\n");
+
+   if (iommu->ir_table)
+   ir_tbl_remap_entry_show(m, iommu);
+   else
+   seq_puts(m, "Interrupt Remapping is not enabled\n");
+   }
+
+   seq_puts(m, "\n\t\t\t\t\t\t\t\n");
+
+   for_each_active_iommu(iommu, drhd) {
+   if (!cap_pi_support(iommu->cap))
+

[PATCH v4 4/5] iommu/vt-d: Add debugfs support to show Pasid table contents

2017-12-19 Thread Sohil Mehta 
From: Gayatri Kammela 

Debugfs extension to dump the internals such as pasid table entries for
each IOMMU to the userspace.

Example of such dump in Kabylake:

root@OTC-KBLH-01:~# cat
/sys/kernel/debug/intel_iommu/dmar_translation_struct

IOMMU dmar0: Extended Root Table Addr:402b9e800
Extended Root table entries:
Bus 0 L: 402150001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[80]:00:0a.00   40214fa05   102
Higher Context table entries for Bus: 0
[80]:00:0a.00   4026c   0
Pasid Table Addr : 8e2d4260
Pasid table entries for domain 0:
[Entry] Contents
[0] 12c409801

Cc: Sohil Mehta 
Cc: Fenghua Yu 
Cc: Jacob Pan 
Cc: Ashok Raj 
Signed-off-by: Gayatri Kammela 
---

v4: Remove the unused function parameter
Fix checkpatch.pl warnings

v3: No change

v2: Fix seq_printf formatting

 drivers/iommu/intel-iommu-debug.c | 31 +++
 drivers/iommu/intel-svm.c |  8 
 include/linux/intel-svm.h |  8 
 3 files changed, 39 insertions(+), 8 deletions(-)

diff --git a/drivers/iommu/intel-iommu-debug.c 
b/drivers/iommu/intel-iommu-debug.c
index c45c0f6..c751d53 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -46,6 +46,36 @@ static const struct file_operations __name ## _fops =
\
.owner  = THIS_MODULE,  \
 }
 
+#ifdef CONFIG_INTEL_IOMMU_SVM
+static void pasid_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu)
+{
+   int pasid_size = 0, i;
+
+   if (ecap_pasid(iommu->ecap)) {
+   pasid_size = intel_iommu_get_pts(iommu);
+   seq_printf(m, "Pasid Table Addr : %p\n", iommu->pasid_table);
+
+   if (iommu->pasid_table) {
+   seq_printf(m, "Pasid table entries for domain %d:\n",
+  iommu->segment);
+   seq_puts(m, "[Entry]\t\tContents\n");
+
+   /* Publish the pasid table entries here */
+   for (i = 0; i < pasid_size; i++) {
+   if (!iommu->pasid_table[i].val)
+   continue;
+   seq_printf(m, "[%d]\t\t%04llx\n", i,
+  iommu->pasid_table[i].val);
+   }
+   }
+   }
+}
+#else /* CONFIG_INTEL_IOMMU_SVM */
+static void pasid_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu)
+{
+}
+#endif /* CONFIG_INTEL_IOMMU_SVM */
+
 static void ctx_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu,
   int bus, bool ext, bool new_ext)
 {
@@ -79,6 +109,7 @@ static void ctx_tbl_entry_show(struct seq_file *m, struct 
intel_iommu *iommu,
}
}
}
+   pasid_tbl_entry_show(m, iommu);
 out:
spin_unlock_irqrestore(>lock, flags);
 }
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
index ed1cf7c..c646724 100644
--- a/drivers/iommu/intel-svm.c
+++ b/drivers/iommu/intel-svm.c
@@ -28,14 +28,6 @@
 
 static irqreturn_t prq_event_thread(int irq, void *d);
 
-struct pasid_entry {
-   u64 val;
-};
-
-struct pasid_state_entry {
-   u64 val;
-};
-
 int intel_svm_alloc_pasid_tables(struct intel_iommu *iommu)
 {
struct page *pages;
diff --git a/include/linux/intel-svm.h b/include/linux/intel-svm.h
index 733eaf9..a8abad6 100644
--- a/include/linux/intel-svm.h
+++ b/include/linux/intel-svm.h
@@ -18,6 +18,14 @@
 
 struct device;
 
+struct pasid_entry {
+   u64 val;
+};
+
+struct pasid_state_entry {
+   u64 val;
+};
+
 struct svm_dev_ops {
void (*fault_cb)(struct device *dev, int pasid, u64 address,
 u32 private, int rwxp, int response);
-- 
2.7.4

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Re: [PATCH V1 1/1] iommu: Make sure device's ID array elements are unique

2017-12-19 Thread Alex Williamson 
On Tue, 19 Dec 2017 16:20:21 +0100
Tomasz Nowicki  wrote:

> While iterating over DMA aliases for a PCI device, for some rare cases
> (i.e. PCIe-to-PCI/X bridges) we may get exactly the same ID as initial child
> device. In turn, the same ID may get registered for a device multiple times.
> Eventually IOMMU  driver may try to configure the same ID within domain
> multiple times too which for some IOMMU drivers is illegal and causes kernel
> panic.
> 
> Rule out ID duplication prior to device ID array registration.
> 
> CC: sta...@vger.kernel.org# v4.14+

You've identified a release, is there a specific commit this fixes?

> Signed-off-by: Tomasz Nowicki 
> ---
>  drivers/iommu/iommu.c | 28 
>  1 file changed, 28 insertions(+)
> 
> diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
> index 3de5c0b..9b2c138 100644
> --- a/drivers/iommu/iommu.c
> +++ b/drivers/iommu/iommu.c
> @@ -1945,6 +1945,31 @@ void iommu_fwspec_free(struct device *dev)
>  }
>  EXPORT_SYMBOL_GPL(iommu_fwspec_free);
>  
> +static void iommu_fwspec_remove_ids_dup(struct device *dev, u32 *ids,
> + int *num_ids)
> +{
> + struct iommu_fwspec *fwspec = dev->iommu_fwspec;
> + int i, j, k, valid_ids = *num_ids;
> +
> + for (i = 0; i < valid_ids; i++) {
> + for (j = 0; j < fwspec->num_ids; j++) {
> + if (ids[i] != fwspec->ids[j])
> + continue;
> +
> + dev_info(dev, "found 0x%x ID duplication, skipped\n",
> +  ids[i]);
> +
> + for (k = i + 1; k < valid_ids; k++)
> + ids[k - 1] = ids[k];

Use memmove()?

> +
> + valid_ids--;
> + break;

At this point ids[i] is not the ids[i] that we tested for dupes, it's
what was ids[i + 1], but we're going to i++ on the next iteration and
we therefore never test that entry.

> + }
> + }
> +
> + *num_ids = valid_ids;
> +}
> +
>  int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids)
>  {
>   struct iommu_fwspec *fwspec = dev->iommu_fwspec;
> @@ -1954,6 +1979,9 @@ int iommu_fwspec_add_ids(struct device *dev, u32 *ids, 
> int num_ids)
>   if (!fwspec)
>   return -EINVAL;
>  
> + /* Rule out IDs already registered */
> + iommu_fwspec_remove_ids_dup(dev, ids, _ids);
> +
>   size = offsetof(struct iommu_fwspec, ids[fwspec->num_ids + num_ids]);
>   if (size > sizeof(*fwspec)) {
>   fwspec = krealloc(dev->iommu_fwspec, size, GFP_KERNEL);

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Re: [PATCH V1 0/1] Fix kernel panic caused by device ID duplication presented to the IOMMU

2017-12-19 Thread Robin Murphy 

Hi Tomasz,

On 19/12/17 15:13, Tomasz Nowicki wrote:

Here is my lspci output of ThunderX2 for which I am observing kernel panic 
coming from
SMMUv3 driver -> arm_smmu_write_strtab_ent() -> BUG_ON(ste_live):

# lspci -vt
-[:00]-+-00.0-[01-1f]--+ [...]
+ [...]
\-00.0-[1e-1f]00.0-[1f]00.0  ASPEED 
Technology, Inc. ASPEED Graphics Family

ASP device -> 1f:00.0 VGA compatible controller: ASPEED Technology, Inc. ASPEED 
Graphics Family
PCI-Express to PCI/PCI-X Bridge -> 1e:00.0 PCI bridge: ASPEED Technology, Inc. 
AST1150 PCI-to-PCI Bridge

While setting up ASP device SID in IORT dirver:

iort_iommu_configure() -> pci_for_each_dma_alias()
we need to walk up and iterate over each device which alias transaction from
downstream devices.

AST device (1f:00.0) gets BDF=0x1f00 and corresponding SID=0x1f00 from IORT.
Bridge (1e:00.0) is the first alias. Following PCI Express to PCI/PCI-X Bridge
spec: PCIe-to-PCI/X bridges alias transactions from downstream devices using
the subordinate bus number. For bridge (1e:00.0), the subordinate is equal
to 0x1f. This gives BDF=0x1f00 and SID=1f00 which is the same as downstream
device. So it is possible to have two identical SIDs. The question is what we
should do about such case. Presented patch prevents from registering the same
ID so that SMMUv3 is not complaining later on.


Ooh, subtle :( There is logic in arm_smmu_attach_device() to tolerate
grouped devices aliasing to the same ID, but I guess I overlooked the
distinction of a device sharing an alias ID with itself. I'm not sure
I really like trying to work around this in generic code, since
fwspec->ids is essentially opaque data in a driver-specific format - in
theory a driver is free to encode a single logical ID into multiple
fwspec elements (I think I did that in an early draft of SMMUv2 SMR
support), at which point this approach might corrupt things massively.

Does the (untested) diff below suffice?

Robin.

->8-diff --git a/drivers/iommu/arm-smmu-v3.c 
b/drivers/iommu/arm-smmu-v3.c

index f122071688fd..d8a730d83401 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -1731,7 +1731,7 @@ static __le64 *arm_smmu_get_step_for_sid(struct 
arm_smmu_device *smmu, u32 sid)


 static void arm_smmu_install_ste_for_dev(struct iommu_fwspec *fwspec)
 {
-   int i;
+   int i, j;
struct arm_smmu_master_data *master = fwspec->iommu_priv;
struct arm_smmu_device *smmu = master->smmu;

@@ -1739,6 +1739,13 @@ static void arm_smmu_install_ste_for_dev(struct 
iommu_fwspec *fwspec)

u32 sid = fwspec->ids[i];
__le64 *step = arm_smmu_get_step_for_sid(smmu, sid);

+   /* Bridged PCI devices may end up with duplicated IDs */
+   for (j = 0; j < i; j++)
+   if (fwspec->ids[j] == sid)
+   break;
+   if (j < i)
+   continue;
+
arm_smmu_write_strtab_ent(smmu, sid, step, >ste);
}
 }
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[PATCH V1 1/1] iommu: Make sure device's ID array elements are unique

2017-12-19 Thread Tomasz Nowicki 
While iterating over DMA aliases for a PCI device, for some rare cases
(i.e. PCIe-to-PCI/X bridges) we may get exactly the same ID as initial child
device. In turn, the same ID may get registered for a device multiple times.
Eventually IOMMU  driver may try to configure the same ID within domain
multiple times too which for some IOMMU drivers is illegal and causes kernel
panic.

Rule out ID duplication prior to device ID array registration.

CC: sta...@vger.kernel.org  # v4.14+
Signed-off-by: Tomasz Nowicki 
---
 drivers/iommu/iommu.c | 28 
 1 file changed, 28 insertions(+)

diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index 3de5c0b..9b2c138 100644
--- a/drivers/iommu/iommu.c
+++ b/drivers/iommu/iommu.c
@@ -1945,6 +1945,31 @@ void iommu_fwspec_free(struct device *dev)
 }
 EXPORT_SYMBOL_GPL(iommu_fwspec_free);
 
+static void iommu_fwspec_remove_ids_dup(struct device *dev, u32 *ids,
+   int *num_ids)
+{
+   struct iommu_fwspec *fwspec = dev->iommu_fwspec;
+   int i, j, k, valid_ids = *num_ids;
+
+   for (i = 0; i < valid_ids; i++) {
+   for (j = 0; j < fwspec->num_ids; j++) {
+   if (ids[i] != fwspec->ids[j])
+   continue;
+
+   dev_info(dev, "found 0x%x ID duplication, skipped\n",
+ids[i]);
+
+   for (k = i + 1; k < valid_ids; k++)
+   ids[k - 1] = ids[k];
+
+   valid_ids--;
+   break;
+   }
+   }
+
+   *num_ids = valid_ids;
+}
+
 int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids)
 {
struct iommu_fwspec *fwspec = dev->iommu_fwspec;
@@ -1954,6 +1979,9 @@ int iommu_fwspec_add_ids(struct device *dev, u32 *ids, 
int num_ids)
if (!fwspec)
return -EINVAL;
 
+   /* Rule out IDs already registered */
+   iommu_fwspec_remove_ids_dup(dev, ids, _ids);
+
size = offsetof(struct iommu_fwspec, ids[fwspec->num_ids + num_ids]);
if (size > sizeof(*fwspec)) {
fwspec = krealloc(dev->iommu_fwspec, size, GFP_KERNEL);
-- 
2.7.4

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[PATCH V1 0/1] Fix kernel panic caused by device ID duplication presented to the IOMMU

2017-12-19 Thread Tomasz Nowicki 
Here is my lspci output of ThunderX2 for which I am observing kernel panic 
coming from
SMMUv3 driver -> arm_smmu_write_strtab_ent() -> BUG_ON(ste_live):

# lspci -vt
-[:00]-+-00.0-[01-1f]--+ [...]
   + [...]
   \-00.0-[1e-1f]00.0-[1f]00.0  ASPEED 
Technology, Inc. ASPEED Graphics Family

ASP device -> 1f:00.0 VGA compatible controller: ASPEED Technology, Inc. ASPEED 
Graphics Family
PCI-Express to PCI/PCI-X Bridge -> 1e:00.0 PCI bridge: ASPEED Technology, Inc. 
AST1150 PCI-to-PCI Bridge
   
While setting up ASP device SID in IORT dirver:
iort_iommu_configure() -> pci_for_each_dma_alias()
we need to walk up and iterate over each device which alias transaction from
downstream devices.

AST device (1f:00.0) gets BDF=0x1f00 and corresponding SID=0x1f00 from IORT.
Bridge (1e:00.0) is the first alias. Following PCI Express to PCI/PCI-X Bridge
spec: PCIe-to-PCI/X bridges alias transactions from downstream devices using
the subordinate bus number. For bridge (1e:00.0), the subordinate is equal
to 0x1f. This gives BDF=0x1f00 and SID=1f00 which is the same as downstream
device. So it is possible to have two identical SIDs. The question is what we
should do about such case. Presented patch prevents from registering the same
ID so that SMMUv3 is not complaining later on.

Tomasz Nowicki (1):
  iommu: Make sure device's ID array elements are unique

 drivers/iommu/iommu.c | 28 
 1 file changed, 28 insertions(+)

-- 
2.7.4

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