Hi,
Committed fsf-trunk r227677, fsf-5 r227678.
Kind regards,
Alex
On 18/08/15 10:45, Marcus Shawcroft wrote:
On 18 August 2015 at 10:25, Alex Velenko wrote:
On 31/07/15 12:04, Alex Velenko wrote:
On 29/07/15 23:14, Jeff Law wrote:
On 07/28/2015 12:18 PM, Alex Velenko wrote:
On 21/04/15 06:27, Jeff Law wrote:
On 04/20/2015 01:09 AM, Shiva Chen
On 31/07/15 12:04, Alex Velenko wrote:
On 29/07/15 23:14, Jeff Law wrote:
On 07/28/2015 12:18 PM, Alex Velenko wrote:
On 21/04/15 06:27, Jeff Law wrote:
On 04/20/2015 01:09 AM, Shiva Chen wrote:
Hi, Jeff
Thanks for your advice.
can_replace_by.patch is the new patch to handle both cases
On 29/07/15 23:14, Jeff Law wrote:
On 07/28/2015 12:18 PM, Alex Velenko wrote:
On 21/04/15 06:27, Jeff Law wrote:
On 04/20/2015 01:09 AM, Shiva Chen wrote:
Hi, Jeff
Thanks for your advice.
can_replace_by.patch is the new patch to handle both cases.
pr43920-2.c.244r.jump2.ori is the
On 21/04/15 06:27, Jeff Law wrote:
On 04/20/2015 01:09 AM, Shiva Chen wrote:
Hi, Jeff
Thanks for your advice.
can_replace_by.patch is the new patch to handle both cases.
pr43920-2.c.244r.jump2.ori is the original jump2 rtl dump
pr43920-2.c.244r.jump2.patch_can_replace_by is the jump2 rtl du
Alex Velenko
* gcc.dg/sibcall-3.c (dg-skip-if): Skip if arm_thumb1.
* gcc.dg/sibcall-4.c (dg-skip-if): Likewise.
gcc/
2015-07-28 Alex Velenko
* doc/sourcebuild.texi (arm_thumb1): Documented.
(arm-thumb2): Likewise.
---
gcc/doc/sourcebuild.texi | 8
.
Is patch ok for trunk and fsf-5?
gcc/testsuite
2015-07-23 Alex Velenko
* gcc.target/arm/pr63210.c (dg-skip-if): Skip armv4t.
(dg-additional-options): Add -march=armv5t if arm_arch_v5t_ok.
---
gcc/testsuite/gcc.target/arm/pr63210.c | 2 ++
1 file changed, 2 insertions
On 21/07/15 15:05, Kyrill Tkachov wrote:
On 21/07/15 15:04, Kyrill Tkachov wrote:
On 21/07/15 14:38, Alex Velenko wrote:
Hi,
This patch fixes testcase thumb-bitfld1.c to be compiled without specifying C
standard.
Is patch ok for trunk and fsf-5?
gcc/testsuite
2015-07-21 Alex Velenko
Hi,
This patch fixes testcase thumb-bitfld1.c to be compiled without specifying C
standard.
Is patch ok for trunk and fsf-5?
gcc/testsuite
2015-07-21 Alex Velenko
* gcc.target/arm/thumb-bitfld1.c (foo): Return type fixed.
---
gcc/testsuite/gcc.target/arm/thumb-bitfld1.c | 2 ++
1
On 25/06/15 14:35, Ramana Radhakrishnan wrote:
On Mon, Jun 22, 2015 at 5:56 PM, Alex Velenko wrote:
On 20/05/15 21:14, Joseph Myers wrote:
Again, the condition you propose to add doesn't make sense. arm_arch_X_ok
is only appropriate for tests using an explicit -march=X. Testing with
-
Hi,
I adjusted the patch to skip execution split-live-ranges-for-shrink-wrap.c
with explicitly specified -march=armv4t and provide -march=armv5t flag =
for
arm_arch_v5t_ok targets.
Is patch ok?
Alex
gcc/testsuite
2015-06-22 Alex Velenko
* gcc.target/arm/split-live-ranges-for-s
On 01/06/15 10:50, Ramana Radhakrishnan wrote:
On 01/06/15 10:48, Alex Velenko wrote:
Hi,
This patch fix thumb-ltu.c to pass excess error test.
Without default -std=gnu90 flag, this testcase started failing
as some functions were called before being predefined.
Is patch ok?
gcc/testsuite
Hi,
This patch fix thumb-ltu.c to pass excess error test.
Without default -std=gnu90 flag, this testcase started failing
as some functions were called before being predefined.
Is patch ok?
gcc/testsuite
2015-06-01 Alex Velenko
* gcc.target/arm/thumb-ltu.c (foo): Predefined
/testsuite
2015-05-20 Alex Velenko
* gcc.target/arm/split-live-ranges-for-shrink-wrap.c (dg-skip-if):
Skip armv4t, armv7-a and later.
---
gcc/testsuite/gcc.target/arm/split-live-ranges-for-shrink-wrap.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/testsuite/gcc.target
Hi,
This patch prevents arm_thumb1_ok XPASS in sibcall-3.c and sibcall-4.c
testcases. Sibcalls are not ok for Thumb1 and testcases need to be fixed.
Is patch ok?
gcc/testsuite
2015-05-20 Alex Velenko
* gcc.dg/sibcall-3.c (dg-skip-if): Skip if arm_thumb1_ok.
* gcc.dg/sibcall
Committed r223295.
Alex.
Hi,
This patch fixes testcase thumb1-far-jump-2.c to confirm to newer compilation
defaults.
Is patch ok?
gcc/testsuite
2015-05-15 Alex Velenko
* gcc.target/arm/thumb1-far-jump-2.c (r4): Added int in definition.
---
gcc/testsuite/gcc.target/arm/thumb1-far-jump-2.c | 2 +-
1 file
Thumb2 to be
const int, as bics shifted by register is not supported by
Thumb2.
Is patch ok?
gcc
2015-05-15 Alex Velenko
* config/arm/arm.md (andsi_not_shiftsi_si_scc): New pattern.
* (andsi_not_shiftsi_si_scc_no_reuse): New pattern.
gcc/testsuite
2015-05-15 Alex Velenko
On 24/04/15 16:41, Alex Velenko wrote:
Hi,
This patch adds rtl patterns to generate bics instructions with shift.
Added attribute predicable_short_it since last respin.
Done full regression run on arm-none-eabi and arm-none-gnueabihf.
Bootstrapped on arm-none-gnueabihf.
Is this patch ok
Hi,
This patch adds rtl patterns to generate bics instructions with shift.
Added attribute predicable_short_it since last respin.
Done full regression run on arm-none-eabi and arm-none-gnueabihf.
Bootstrapped on arm-none-gnueabihf.
Is this patch ok?
gcc/config
2015-04-24 Alex Velenko
On 24/04/15 02:16, Jeff Law wrote:
On 04/10/2015 03:14 AM, Alex Velenko wrote:
On 09/03/15 17:40, Jeff Law wrote:
On 03/09/15 03:53, Steven Bosscher wrote:
On Wed, Mar 4, 2015 at 12:09 PM, Alex Velenko wrote:
For example, in arm testcase pr43920-2.c, CSE previously decided not
to put
an
Hi,
This patch adds arm rtl patterns to generate bics instructions with shift.
Done full regression run on arm-none-eabi.
Is patch ok?
gcc/config
2015-04-22 Alex Velenko
* arm/arm.md (andsi_not_shiftsi_si_scc): New pattern.
* (andsi_not_shiftsi_si_scc_no_reuse): New pattern.
gcc
On 31/03/15 15:30, Richard Earnshaw wrote:
On 04/03/15 11:13, Alex Velenko wrote:
Hi,
This patch fixes arm pr45701 scan assembly tests. Those test register r3 being
used to maintain stack double word alignment. Recent optimizations reduced
number of local variables needed in those tests
On 04/03/15 11:13, Alex Velenko wrote:
Hi,
This patch fixes arm pr45701 scan assembly tests. Those test register r3 being
used to maintain stack double word alignment. Recent optimizations reduced
number of local variables needed in those tests, removing necessity to push r3.
Testcase fixed by
On 02/03/15 18:43, Aldy Hernandez wrote:
TYPE_BINFO is null when no optimization is used, but odr_violated is unset.
Fixed and approved in the PR by Honza.
Tested on x86-64 Linux.
Committed to mainline.
Hi,
I believe your testcase does not work for arm-none-eabi:
Executing on host: /arm-no
On 05/03/15 15:28, Ramana Radhakrishnan wrote:
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 7bf5b4d..777230e 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -6392,14 +6392,8 @@ arm_set_default_type_attributes (tree type)
static bool
arm_function_in_section
On 03/03/15 15:58, Alex Velenko wrote:
On 19/02/15 17:26, Richard Henderson wrote:
On 02/19/2015 09:08 AM, Alex Velenko wrote:
Your suggestion seem to fix gcc.target/arm/long-calls-1.c, but has
to be
thoroughly tested.
Before you do complete testing, please also delete the TREE_STATIC test
patch OK?
2015-03-04 Alex Velenko
gcc/testsuite
* gcc.target/arm/pr45701-1.c (history_expand_line_internal): Add an
extra variable to force stack alignment.
* gcc.target/arm/pr45701-2.c (history_expand_line_internal): Add an
extra variable to force stack alignment
additional checks in Jump2
and, if any, other passes, as I think it is more uniform solution and allows
single point fix. Downside is having more notes.
Done full regression run on arm-none-eabi and bootstrapped on x86.
Is patch ok?
gcc/
2015-03-04 Alex Velenko
* cse.c (cse_insn): Ch
On 19/02/15 17:26, Richard Henderson wrote:
On 02/19/2015 09:08 AM, Alex Velenko wrote:
Your suggestion seem to fix gcc.target/arm/long-calls-1.c, but has to be
thoroughly tested.
Before you do complete testing, please also delete the TREE_STATIC test.
That bit should never be relevant to
On 02/03/15 22:04, Christophe Lyon wrote:
On 2 March 2015 at 21:21, Jan Hubicka wrote:
On 01/03/15 16:47, Christophe Lyon wrote:
On 27 February 2015 at 21:49, Jan Hubicka wrote:
../sysdeps/gnu/siglist.c:72:1: internal compiler error: in address_matters_p,
at symtab.c:1908
versioned_sym
On 01/03/15 16:47, Christophe Lyon wrote:
On 27 February 2015 at 21:49, Jan Hubicka wrote:
../sysdeps/gnu/siglist.c:72:1: internal compiler error: in address_matters_p,
at symtab.c:1908
versioned_symbol (libc, __new_sys_sigabbrev, sys_sigabbrev, GLIBC_2_3_3);
^
0x66a080 symtab_node::add
Hi Jakub,
Just tested with latest svn update. The issue is indeed gone.
Kind regards,
Alex
On 26/02/15 12:12, Jakub Jelinek wrote:
On Thu, Feb 26, 2015 at 12:03:46PM +, Alex Velenko wrote:
This patch also breaks gcc.dg/pr56350.c for aarch64-none-elf, arm-none-eabi
and other arm targets
On 25/02/15 16:51, H.J. Lu wrote:
On Wed, Feb 25, 2015 at 5:10 AM, Kai Tietz wrote:
Hello,
So, I did full regression-test for following patch:
ChangeLog
2015-02-25 Richard Biener
Kai Tietz
PR tree-optimization/61917
* tree-vect-loop.c (vectorizable_reduction): Allow
On 19/02/15 14:16, Richard Henderson wrote:
On 02/18/2015 06:17 AM, Alex Velenko wrote:
By changing behaviour of varasm.c:default_binds_local_p, this patch changes
behaviour of gcc/config/arm/arm.c:arm_function_in_section_p and through it
breaks gcc/config/arm/arm.c:arm_is_long_call_p for weak
On 18/02/15 18:30, Jakub Jelinek wrote:
On Wed, Feb 18, 2015 at 06:29:34PM +, Alex Velenko wrote:
this patch also fixes issues for arm-none-eabi.
Could someone add this patch?
ENOPATCH
Jakub
Hi Jakub,
I meant Andrea Azzarone's patch in the previous e-mail. It has not
On 13/02/15 22:21, Andrea Azzarone wrote:
We can use the same trick used in the other tests. Patch attached.
Sorry about that!
2015-02-13 20:45 GMT+01:00 Jakub Jelinek :
On Wed, Feb 11, 2015 at 12:26:33AM +0100, Andrea Azzarone wrote:
* gcc/testsuite/g++.dg/cpp1y/udlit-char-template-vs-
On 12/02/15 18:38, Mike Stump wrote:
On Feb 11, 2015, at 12:16 PM, Torvald Riegel wrote:
On Mon, 2015-02-09 at 09:10 -0800, Mike Stump wrote:
On Feb 9, 2015, at 7:11 AM, Alex Velenko wrote:
The following patch makes atomic-op-consume.c XFAIL
Is this patch ok?
Ok.
I’d shorten the comment
On 13/02/15 05:11, Richard Henderson wrote:
On 02/12/2015 08:14 PM, H.J. Lu wrote:
I tried the second patch. Results look good on Linux/x86-64.
Thanks. My results concurr. I went ahead and installed the patch as posted.
r~
2015-02-12 H.J. Lu
Richard Henderson
On 09/02/15 23:32, Jeff Law wrote:
On 02/03/15 20:03, Bin.Cheng wrote:
I looked into the test and can confirm the previous compilation is correct.
The cover letter of this patch said IRA mis-handled REQ_EQUIV before,
but in this case it is REG_EQUAL that is lost. The full dump (without
this pat
Hi,
This patch adds match.pd "compare-and-not" simplication patterns.
This is a generic transformation reducing variable accesses.
Done full regression run on arm-none-eabi, aarch64-none-elf,
aarch64_be-none-elf and bootstrapped on x86.
Is patch ok?
2015-02-09 Alex Vele
compilers.
Is this patch ok?
Alex
2015-02-09 Alex Velenko
gcc/testsuite/
* gcc.target/aarch64/atomic-op-consume.c (scan-assember-times):
Directive adjusted to XFAIL.
* gcc.target/arm/atomic-op-consume.c (scan-assember-times): Directive
adjusted to XFAIL.
diff --git a
On 03/02/15 08:29, Bin.Cheng wrote:
On Tue, Feb 3, 2015 at 3:24 PM, Jeff Law wrote:
On 02/02/15 08:59, Alex Velenko wrote:
On 11/10/14 13:44, Felix Yang wrote:
Hello Jeff,
I see that you have improved the RTL typesafety issue for ira.c,
so I rebased this patch
on the latest
On 11/10/14 13:44, Felix Yang wrote:
Hello Jeff,
I see that you have improved the RTL typesafety issue for ira.c,
so I rebased this patch
on the latest trunk and change to use the new list walking interface.
Bootstrapped on x86_64-SUSE-Linux and make check regression tested.
On 27/01/15 16:13, Ramana Radhakrishnan wrote:
On Tue, Jan 27, 2015 at 4:06 PM, Alex Velenko wrote:
Hi,
This patch fixes arm/atomic-op-consume.c test to expect safe "LDAEX"
instruction to be generated when __ATOMIC_CONSUME semantics is requested.
This patch was tested by r
Hi,
This patch fixes aarch64/atomic-op-consume.c test to expect safe "LDAXR"
instruction to be generated when __ATOMIC_CONSUME semantics is requested.
This patch was tested by running the modified test on aarch64-none-elf
compiler.
Is this patch ok?
Alex
2015-01-27 Alex Vele
Hi,
This patch fixes arm/atomic-op-consume.c test to expect safe "LDAEX"
instruction to be generated when __ATOMIC_CONSUME semantics is requested.
This patch was tested by running the modified test on arm-none-eabi and
arm-none-linux-gnueabi compilers.
Is this patch ok?
Alex
2015-0
Hi,
Is the following patch ok?
regards,
Alex
This patch fixes aarch64/atomic-op-consume.c test to expect safe assembly to be
generated when __ATOMIC_CONSUME semantics is requested.
2015-01-21 Alex Velenko alex.vele...@arm.com
gcc/testsuite/
gcc.target/aarch64/atomic-op-consume.c(scan
On 08/12/14 10:33, Richard Earnshaw wrote:
On 11/11/14 10:38, Alex Velenko wrote:
From 98bb6d7323ce79e28be8ef892b919391ed857e1f Mon Sep 17 00:00:00 2001
From: Alex Velenko
Date: Fri, 31 Oct 2014 18:43:32 +
Subject: [PATCH] [AArch64, RTL] Bics instruction generation for aarch64
Hi
On 11/11/14 10:38, Alex Velenko wrote:
From 98bb6d7323ce79e28be8ef892b919391ed857e1f Mon Sep 17 00:00:00 2001
From: Alex Velenko
Date: Fri, 31 Oct 2014 18:43:32 +
Subject: [PATCH] [AArch64, RTL] Bics instruction generation for aarch64
Hi,
This patch adds rtl patterns for aarch64 to
Hi,
2014-11-20 Alex Velenko
*MAINTAINERS (write-after-approval): Add myself.
diff --git a/MAINTAINERS b/MAINTAINERS
index 11a28ef..eada4e9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -566,6 +566,7 @@ David Ung
Neil Vachharajani
2014-11-20 Alex Velenko
*MAINTAINERS (write-after-approval): Add myself.
diff --git a/MAINTAINERS b/MAINTAINERS
index 11a28ef..eada4e9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -566,6 +566,7 @@ David Ung
Neil Vachharajani
From 98bb6d7323ce79e28be8ef892b919391ed857e1f Mon Sep 17 00:00:00 2001
From: Alex Velenko
Date: Fri, 31 Oct 2014 18:43:32 +
Subject: [PATCH] [AArch64, RTL] Bics instruction generation for aarch64
Hi,
This patch adds rtl patterns for aarch64 to generate bics instructions in
cases when
it ok?
Thanks,
Alex
gcc/
2014-11-03 Alex Velenko
* simplify-rtx.c (simplify_binary_operation_1): Div check added.
* rtl.h (SUBREG_P): New macro added.
gcc/testsuite/
2014-11-03 Alex Velenko
* gcc.dg/asr-div1.c : New testcase.
>From 471fbb2057b4d338d01bb403f0973adbed33a
[s,u][32,64]
vdupb_lane_[s,u]8
vduph_lane_[s,u]16
vdupd_lane_[f,s,u]64
vdups_lane_[f,s,u]32
vdupq_lane_[f,s][32,64]
vdupq_lane_s[8,16]
vdup[q]_n_f32
vdupq_n_f64
vdupq_n_[s,p,u][8,16]
vdupq_n_[s,u][32,64]
Is it OK for trunk?
Kind regards,
Alex
gcc/testsuite/
2014-03-14 Alex Velenko
On 25/02/14 18:15, Richard Henderson wrote:
On 02/25/2014 09:02 AM, Alex Velenko wrote:
+(define_expand "aarch64_reinterpretdf"
+ [(match_operand:DF 0 "register_operand" "")
+ (match_operand:VD_RE 1 "register_operand" "")]
+ "
Hi,
This patch introduces vreinterpret implementation for 64-bit float
vectors intrinsics and adds testcase for them.
This patch tested on LE or BE with no regressions.
Is this patch ok for stage-1?
Thanks,
Alex
gcc/
2014-02-14 Alex Velenko
* config/aarch64/aarch64-builtins.c
unspec.
* config/aarch64/arm_neon.h (vshr_n_u64): Intrinsic fixed.
(vshrd_n_u64): Likewise.
gcc/testsuite/
2014-02-25 Alex Velenko
* gcc.target/aarch64/ushr64_1.c: New testcase.
diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c
On 13/02/14 17:43, Richard Henderson wrote:
On 02/13/2014 03:17 AM, Alex Velenko wrote:
+/* Sets "rmode" field of "FPCR" control register to
+ "FPROUNDING_ZERO". */
Comment is wrong, or at least misleading.
+void __inline __attribute__ ((__always_inline__)
Hi,
This patch adds vrnd<*>_f64 aarch64 intrinsics. A testcase for those
intrinsics is added. Run a complete LE and BE regression run with no
regressions.
Is patch OK for stage-1?
2014-02-13 Alex Velenko
gcc/
* config/aarch64/aarch64-builtins.c (BUILTIN_VDQF_DF):
Hi,
This patch implements vqneg_s64, vqnegd_s64, vqabs_s64 and
vqabsd_s64 AArch64 intrinsics. Regression tests added.
Run full regression with no regressions.
Is patch OK?
Thanks,
Alex
gcc/
2014-02-12 Alex Velenko
* gcc/config/aarch64/aarch64-simd.md (aarch64_s):
Pattern
Hi,
I agree to changelog change. Could this patch, please, be submitted as I
do not have rights to do so.
Kind regards,
Alex
On 30/01/14 22:36, Marcus Shawcroft wrote:
On 30 January 2014 15:28, Alex Velenko wrote:
Hi,
This patch fixes shift right pattern, as it failed on -O0 after shift
not have
the rights to do so?
Kind regards,
Alex
2014-01-28 Alex Velenko
gcc/
* config/aarch64/aarch64-simd.md (aarch64_ashr_simddi): Fixed.
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index 7378da9122d550f869c3e830e3e5a7681e7581f6
Hi,
Could someone, please, commit this patch, as I do not have permissions
to do so.
Kind regards,
Alex
On 23/01/14 12:04, Marcus Shawcroft wrote:
On 6 January 2014 11:52, Alex Velenko wrote:
Hi,
This patch fixes vector shift by 64 behavior to meet reference
manual expectations. Testcase
On 06/01/14 11:52, Alex Velenko wrote:
Hi,
This patch fixes vector shift by 64 behavior to meet reference
manual expectations. Testcase included to check that expectations
are now met. No regressions found.
Is patch OK?
Thanks,
Alex
2014-01-06 Alex Velenko
gcc/
* config/aarch64
On 16/01/14 12:12, Alex Velenko wrote:
[AArch64] VDUP testcases
Hi,
This patch implements test cases for following NEON intrinsics:
vdup_lane_f32
vdup_lane_s[8,16]
vdup_lane_s[32,64]
vdup_n_[p,s,u][8,16]
vdup_n_[s,u][32,64]
vdupb_lane_[s,u]8
vduph_lane_[s,u]16
vdupd_lane_[f,s,u]64
vdups_lane_
Hi,
Can someone, please, commit this patch as I do not have privileges to
do so.
Kind regards,
Alex Velenko
On 21/01/14 13:34, Marcus Shawcroft wrote:
2014/1/16 Alex Velenko :
Hi,
In previous BE patches the way lane indexing in lanes is calculated has
been changed. To accommodate the change
Hi,
Can someone, please, commit this patch as I do not have privileges to
do so.
Kind regards,
Alex Velenko
On 21/01/14 13:32, Marcus Shawcroft wrote:
On 16 January 2014 11:50, Alex Velenko wrote:
Hi,
This patch by James Greenhalgh fixes "by-lane" patterns broken by
previo
Hi,
Can someone, please, commit this patch as I do not have privileges to
do so.
Kind regards,
Alex Velenko
On 21/01/14 13:31, Marcus Shawcroft wrote:
On 16 January 2014 11:49, Alex Velenko wrote:
Hi,
This patch changes get_lane intrinsics to provide a correct big-endian
indexing. This fixes
Hi,
Can someone, please, commit this patch as I do not have privileges to
do so.
Kind regards,
Alex Velenko
On 21/01/14 13:27, Marcus Shawcroft wrote:
On 16 January 2014 11:49, Alex Velenko wrote:
Hi,
This patch is the first patch in a series of patches fixing Big-Endian
lane numbering. The
On 20/01/14 11:16, Richard Earnshaw wrote:
On 20/01/14 11:15, Alex Velenko wrote:
On 17/01/14 15:55, Richard Earnshaw wrote:
On 16/01/14 14:43, Alex Velenko wrote:
On 14/01/14 15:51, pins...@gmail.com wrote:
On Jan 14, 2014, at 7:19 AM, Alex Velenko wrote:
Hi,
This patch turns off the
On 17/01/14 14:39, Richard Earnshaw wrote:
On 17/01/14 14:22, Alex Velenko wrote:
Hi,
Here are some more improvements on changelog entry:
gcc/testsuite/
2013-01-16 Alex Velenko
* gcc.target/aarch64/vneg_f.c (STORE_INST): New macro.
(RUN_TEST): Use new macro
On 17/01/14 15:55, Richard Earnshaw wrote:
On 16/01/14 14:43, Alex Velenko wrote:
On 14/01/14 15:51, pins...@gmail.com wrote:
On Jan 14, 2014, at 7:19 AM, Alex Velenko wrote:
Hi,
This patch turns off the vec_perm patterns for aarch64_be, this should resolve
the issue highlighted here
Hi,
Here are some more improvements on changelog entry:
gcc/testsuite/
2013-01-16 Alex Velenko
* gcc.target/aarch64/vneg_f.c (STORE_INST): New macro.
(RUN_TEST): Use new macro.
(INDEX64_32): Delete.
(INDEX64_64): Likewise.
(INDEX128_32): Likewise
Hi,
I agree the correct changelog entry should be:
gcc/testsuite/
2013-01-16 Alex Velenko
*/gcc.target/aarch64/vneg_f.c (STORE_INST): New macro.
(RUN_TEST): Use new macro.
(INDEX): marcro removed
(test_vneg_f32): Use fixed RUN_TEST.
(test_vneg_f64): Likewise
On 14/01/14 15:51, pins...@gmail.com wrote:
On Jan 14, 2014, at 7:19 AM, Alex Velenko wrote:
Hi,
This patch turns off the vec_perm patterns for aarch64_be, this should resolve
the issue highlighted here
http://gcc.gnu.org/ml/gcc-patches/2014-01/msg00321.html
With this patch applied, the
Hi,
This patch fixes testcase vneg_f.c which was using an inconsistent
vector model causing problems for Big-Endian compiler.
Now testcase runs on both LE and BE without regressions.
Is it okay?
Kind regards,
Alex Velenko
gcc/testsuite/
2013-01-16 Alex Velenko
*/gcc.target
]
vdupq_lane_s[8,16]
vdup[q]_n_f32
vdupq_n_f64
vdupq_n_[s,p,u][8,16]
vdupq_n_[s,u][32,64]
Tests succeed on both Little-Endian and Big-Eendian.
Ok for trunk?
Thanks,
Alex
gcc/testsuite/
2014-01-16 Alex Velenko
* gcc.target/aarch64/vdup_lane_1.c: New testcase
Hi,
In previous BE patches the way lane indexing in lanes is calculated has
been changed. To accommodate the change, arm neon intrinsics had to be
updated.
Is it okay?
/gcc/
2014-01-16 James Greenhalgh
Alex Velenko
* config/aarch64/arm_neon.h (vaddv_s8): __LANE0
Hi,
This patch by James Greenhalgh fixes "by-lane" patterns broken by
previous patches.
Regression tested on aarch64-none-elf and aarch64_be-none-elf
with no unexpected issues.
OK?
Thanks,
Alex
---
gcc/
2014-01-16 James Greenhalgh
* config/aarch64/aarch64-simd.md
(aarch64
Hi,
This patch changes get_lane intrinsics to provide a correct big-endian
indexing. This fixes numerous BE load and store issues based on getting
correct lane.
Is this good for trunk?
gcc/
2013-01-14 Alex Velenko
* config/aarch64/aarch64-simd.md
fixes vld1_ and vst1_ to generate st1
and ld1 instructions, correcting their BE behaviour.
Regression tested on aarch64-none-elf and aarch64_be-none-elf with
recent vec-perm with no unexpected issues.
Is it okay for trunk?
Regards,
Alex Velenko
gcc/
2014-01-16 Alex Velenko
Velenko
gcc/
2014-01-14 Alex Velenko
* config/aarch64/aarch64-simd.md (vec_perm): Add BE check.
* config/aarch64/aarch64.c (aarch64_expand_vec_perm): Add comment.
gcc/testsuite/
2014-01-14 Alex Velenko
* lib/target-supports.exp
Hi,
This patch fixes vector shift by 64 behavior to meet reference
manual expectations. Testcase included to check that expectations
are now met. No regressions found.
Is patch OK?
Thanks,
Alex
2014-01-06 Alex Velenko
gcc/
* config/aarch64/aarch64-simd-builtins.def (ashr): DI
.
(vmovq_n_u16): Likewise.
(vmovq_n_u32): Likewise.
(vmovq_n_u64): Likewise.
gcc/testsuite/
2013-11-21 Alex Velenko
* gcc.target/aarch64/vmov_n_1.c: New testcase.
diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index
Hi,
This patch fixes vdiv[q]_f[32,64] neon intrinsics testcase.
Testcase ran on both little and big endian targets with no problems.
OK?
Thanks,
Alex
gcc/testsuite/
2013-11-19 Alex Velenko
* gcc.target/aarch64/vdiv_f.c (test_vdiv_f32): vector indexing
replaced with builtins
Hi,
This patch makes testcase for vneg[q]_s[8,16,32,64] big-endian safe.
vneg_s.c testcase ran with both big and little endian compilers with no
problems.
is patch OK?
Thanks,
Alex
gcc/testsuite/
2013-11-19 Alex Velenko
* gcc.target/aarch64/vneg_s.c (test_vneg_s8): fixed to not
Hi,
This patch implements the behavior and regression
test for NEON intrinsics vclz[q]_[s,u][8,16,32]
No problems found when running aarch64-none-elf
regressions tests.
Is patch OK?
Thanks,
Alex
gcc/testsuite/
2013-10-08 Alex Velenko
* gcc.target/aarch64/vclz.c: New testcase
Hi,
This patch implements the behavior of vadd_f64 and
vsub_f64 NEON intrinsics. Regression tests are added.
Regression tests for aarch64-none-elf completed with no
regressions.
OK?
Thanks,
Alex
gcc/testsuite/
2013-10-08 Alex Velenko
* gcc.target/aarch64/vadd_f64.c: New testcase
Hi,
This patch implements the behavior of vdiv_f64 intrinsic
and adds regression tests for vdiv[q]_f[32,64] NEON intrinsics.
Full aarch64-none-elf regression test ran with no regressions.
Is it OK?
Thanks,
Alex
gcc/testsuite/
2013-09-10 Alex Velenko
* gcc.target/aarch64
Velenko
* gcc.target/aarch64/vneg_f.c: New testcase.
* gcc.target/aarch64/vneg_s.c: New testcase.
gcc/
2013-10-08 Alex Velenko
* config/aarch64/arm_neon.h (vneg_f32): Asm replaced with C.
(vneg_f64): New intrinsic.
(vneg_s8): Asm replaced with C
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