On Thu, 2016-11-03 at 15:58 -0400, David Miller wrote:
> From: Madalin Bucur
> Date: Wed, 2 Nov 2016 22:17:26 +0200
>
> > This introduces the Freescale Data Path Acceleration Architecture
> > +static inline size_t bpool_buffer_raw_size(u8 index, u8 cnt)
> > +{
> > + u8 i;
> > + size_t res
>>On Tue, 1 Nov 2016, Grzegorz Andrejczuk wrote:
>>
>> +/* Intel Xeon Phi x200 ring 3 MONITOR/MWAIT */
>
>Oh well. I asked you to make that whole PHI thing go away.
>
>This is a feature which has nothing to do with PHI. It just happens to be
>implemented on PHI. The FEATURES_ENABLES MSR is not
Add a functionality getting specific config key-value pairs.
For the syntax examples,
perf config [] [section.name ...]
e.g. To query config items 'report.queue-size' and 'report.children', do
# perf config report.queue-size report.children
Cc: Namhyung Kim
Cc: Jiri Olsa
Cc: Wang Nan
To write config items to a particular config file,
we should know where is each config section and item from.
Current setting functionality of perf-config use autogenerating
way by overwriting collected config items to a config file.
For example,
When collecting config items from user and system c
Explain how to query particular config items in config file
and how to get several config items from user or system config file
using '--user' or '--system' options.
Cc: Namhyung Kim
Cc: Jiri Olsa
Cc: Wang Nan
Signed-off-by: Taeung Song
---
tools/perf/Documentation/perf-config.txt | 18 ++
Add setting feature that can add config variables with their values
to a config file (i.e. user or system config file) or modify
config key-value pairs in a config file.
For the syntax examples,
perf config [] [section.name[=value] ...]
e.g. You can set the ui.show-headers to false with
You can get several config items as below,
# perf config report.queue-size call-graph.record-mode
but it would be needed to more precisely check arguments,
before show_spec_config() takes over the arguments.
The function would be also used when parse config key-value pairs
arguments in the ne
Hello, :)
Add setting and getting features to perf-config.
I had worked at the related patchset https://lkml.org/lkml/2016/2/22/38
But I remake new this patchset for only support for read/write config file.
And There're Namhyung's requests https://lkml.org/lkml/2016/10/24/47.
In particular, I a
Explain how to add or modify particular config items in config file
and how to set several config items from user or system config file
using '--user' or '--system' options.
Cc: Namhyung Kim
Cc: Jiri Olsa
Cc: Wang Nan
Signed-off-by: Taeung Song
---
tools/perf/Documentation/perf-config.txt | 1
Some modules may need to change its clock rate before turn on it.
So changing PLL's rate when it is off should be allowed.
This patch removes PLL enabled check before set rate, so that
PLLs can set new frequency even if they are off.
On MT8173 for example, ARMPLL's enable bit can be controlled by
On 04-11-16, 10:57, Akshay Adiga wrote:
> As fast_switch may get called in interrupt disable mode, it does not
s/in interrupt disable mode/with interrupts disabled
s/it does/it may
> update the global_pstate_info data structure. Hence the global_pstate_info
> has stale data whenever pstate is upd
On 04-11-16, 10:57, Akshay Adiga wrote:
> Adding fast_switch which does light weight operation to
> set the desired pstate.
>
> Signed-off-by: Akshay Adiga
> ---
> drivers/cpufreq/powernv-cpufreq.c | 22 +-
> 1 file changed, 21 insertions(+), 1 deletion(-)
>
> diff --git a/d
If 'sun4i_layers_init()' returns an error, propagate it instead of
returning -EINVAL unconditionally.
Signed-off-by: Christophe JAILLET
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
b/drivers/gpu/drm/s
From: Yanjiang Jin
This is to eliminate the below compile error:
crypto/rsa_helper.c:19:29: fatal error: rsaprivkey-asn1.h: No such file or
directory
#include "rsaprivkey-asn1.h"
^
compilation terminated.
Signed-off-by: Yanjiang Jin
---
crypto/{rsaprivkey.asn1 =
Hi Tony,
[auto build test WARNING on pinctrl/for-next]
[also build test WARNING on v4.9-rc3 next-20161028]
[cannot apply to robh/for-next]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Tony-Lin
Signed-off-by: Rick Chang
Signed-off-by: Minghsiu Tsai
---
This patch depends on:
CCF "Add clock support for Mediatek MT2701"[1]
iommu and smi "Add the dtsi node of iommu and smi for mt2701"[2]
[1] http://lists.infradead.org/pipermail/linux-mediatek/2016-October/007271.html
[2] https://patc
Add a DT binding documentation for Mediatek JPEG Decoder of
MT2701 SoC.
Signed-off-by: Rick Chang
Signed-off-by: Minghsiu Tsai
---
.../bindings/media/mediatek-jpeg-codec.txt | 35 ++
1 file changed, 35 insertions(+)
create mode 100644
Documentation/devicetree/bindi
Add v4l2 driver for Mediatek JPEG Decoder
Signed-off-by: Rick Chang
Signed-off-by: Minghsiu Tsai
---
drivers/media/platform/Kconfig | 15 +
drivers/media/platform/Makefile |2 +
drivers/media/platform/mtk-jpeg/Makefile |2 +
drivers/media/pla
This series of patches provide a v4l2 driver to control Mediatek JPEG decoder
for decoding JPEG image and Motion JPEG bitstream.
changes since v2:
- Revise DT binding documentation
changes since v1:
- Rebase for v4.9-rc1.
- Update Compliance test version and result
- Remove redundant path in Mak
Currently the kconfig logic for VFIO_IOMMU_SPAPR_TCE and VFIO_SPAPR_EEH
is broken when SPAPR_TCE_IOMMU=n. Leading to:
warning: (VFIO) selects VFIO_IOMMU_SPAPR_TCE which has unmet direct
dependencies (VFIO && SPAPR_TCE_IOMMU)
warning: (VFIO) selects VFIO_IOMMU_SPAPR_TCE which has unmet dir
Le 02/11/2016 à 01:22, Stephen Boyd a écrit :
On 10/24, Christophe JAILLET wrote:
clk_register_pll() can return ERR_PTR(-ENOMEM) so checking the return value
against NULL only is not correct.
The code just doesn't propagate the error up to the caller.
Instead the caller treats NULL as an error
Hi Liviu,
On Thu, 3 Nov 2016 17:19:58 + Liviu Dudau wrote:
>
> I have revamped the mali-dp tree and rebased it on the newer
> version of drm-next (which includes the drm-misc change) and pushed the
> updated patch in my tree.
Thanks for that. However, several of the commits in your tree now
Hi Kishon,
On Thursday 03 November 2016 10:20 PM, Kishon Vijay Abraham I wrote:
>
>
> On Wednesday 02 November 2016 06:14 PM, Axel Haslam wrote:
>> There is only one ohci on the da8xx series of chips,
>> so remove the ".0" when creating the phy. Also add
>> the "-da8xx" postfix to be consistent
Hi Vineet,
> -Original Message-
> From: Vineet Gupta [mailto:vgu...@synopsys.com]
> Sent: Thursday, November 03, 2016 8:04 PM
> To: Alexey Brodkin ;
> linux-snps-...@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org; linux-a...@vger.kernel.org; Vineet Gupta
> ; Marek Szyprowski
> ;
On Friday 04 November 2016 07:37 AM, Andrew Donnellan wrote:
> On 03/11/16 21:27, Ravi Bangoria wrote:
>> Yes, kernel-space hw-breakpoint feature is broken on LE without this.
>
> Is there any actual user-visible feature that depends on this, or is this
> solely for debugging and development pur
On 11/04/16 at 01:14pm, Baoquan He wrote:
> Hi Joerg,
>
> Ping!
>
> About the v6 post, do you have any suggestions?
>
> Because of GCR3 special handling in patch 9/9, I spent several days to
> study the knowledge and change code. Then when I tried to post, the
> virtual interrupt remapping featu
Adding fast_switch which does light weight operation to
set the desired pstate.
Signed-off-by: Akshay Adiga
---
drivers/cpufreq/powernv-cpufreq.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/cpufreq/powernv-cpufreq.c
b/drivers/cpufreq/powern
As fast_switch may get called in interrupt disable mode, it does not
update the global_pstate_info data structure. Hence the global_pstate_info
has stale data whenever pstate is updated through fast_swtich().
So the gpstate_timer can fire after a fast_switch() call has update
the pstates to a diff
On Wed, Nov 02, 2016 at 04:02:20AM -0600, Jarkko Sakkinen wrote:
> On Tue, Nov 01, 2016 at 03:05:13AM +0200, Tomas Winkler wrote:
> > Place kdoc just above tpm_pcr_extend so it can be parsed
> > correctly.
> >
> > Signed-off-by: Tomas Winkler
>
> Reviewed-by: Jarkko Sakkinen
I applied this alt
Add a helper function to read the AUXCTL register for the BCM54xx. This
mirrors the bcm54xx_auxctl_write function already present in the code.
Signed-off-by: Jon Mason
Reviewed-by: Florian Fainelli
---
drivers/net/phy/broadcom.c | 10 ++
include/linux/brcmphy.h| 1 +
2 files chang
Hi Joerg,
Ping!
About the v6 post, do you have any suggestions?
Because of GCR3 special handling in patch 9/9, I spent several days to
study the knowledge and change code. Then when I tried to post, the
virtual interrupt remapping feature caused kernel hang with this pachset
applied. So it took
Add the documentation for PHY lane swapping. This is a boolean entry to
notify the phy device drivers that the TX/RX lanes need to be swapped.
Signed-off-by: Jon Mason
Reviewed-by: Florian Fainelli
Reviewed-by: Andrew Lunn
---
Documentation/devicetree/bindings/net/phy.txt | 4
1 file cha
The BCM54810 PHY requires some semi-unique configuration, which results
in some additional configuration in addition to the standard config.
Also, some users of the BCM54810 require the PHY lanes to be swapped.
Since there is no way to detect this, add a device tree query to see if
it is applicable
On Thu, Nov 3, 2016 at 8:11 AM, Luca Barbato wrote:
> On 03/11/2016 14:21, Attila Kinali wrote:
>> On Wed, 2 Nov 2016 23:10:41 -0700
>> Matt Ranostay wrote:
>>
>>>
>>> So does anyone know of any software that is using V4L2_PIX_FMT_Y12
>>> currently? Want to test my driver but seems there isn't an
Clean-up the documentation to the bgmac-amac driver, per suggestion by
Rob Herring, and add details for NS2 support.
Signed-off-by: Jon Mason
Reviewed-by: Florian Fainelli
---
Documentation/devicetree/bindings/net/brcm,amac.txt | 16 +++-
1 file changed, 11 insertions(+), 5 deletion
Add support for the AMAC ethernet to the Broadcom Northstar2 SoC device
tree
Signed-off-by: Jon Mason
---
arch/arm64/boot/dts/broadcom/ns2-svk.dts | 5 +
arch/arm64/boot/dts/broadcom/ns2.dtsi| 12
2 files changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/
Add support for the variant of amac hardware present in the Broadcom
Northstar2 based SoCs. Northstar2 requires an additional register to be
configured with the port speed/duplexity (NICPM). This can be added to
the link callback to hide it from the instances that do not use this.
Also, clearing
Change the bgmac driver to allow for phy's defined by the device tree
Signed-off-by: Jon Mason
---
drivers/net/ethernet/broadcom/bgmac-bcma.c | 22 +++
drivers/net/ethernet/broadcom/bgmac-platform.c | 22 ++-
drivers/net/ethernet/broadcom/bgmac.c | 29
Changes in v6:
* Use a common bgmac_phy_connect_direct (per Rafal Milecki)
* Rebased on latest net-next
* Added Reviewed-by to the relevant patches
Changes in v5:
* Change a pr_err to netdev_err (per Scott Branden)
* Reword the lane swap binding documentation (per Andrew Lunn)
Changes in v4:
*
The Lattice iCE40 is a family of FPGAs with a minimalistic architecture
and very regular structure, designed for low-cost, high-volume consumer
and system applications.
This patch adds support to the FPGA manager for configuring the SRAM of
iCE40LM, iCE40LP, iCE40HX, iCE40 Ultra, iCE40 UltraLite a
---
.../bindings/fpga/lattice-ice40-fpga-mgr.txt| 21 +
1 file changed, 21 insertions(+)
create mode 100644
Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt
diff --git a/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt
b/Documentati
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 1992aa9..d64a835 100644
--- a/Documentation/devi
On Wed, Nov 2, 2016 at 1:22 AM, Pavel Machek wrote:
> Hi!
>
>> >> >> Better then previous one.
>> >> >>
>> >> >> But my version of bq27xxx_battery.c already contains this:
>> >> >
>> >> > This is for allowing udev rule to set the properties as well.
>> >> > otherwise a kinda crude RUN = " echo val
Christopher Covington writes:
> The PowerPC VDSO remap and unmap code was copied to a generic location,
> only modifying the variable name expected in mm->context (vdso instead of
> vdso_base) to match most other architectures. Having adopted this generic
> naming, drop the code in arch/powerpc a
Hi Laurent,
Thank you for the comments.I will fix them in the next patch (v3).
On Thu, 2016-11-03 at 20:34 +0200, Laurent Pinchart wrote:
> Hi Rick,
>
> A few more comments.
>
> On Thursday 03 Nov 2016 20:33:12 Laurent Pinchart wrote:
> > On Monday 31 Oct 2016 15:16:55 Rick Chang wrote:
> > > A
On Fri 04-11-16 03:01:31, Sergey Senozhatsky wrote:
> fix a typo
>
> On (11/04/16 02:31), Sergey Senozhatsky wrote:
> [..]
> > #4 console semaphore
> > discussion outcome:
> > we agreed that we can do better here and that it makes sense to do
> IOW, console
On Tue, 2016-11-01 at 20:49 +, Marc Zyngier wrote:
> On Tue, Nov 01 2016 at 11:52:01 AM, Youlin Pei
> wrote:
> > In Mediatek SOCs, the CIRQ is a low power interrupt controller
> > designed to works outside MCUSYS which comprises with Cortex-Ax
> > cores,CCI and GIC.
> >
> > The CIRQ controlle
Hi Jacek,
> > > Only DT bindings of LED class drivers should be placed in
> > > Documentation/devicetree/bindings/leds. Please move it to the
> > > media bindings.
> >
> > that's where I placed it first, but Rob asked me to put it in the
> > LED directory and Cc the LED mailining list.
> >
> > T
On Mon, Oct 31, 2016 at 05:48:22PM +0100, Juergen Gross wrote:
> Use xenbus_read_unsigned() instead of xenbus_scanf() when possible.
> This requires to change the type of one read from int to unsigned,
> but this case has been wrong before: negative values are not allowed
> for the modified case.
>
On Tue, Nov 01, 2016 at 03:05:14AM +0200, Tomas Winkler wrote:
> Use correct kdoc format, describe correct parameters and return values.
>
> Signed-off-by: Tomas Winkler
> ---
> drivers/char/tpm/tpm2-cmd.c | 107
> +++-
> 1 file changed, 66 insertions(+),
Hi Laurent,
Thanks for your patient review.I will fix them in the next patch (v3).
On Thu, 2016-11-03 at 20:33 +0200, Laurent Pinchart wrote:
> Hi Rick,
>
> Thank you for the patch.
>
> On Monday 31 Oct 2016 15:16:55 Rick Chang wrote:
> > Add a DT binding documentation for Mediatek JPEG Decoder
On Thu, 3 Nov 2016 21:39:30 +
Eric Auger wrote:
> Following Will & Robin's suggestions, this series attempts to propose
> an alternative to [1] where the host would arbitrarily decide the
> location of the IOVA MSI window and would be able to report to the
> userspace the list of reserved IO
On 11/03/2016 06:13 PM, Shaohua Li wrote:
On Thu, Nov 03, 2016 at 05:09:54PM -0700, Christoph Hellwig wrote:
On Thu, Nov 03, 2016 at 05:03:54PM -0700, Shaohua Li wrote:
This is corresponding part for blk-mq. Disk with multiple hardware
queues doesn't need this as we only hold 1 request at most.
On Fri, 2016-11-04 at 09:54 +1030, Joel Stanley wrote:
> On Thu, Nov 3, 2016 at 1:07 AM, Andrew Jeffery wrote:
> >
> > The System Control Unit IP block in the Aspeed SoCs is typically where
> > the pinmux configuration is found, but not always. A number of pins
> > depend on state in one of LPC H
On Thu, Nov 3, 2016 at 4:10 PM, Eric Biggers wrote:
> On Thu, Nov 03, 2016 at 02:12:07PM -0700, Eric Biggers wrote:
>> On Thu, Nov 03, 2016 at 01:30:49PM -0700, Andy Lutomirski wrote:
>> >
>> > Also, Herbert, it seems like the considerable majority of the crypto
>> > code is acting on kernel virtu
On Fri, 2016-11-04 at 09:36 +1030, Joel Stanley wrote:
> On Thu, Nov 3, 2016 at 1:07 AM, Andrew Jeffery wrote:
> >
> > The Aspeed LPC Host Controller is presented as a syscon device to
> > arbitrate access by LPC and pinmux drivers. LPC pinmux configuration on
> > fifth generation SoCs depends on
On Thu, Nov 03, 2016 at 06:16:16PM -0600, Catalin Marinas wrote:
> On Thu, Nov 03, 2016 at 10:27:38AM +0800, Huang Shijie wrote:
> > diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c
> > index 2e49bd2..4811ef1 100644
> > --- a/arch/arm64/mm/hugetlbpage.c
> > +++ b/arch/arm64/mm
Alexander Duyck writes:
> This change allows us to pass DMA_ATTR_SKIP_CPU_SYNC which allows us to
> avoid invoking cache line invalidation if the driver will just handle it
> via a sync_for_cpu or sync_for_device call.
>
> Cc: Benjamin Herrenschmidt
> Cc: Paul Mackerras
> Cc: Michael Ellerman
On Thu, 3 Nov 2016, Ondrej Zary wrote:
> On Thursday 03 November 2016, Finn Thain wrote:
> > On Wed, 2 Nov 2016, Ondrej Zary wrote:
> > >
> > > The card is almost Plug&Play. The base address is already configured
> > > automatically by the driver so doing the same for IRQ makes sense.
> >
> > W
The tie between the main WCNSS driver and the IRIS driver causes a
circular dependency between the two modules. Neither part makes sense to
have on their own so lets merge them into one module.
For the sake of picking up the clock and regulator resources described
in the iris of_node we need an as
Most of the chips will have a port register control bits to force the
port's link up, down, or let normal link detection occurs.
Implement such operation to use it later when setting duplex, etc.
Signed-off-by: Vivien Didelot
---
drivers/net/dsa/mv88e6xxx/chip.c | 17 +++
drive
The Marvell chips have one internal SMI device per port, containing a
set of registers used to configure a port's link, STP state, default
VLAN or addresses database, etc.
This patchset creates port files to implement the port operations as
described in datasheets, and extend the chip ops structur
Add a port function to access the Port Based VLAN Map register.
Signed-off-by: Vivien Didelot
---
drivers/net/dsa/mv88e6xxx/chip.c | 14 ++
drivers/net/dsa/mv88e6xxx/port.c | 25 +
drivers/net/dsa/mv88e6xxx/port.h | 2 ++
3 files changed, 29 insertions(+), 12
Similarly to port's link, add setter to force port's half duplex, full
duplex or let normal duplex detection occurs.
Signed-off-by: Vivien Didelot
---
drivers/net/dsa/mv88e6xxx/chip.c | 17 +
drivers/net/dsa/mv88e6xxx/mv88e6xxx.h | 9 +
drivers/net/dsa/mv88e6xxx/por
Add port functions to set the port 802.1Q mode.
Signed-off-by: Vivien Didelot
---
drivers/net/dsa/mv88e6xxx/chip.c | 33 ++---
drivers/net/dsa/mv88e6xxx/port.c | 32
drivers/net/dsa/mv88e6xxx/port.h | 3 +++
3 files changed, 37 insert
Some chips such as 88E6352 and 88E6390 can be programmed to add delays
to RXCLK for IND inputs or to GTXCLK for OUTD outputs when port is in
RGMII mode.
Add a port function to program such delays according to the provided PHY
interface mode.
Signed-off-by: Vivien Didelot
---
drivers/net/dsa/mv8
The Marvell switches contains one internal SMI device per port, called
"Port Registers". Depending on the model, the addresses of these devices
start from 0x0, 0x8 or 0x10.
Start moving Port Registers specific code to their own files.
Signed-off-by: Vivien Didelot
---
drivers/net/dsa/mv88e6xxx/
Now that we have setters to configure the port's MAC, use them to
refactor the port setup and adjust_link code.
Note that port's MAC speed, duplex or RGMII delay must not be changed
unless the port's link is forced down. So wrap all that in a
mv88e6xxx_port_setup_mac function.
Signed-off-by: Vivi
While the two bits for link, duplex or RGMII delays are used the same
way on chips supporting the said feature, the two bits for speed have
different meaning for most of the chips out there.
Speed value is stored in bits 1:0, 0x3 means unforce (normal detection).
Some chips reuse values for alter
Add the port STP state setter to the port files.
Signed-off-by: Vivien Didelot
---
drivers/net/dsa/mv88e6xxx/chip.c | 49
drivers/net/dsa/mv88e6xxx/port.c | 31 +
drivers/net/dsa/mv88e6xxx/port.h | 2 ++
3 files changed, 37 insert
Add port functions to access the ports default VID.
Signed-off-by: Vivien Didelot
---
drivers/net/dsa/mv88e6xxx/chip.c | 51
drivers/net/dsa/mv88e6xxx/port.c | 38 ++
drivers/net/dsa/mv88e6xxx/port.h | 3 +++
3 files changed,
Add functions to port files to access the ports default FID.
Signed-off-by: Vivien Didelot
---
drivers/net/dsa/mv88e6xxx/chip.c | 77 +++-
drivers/net/dsa/mv88e6xxx/port.c | 67 ++
drivers/net/dsa/mv88e6xxx/port.h | 3 ++
3 fil
On 2016/11/4 3:17, Andrew Morton wrote:
> On Sat, 29 Oct 2016 14:08:31 +0800 zhongjiang wrote:
>
>> From: zhong jiang
>>
>> Since 'commit 3e89e1c5ea84 ("hugetlb: make mm and fs code explicitly
>> non-modular")'
>> bring in the mainline. mount hugetlbfs will result in the following issue.
>>
>> m
On 04-11-16, 01:28, Rafael J. Wysocki wrote:
> On Thu, Nov 3, 2016 at 9:46 PM, Markus Mayer wrote:
> > From: Markus Mayer
> >
> > Allow cpufreq statistics to be cleared by writing anything to
> > /sys/.../cpufreq/stats/reset. Reading this new sysfs entry returns
> > nothing.
> >
> > Resetting the
Hi Andy,
On 2016/11/3 20:38, Andy Yan wrote:
From: Shawn Lin
Add the clock tree definition and driver for rk1108 SoC.
We should spilt out another patch for adding clock/rst ID
as it should be in a shared branch. :)
You could respin it after Heiko reviews the other parts of
your patchset.
On 03/11/16 21:27, Ravi Bangoria wrote:
Yes, kernel-space hw-breakpoint feature is broken on LE without this.
Is there any actual user-visible feature that depends on this, or is
this solely for debugging and development purposes?
It would of course be *nice* to have it in stable trees (part
hiya linux
http://vicky.medncomp.com/libraries/pattemplate/patTemplate/Modifier/HTML/weak.php?faster=h208bhngdzwa27
Steven Newbury
On Fri, Nov 4, 2016 at 1:36 AM, Maxime Ripard
wrote:
> Hi,
>
> On Thu, Nov 03, 2016 at 03:55:48PM +0800, Chen-Yu Tsai wrote:
>> +/* headphone controls */
>> +static const char * const sun6i_codec_hp_src_enum_text[] = {
>> + "DAC", "Mixer",
>> +};
>> +
>> +static SOC_ENUM_DOUBLE_DECL(sun6i_code
On Thu, Nov 03, 2016 at 04:50:55PM -0600, Ben Hutchings wrote:
> On Wed, 2016-11-02 at 18:20 +0100, Sebastian Andrzej Siewior wrote:
> > Debian started to build the gcc with -fPIE by default so the kernel
> > build ends before it starts properly with:
> > |kernel/bounds.c:1:0: error: code model ker
On Thu, Nov 3, 2016 at 10:36 AM, Daniel Borkmann wrote:
> On 11/03/2016 03:15 PM, Dmitry Vyukov wrote:
>>
>> On Wed, Nov 2, 2016 at 11:14 PM, Dmitry Vyukov wrote:
>>>
>>> Here we go.
>>>
>>> The following program triggers kernel BUG in htab_elem_free.
>>> On commit 0c183d92b20b5c84ca655b45ef57b33
Hi Vineet,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.9-rc3 next-20161028]
[cannot apply to arc/for-next]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Vineet-Gupta/Mo
On Tue, Oct 4, 2016 at 2:10 AM, Nikolay Borisov wrote:
> Hello Peter,
>
> I've emailed you before re. spurious hangs in the TTY layer, but
> at that time I was running a rather old (but LTS) 3.12 kernel. Now,
> I'm running a 4.4.10 and I still observe the following lock-ups.
> I have multiple proc
Hi Heiko and Shawn:
ok, I agree with you, and the root fix seems to fix it in the TRM first.
I'll feedback to TRM makers.
Thanks.
On 2016年11月03日 22:32, Heiko Stübner wrote:
Am Donnerstag, 3. November 2016, 16:52:48 schrieb Shawn Lin:
On 2016/11/2 15:04, Jianqun Xu wrote:
Fix aclk_emmcgrf to
Hi,
On 11/03/2016 07:36 PM, Mathias Nyman wrote:
> On 03.11.2016 12:22, Sergei Shtylyov wrote:
>> On 11/3/2016 9:48 AM, Lu Baolu wrote:
>>
>>> cmd_completion in struct xhci_virt_device is legacy. With command
>>> strutcture and command queue introduced in xhci, cmd_completion is
>>
>> Structur
On Thu, Nov 3, 2016 at 9:46 PM, Markus Mayer wrote:
> From: Markus Mayer
>
> Allow cpufreq statistics to be cleared by writing anything to
> /sys/.../cpufreq/stats/reset. Reading this new sysfs entry returns
> nothing.
>
> Resetting the statistics can be useful in a test environment (test
> gover
> On Nov 3, 2016, at 2:43 PM, Theodore Ts'o wrote:
>
> On Thu, Nov 03, 2016 at 09:48:27AM +1100, Dave Chinner wrote:
>>
>> We're going to need regression tests for this to ensure that it
>> works properly and that we don't inadvertantly break it in future.
>> Can you write some xfstests that ex
On Wed, Nov 2, 2016 at 9:29 AM, Nathan Zimmer wrote:
> On Mon, Oct 31, 2016 at 08:55:49PM -0600, Peter Hurley wrote:
>> On Mon, Oct 31, 2016 at 2:27 PM, Sean Young wrote:
>> > On Sun, Oct 30, 2016 at 10:33:02AM -0500, Nathan wrote:
>> >> I think this should be PNP0501 instead of PNP0c02.
>> >> On
On Thu, Nov 03, 2016 at 10:27:38AM +0800, Huang Shijie wrote:
> diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c
> index 2e49bd2..4811ef1 100644
> --- a/arch/arm64/mm/hugetlbpage.c
> +++ b/arch/arm64/mm/hugetlbpage.c
> @@ -61,10 +61,6 @@ static int find_num_contig(struct mm_st
On Thu, Nov 03, 2016 at 05:09:54PM -0700, Christoph Hellwig wrote:
> On Thu, Nov 03, 2016 at 05:03:54PM -0700, Shaohua Li wrote:
> > This is corresponding part for blk-mq. Disk with multiple hardware
> > queues doesn't need this as we only hold 1 request at most.
>
> Any reason you only do this fo
Core, iface and bus clocks are not required to be voted from SCM
driver for some of the Qualcomm chipsets. Remove dependency on
these clocks from driver.
Suggested-by: Bjorn Andersson
Signed-off-by: Sarangdhar Joshi
---
drivers/firmware/qcom_scm.c | 49 ++
On earlier chiptsets (APQ8064, MSM8660, MSM8690, MSM8916,
APQ8084, MSM8974) crypto operations of TZ were depends on crypto
clocks controlled by users/clients. However on MSM8996 crypto clocks
control is handled internally in TZ itself. The current series of
patches handle this clock dependency in S
When devm_clk_get fails for core clock, the failure was ignored
and the core_clk was explicitly set to NULL so that other
remaining clocks can be queried. However, now that we have a
cleaner way of expressing the clock dependency, return failure
when devm_clk_get fails for core clock.
Signed-off-b
Add SCM DT bindings for Qualcomm's MSM8996 platform.
Acked-by: Rob Herring
Signed-off-by: Sarangdhar Joshi
---
Documentation/devicetree/bindings/firmware/qcom,scm.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt
b/Documentation/d
On Thu, Nov 03, 2016 at 05:03:54PM -0700, Shaohua Li wrote:
> This is corresponding part for blk-mq. Disk with multiple hardware
> queues doesn't need this as we only hold 1 request at most.
Any reason you only do this for the SQ and not the MQ case?
Hi,
On Fri, Nov 04, 2016 at 01:05:01AM +0200, Sakari Ailus wrote:
> On Thu, Nov 03, 2016 at 11:48:43PM +0100, Sebastian Reichel wrote:
> > On Tue, Nov 01, 2016 at 12:54:08AM +0200, Sakari Ailus wrote:
> > > > > Thanks, this answered half of my questions already. ;-)
> > > > :-).
> > > >
> > > > I
Currently block plug holds up to 16 non-mergeable requests. This makes
sense if the request size is small, eg, reduce lock contention. But if
request size is big enough, we don't need to worry about lock
contention. Holding such request makes no sense and it lows the disk
utilization.
In practice,
This is corresponding part for blk-mq. Disk with multiple hardware
queues doesn't need this as we only hold 1 request at most.
Signed-off-by: Shaohua Li
---
block/blk-mq.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/block/blk-mq.c b/block/blk-mq.c
index f3d27a6..a72
commit cfa636886033 ("clk: sunxi: factors: Consolidate get_factors
parameters into a struct") introduced a regression for m factor
computation in sun4i_get_apb1_factors function.
The old code reassigned the "parent_rate" parameter to the targeted
divisor value and was buggy for the returned freque
Added kdoc comments for VTPM_PROXY_IOC_NEW_DEV so that these can be
imported to the kernel documentation written with rst markup and
generated with Sphinx.
Signed-off-by: Jarkko Sakkinen
---
drivers/char/tpm/tpm_vtpm_proxy.c | 72 +--
include/uapi/linux/vtpm_p
Transitioned the tpm_vtpm_proxy documentation to the Sphinx
infrastructure and removed parts from the documentation that are easier
to pull from the sources. Restructured vtpm_proxy.h and tpm_vtpm_proxy.c
to be compatible with this approach and wrote associated documentation
comments.
Signed-off-b
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