On Friday 27 April 2018 03:11 AM, Laurent Pinchart wrote:
Hi Peter,
Thank you for the patch.
On Friday, 27 April 2018 00:36:44 EEST Peter Rosin wrote:
Could perhaps prevent some confusion.
queued to drm-misc-next
Thanks,
Archit
Signed-off-by: Peter Rosin
On Friday 27 April 2018 03:11 AM, Laurent Pinchart wrote:
Hi Peter,
Thank you for the patch.
On Friday, 27 April 2018 00:36:44 EEST Peter Rosin wrote:
Could perhaps prevent some confusion.
queued to drm-misc-next
Thanks,
Archit
Signed-off-by: Peter Rosin
Reviewed-by: Laurent
On Friday 27 April 2018 03:46 AM, Laurent Pinchart wrote:
Hi Jia-Ju,
Thank you for the patch.
On Wednesday, 11 April 2018 11:33:42 EEST Jia-Ju Bai wrote:
adv7511_probe() is never called in atomic context.
This function is only set as ".probe" in struct i2c_driver.
Despite never getting
On Friday 27 April 2018 03:46 AM, Laurent Pinchart wrote:
Hi Jia-Ju,
Thank you for the patch.
On Wednesday, 11 April 2018 11:33:42 EEST Jia-Ju Bai wrote:
adv7511_probe() is never called in atomic context.
This function is only set as ".probe" in struct i2c_driver.
Despite never getting
On Tuesday 13 February 2018 11:18 PM, Kieran Bingham wrote:
From: Kieran Bingham
The ADV7511 has four 256-byte maps that can be accessed via the main I2C
ports. Each map has it own I2C address and acts as a standard slave
device on the I2C bus.
On Tuesday 13 February 2018 11:18 PM, Kieran Bingham wrote:
From: Kieran Bingham
The ADV7511 has four 256-byte maps that can be accessed via the main I2C
ports. Each map has it own I2C address and acts as a standard slave
device on the I2C bus.
Extend the device tree node bindings to be
On Tuesday 13 February 2018 11:18 PM, Kieran Bingham wrote:
From: Kieran Bingham
The ADV7511 has four 256-byte maps that can be accessed via the main I2C
ports. Each map has it own I2C address and acts as a standard slave
device on the I2C bus.
Allow
On Tuesday 13 February 2018 11:18 PM, Kieran Bingham wrote:
From: Kieran Bingham
The ADV7511 has four 256-byte maps that can be accessed via the main I2C
ports. Each map has it own I2C address and acts as a standard slave
device on the I2C bus.
Allow a device tree node to override the
dges.
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Signed-off-by: Philippe Cornu <philippe.co...@st.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+rene...@ideasonboard.com>
---
This patch follows discussions in:
- "drm: clarify adjusted_mode for a bridge con
dges.
Reviewed-by: Archit Taneja
Signed-off-by: Philippe Cornu
Signed-off-by: Laurent Pinchart
---
This patch follows discussions in:
- "drm: clarify adjusted_mode for a bridge connected to a crtc"
https://patchwork.freedesktop.org/patch/206801/
- "drm: bridge: Constify mode
On Thursday 29 March 2018 12:36 AM, Sean Paul wrote:
Ensure that any queued events are issued when disabling the crtc. This
avoids timeouts when we come back and wait for dependencies (like the
previous frame's flip_done).
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Changes
On Thursday 29 March 2018 12:36 AM, Sean Paul wrote:
Ensure that any queued events are issued when disabling the crtc. This
avoids timeouts when we come back and wait for dependencies (like the
previous frame's flip_done).
Reviewed-by: Archit Taneja
Changes in v2:
- None
Signed-off
On Thursday 29 March 2018 12:36 AM, Sean Paul wrote:
Don't leave the event != NULL once it's consumed, this is used a signal
s/used a/used as a ?
to the atomic helpers that the event will be handled by the driver.
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Changes in v2:
On Thursday 29 March 2018 12:36 AM, Sean Paul wrote:
Don't leave the event != NULL once it's consumed, this is used a signal
s/used a/used as a ?
to the atomic helpers that the event will be handled by the driver.
Reviewed-by: Archit Taneja
Changes in v2:
- None
Cc: Jeykumar Sankaran
On Thursday 29 March 2018 12:36 AM, Sean Paul wrote:
Factor out the commit_tail() portions of complete_commit() into a
separate function to facilitate moving to the atomic helpers in future
patches.
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Changes in v2:
- None
Cc: Je
On Thursday 29 March 2018 12:36 AM, Sean Paul wrote:
Factor out the commit_tail() portions of complete_commit() into a
separate function to facilitate moving to the atomic helpers in future
patches.
Reviewed-by: Archit Taneja
Changes in v2:
- None
Cc: Jeykumar Sankaran
Signed-off
one
Cc: Jeykumar Sankaran <jsa...@codeaurora.org>
Cc: Archit Taneja <arch...@codeaurora.org>
Signed-off-by: Sean Paul <seanp...@chromium.org>
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 77 ++-
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h | 11 +--
drivers/
one
Cc: Jeykumar Sankaran
Cc: Archit Taneja
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 77 ++-
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h | 11 +--
drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c | 12 ++-
drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c |
-by: Stefan Agner <ste...@agner.ch>
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Archit
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_
-by: Stefan Agner
Reviewed-by: Archit Taneja
Archit
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 0f7324a686ca..d729b2b4b66d 100644
--- a/drivers/gpu
or the eDP panel. I don't have any strong opinion
about it, though.
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
Signed-off-by: Alexandru M Stan <ams...@chromium.org>
---
Documentation/devicetree/bindings/display/bridge/analogix_dp.txt | 4
1 file changed,
or the eDP panel. I don't have any strong opinion
about it, though.
Reviewed-by: Archit Taneja
Thanks,
Archit
Signed-off-by: Alexandru M Stan
---
Documentation/devicetree/bindings/display/bridge/analogix_dp.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree
etries for Rockchip then we could adjust
the comment, but it seems more likely that we want the same retry
behavior across all platforms.
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
Cc: Stéphane Marchesin <marc...@chromium.org>
Cc: 征增 王 <w...@rock-chips.com>
adjust
the comment, but it seems more likely that we want the same retry
behavior across all platforms.
Reviewed-by: Archit Taneja
Thanks,
Archit
Cc: Stéphane Marchesin
Cc: 征增 王
Signed-off-by: Douglas Anderson
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Signed-off-by: Enric
ngrade again to debug.
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
Cc: 征增 王 <w...@rock-chips.com>
Signed-off-by: Douglas Anderson <diand...@chromium.org>
Signed-off-by: Sean Paul <seanp...@chromium.org>
Signed-off-by: Thierry Escande <thierr
-by: Archit Taneja
Thanks,
Archit
Cc: 征增 王
Signed-off-by: Douglas Anderson
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: Andrzej Hajda
Signed-off-by: Enric Balletbo i Serra
Tested-by: Marek Szyprowski
---
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 13
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: zain wang
It's too early to detect fast link training, if other step after it
failed, we will set fast_link flag to 1, and retry set_bridge again. In
this case we will power down and power up panel
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: zain wang
It's too early to detect fast link training, if other step after it
failed, we will set fast_link flag to 1, and retry set_bridge again. In
this case we will power down and power up panel power supply, and we
he flush handler thread was finding AUX channel errors and eventually
reported "Failed to apply PSR", where I had a kgdb breakpoint. Presumably
the device would have eventually given up and shut down anyway, but it
seems better to fix the order to be more correct.
Reviewed-by: Archit Tane
inding AUX channel errors and eventually
reported "Failed to apply PSR", where I had a kgdb breakpoint. Presumably
the device would have eventually given up and shut down anyway, but it
seems better to fix the order to be more correct.
Reviewed-by: Archit Taneja
Thanks,
Archit
Cc: Kr
BIT 5 SLAVE_VID_FUNC_EN_N
on Rockchip edp phy,
BIT 7 reserved
BIT 6 RK_VID_CAP_FUNC_EN_N
BIT 5 RK_VID_FIFO_FUNC_EN_N
So, we should do some private operations to Rockchip.
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
Cc: Tomasz Figa <tf...@chrom
edp phy,
BIT 7 reserved
BIT 6 RK_VID_CAP_FUNC_EN_N
BIT 5 RK_VID_FIFO_FUNC_EN_N
So, we should do some private operations to Rockchip.
Reviewed-by: Archit Taneja
Thanks,
Archit
Cc: Tomasz Figa
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off
viewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
Cc: Douglas Anderson <diand...@chromium.org>
Signed-off-by: zain wang <w...@rock-chips.com>
Signed-off-by: Sean Paul <seanp...@chromium.org>
Signed-off-by: Thierry Escande <thierry.esca...@collabora.com&
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: zain wang
There is no register named ANALOGIX_DP_PLL_CTL in Rockchip edp phy reg
list. We should use BIT_4 in ANALOGIX_DP_PD to control the pll power
instead of ANALOGIX_DP_PLL_CTL.
Reviewed-by: Archit Taneja
fact, we can go continue and the streamclk is ok if we wait enough time,
it does no effect on display.
Let's change this error to warn.
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
Cc: Douglas Anderson <diand...@chromium.org>
Signed-off-by: zain wang <w...@rock
streamclk is ok if we wait enough time,
it does no effect on display.
Let's change this error to warn.
Reviewed-by: Archit Taneja
Thanks,
Archit
Cc: Douglas Anderson
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: Andrzej Hajda
Signed-off
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: zain wang <w...@rock-chips.com>
If we failed disable psr, it would hang the display until next psr
cycle coming. So we should restore psr->state when it failed.
For the bridge part,
Reviewed-by: Archit Tan
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: zain wang
If we failed disable psr, it would hang the display until next psr
cycle coming. So we should restore psr->state when it failed.
For the bridge part,
Reviewed-by: Archit Taneja
Thanks,
Archit
Cc: Tom
ave been replaced with EREMOTEIOs after this
change. Maybe we set it the error no in ret and return ret?
With those changes,
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
}
IO;
A couple of ETIMEDOUTs have been replaced with EREMOTEIOs after this
change. Maybe we set it the error no in ret and return ret?
With those changes,
Reviewed-by: Archit Taneja
Thanks,
Archit
}
D/ANALOGIX_DP_PD, right? AUX_PD
sounds like just one of the fields of the register.
With that,
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
Cc: Douglas Anderson <diand...@chromium.org>
Signed-off-by: zain wang <w...@rock-chips.com>
Signed-off-by: Sean P
ht? AUX_PD
sounds like just one of the fields of the register.
With that,
Reviewed-by: Archit Taneja
Thanks,
Archit
Cc: Douglas Anderson
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: Andrzej Hajda
Signed-off-by: Enric Balletbo i Serra
Tested
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: Lin Huang <h...@rock-chips.com>
We need to check the dpcd write/read return value to see whether the
write/read was successful
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
Cc
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: Lin Huang
We need to check the dpcd write/read return value to see whether the
write/read was successful
Reviewed-by: Archit Taneja
Thanks,
Archit
Cc: Kristian H. Kristensen
Signed-off-by: Lin Huang
Signed-off
Since there is no reason to disable it, we just
enable it at the beginning of link training and then keep it on all the
time.
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
Cc: Tomasz Figa <tf...@chromium.org>
Signed-off-by: zain wang <w...@rock-chips.com>
Signed-
it, we just
enable it at the beginning of link training and then keep it on all the
time.
Reviewed-by: Archit Taneja
Thanks,
Archit
Cc: Tomasz Figa
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: Andrzej Hajda
Signed-off-by: Enric Balletbo i
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: Lin Huang <h...@rock-chips.com>
There was a 1ms delay to detect the hpd signal, which is too short to
detect a short pulse. This patch extends this delay to 100ms.
Reviewed-by: Archit Taneja <arch...@codea
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: Lin Huang
There was a 1ms delay to detect the hpd signal, which is too short to
detect a short pulse. This patch extends this delay to 100ms.
Reviewed-by: Archit Taneja
Thanks,
Archit
Cc: Stéphane Marchesin
Cc: 征
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: Lin Huang <h...@rock-chips.com>
When panel is shut down, we should make sure edp can be disabled to avoid
undefined behavior.
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
Cc: Stépha
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: Lin Huang
When panel is shut down, we should make sure edp can be disabled to avoid
undefined behavior.
Reviewed-by: Archit Taneja
Thanks,
Archit
Cc: Stéphane Marchesin
Signed-off-by: Lin Huang
Signed-off
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: zain wang <w...@rock-chips.com>
Following the correct power up sequence:
dp_pd=ff => dp_pd=7f => wait 10us => dp_pd=00
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
Cc: Sté
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: zain wang
Following the correct power up sequence:
dp_pd=ff => dp_pd=7f => wait 10us => dp_pd=00
Reviewed-by: Archit Taneja
Thanks,
Archit
Cc: Stéphane Marchesin
Signed-off-by: zain wang
Signed-off-by:
a link with it.
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
Cc: Stéphane Marchesin <marc...@chromium.org>
Signed-off-by: zain wang <w...@rock-chips.com>
Signed-off-by: Sean Paul <seanp...@chromium.org>
Signed-off-by: Thierry Escande <thierry.esca...@co
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: zain wang
According to DP spec v1.3 chap 3.5.1.2 Link Training, Link Policy Maker
must first detect that the HPD signal is asserted high by the Downstream
Device before establishing a link with it.
Reviewed-by: Archit
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: zain wang <w...@rock-chips.com>
When we enable bridge failed, we have to retry it, otherwise we would get
the abnormal display.
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
From: zain wang
When we enable bridge failed, we have to retry it, otherwise we would get
the abnormal display.
Reviewed-by: Archit Taneja
Thanks,
Archit
Cc: Stéphane Marchesin
Signed-off-by: zain wang
Signed-off
t link training. Let's reset fast_train_enable in
analogix_dp_bridge_disable();
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
Cc: Stéphane Marchesin <marc...@chromium.org>
Signed-off-by: zain wang <w...@rock-chips.com>
Signed-off-by: Sean Paul <seanp.
fast_train_enable in
analogix_dp_bridge_disable();
Reviewed-by: Archit Taneja
Thanks,
Archit
Cc: Stéphane Marchesin
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Signed-off-by: Enric Balletbo i Serra
Tested-by: Marek Szyprowski
---
drivers/gpu/drm/bridge
On Saturday 10 March 2018 03:52 AM, Enric Balletbo i Serra wrote:
From: Lin Huang <h...@rock-chips.com>
We should check AUX_EN bit to confirm the AUX CH operation is completed.
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
Cc: Stéphane Mar
On Saturday 10 March 2018 03:52 AM, Enric Balletbo i Serra wrote:
From: Lin Huang
We should check AUX_EN bit to confirm the AUX CH operation is completed.
Reviewed-by: Archit Taneja
Thanks,
Archit
Cc: Stéphane Marchesin
Signed-off-by: Lin Huang
Signed-off-by: zain wang
Signed-off
On Saturday 10 March 2018 03:52 AM, Enric Balletbo i Serra wrote:
From: Lin Huang
We need to enable video before analogix_dp_is_video_stream_on(), so
we can get the right video stream status.
Cc: 征增 王
Cc: Stéphane Marchesin
On Saturday 10 March 2018 03:52 AM, Enric Balletbo i Serra wrote:
From: Lin Huang
We need to enable video before analogix_dp_is_video_stream_on(), so
we can get the right video stream status.
Cc: 征增 王
Cc: Stéphane Marchesin
Signed-off-by: Lin Huang
Signed-off-by: Sean Paul
we're exiting.
With the subject fix:
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Thanks,
Archit
Cc: Stéphane Marchesin <marc...@chromium.org>
Cc: Sonny Rao <sonny...@chromium.org>
Signed-off-by: zain wang <w...@rock-chips.com>
Signed-off-by: Sean Paul <
.
With the subject fix:
Reviewed-by: Archit Taneja
Thanks,
Archit
Cc: Stéphane Marchesin
Cc: Sonny Rao
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Signed-off-by: Enric Balletbo i Serra
Tested-by: Marek Szyprowski
---
drivers/gpu/drm/bridge/analogix
de
+#include
#include
+#include
+#include
+#include
#include
#include
-#include
-#include
#include
+#include
This re-ordering doesn't seem like it should be a part of this patch,
you can let it stay if it happens to cause conflicts with future
patches. Other than that:
Reviewed-by: A
of this patch,
you can let it stay if it happens to cause conflicts with future
patches. Other than that:
Reviewed-by: Archit Taneja
Thanks,
Archit
#include
#include
@@ -35,6 +36,8 @@
#define to_dp(nm) container_of(nm, struct analogix_dp_device, nm)
+static const bool
viewed-by: Archit Taneja <arch...@codeaurora.org>
Cc: Tomeu Vizoso <tomeu.viz...@collabora.com>
Cc: Sean Paul <seanp...@chromium.org>
Signed-off-by: zain wang <w...@rock-chips.com>
Signed-off-by: Caesar Wang <w...@rock-chips.com>
[seanpaul fixed up the commit message a bit a
On Saturday 10 March 2018 03:52 AM, Enric Balletbo i Serra wrote:
From: zain wang
There is a race between AUX CH bring-up and enabling bridge which will
cause link training to fail. To avoid hitting it, don't change psr state
while enabling the bridge.
Reviewed-by: Archit Taneja
Cc
viewed-by: Archit Taneja <arch...@codeaurora.org>
Cc: 征增 王 <w...@rock-chips.com>
Cc: Stéphane Marchesin <marc...@chromium.org>
Signed-off-by: Yakir Yang <y...@rock-chips.com>
[seanpaul changed timeout loop to a readx poll]
Signed-off-by: Sean Paul <seanp...@chromium.or
On Saturday 10 March 2018 03:52 AM, Enric Balletbo i Serra wrote:
From: Yakir Yang
Make sure the request PSR state takes effect in analogix_dp_send_psr_spd()
function, or print the sink PSR error state if we failed to apply the
requested PSR setting.
Reviewed-by: Archit Taneja
Cc: 征增 王
Hi,
On Friday 09 March 2018 07:21 PM, Jacopo Mondi wrote:
Hello,
after some discussion on the proposed bindings for generic lvds decoder and
Thine THC63LVD1024, I decided to drop the THC63 specific part and just live with
a transparent decoder that does not support any configuration from
Hi,
On Friday 09 March 2018 07:21 PM, Jacopo Mondi wrote:
Hello,
after some discussion on the proposed bindings for generic lvds decoder and
Thine THC63LVD1024, I decided to drop the THC63 specific part and just live with
a transparent decoder that does not support any configuration from
Hi,
On Tuesday 06 March 2018 03:23 PM, Neil Armstrong wrote:
Hi Architt,
On 23/02/2018 12:44, Neil Armstrong wrote:
The Amlogic Meson GX SoCs, embedded the v2.01a controller, has been also
identified needing this workaround.
This patch adds the corresponding version to enable a single
Hi,
On Tuesday 06 March 2018 03:23 PM, Neil Armstrong wrote:
Hi Architt,
On 23/02/2018 12:44, Neil Armstrong wrote:
The Amlogic Meson GX SoCs, embedded the v2.01a controller, has been also
identified needing this workaround.
This patch adds the corresponding version to enable a single
when needed.
Idea was taken from the following commit:
8242ecbd597d ("drm/bridge/synopsys: stop clobbering drvdata")
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Cc: p.za...@pengutronix.de
Cc: narmstr...@baylibre.com
Cc: laurent.pinch...@ideasonboard.com
Cc: h...@rock-
when needed.
Idea was taken from the following commit:
8242ecbd597d ("drm/bridge/synopsys: stop clobbering drvdata")
Reviewed-by: Archit Taneja
Cc: p.za...@pengutronix.de
Cc: narmstr...@baylibre.com
Cc: laurent.pinch...@ideasonboard.com
Cc: h...@rock-chips.com
Cc: he...@sntec
be reused.
Functions exported here are actually not specific to Synopsys PHYs but
to DWC HDMI controller PHY interface. This means that even if the PHY is
completely custom, i.e. not designed by Synopsys, exported functions can
be useful.
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Re
be reused.
Functions exported here are actually not specific to Synopsys PHYs but
to DWC HDMI controller PHY interface. This means that even if the PHY is
completely custom, i.e. not designed by Synopsys, exported functions can
be useful.
Reviewed-by: Archit Taneja
Reviewed-by: Neil Armstrong
nch...@ideasonboard.com>
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Signed-off-by: Jernej Skrabec <jernej.skra...@siol.net>
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdm
On Thursday 15 February 2018 01:38 AM, Jernej Skrabec wrote:
Allwinner SoCs have dw hdmi controller v1.32a which exhibits same
magenta line issue as i.MX6Q and i.MX6DL. Enable workaround for it.
Tests show that one iteration is enough.
Acked-by: Laurent Pinchart
Reviewed-by: Archit Taneja
On 01/26/2018 06:14 AM, Brian Norris wrote:
On Thu, Jan 25, 2018 at 11:37:59AM +0100, Philippe Cornu wrote:
The dcs/generic dsi read feature is not yet implemented so it
is important to warn the host_transfer() caller in case of
read operation requests.
Signed-off-by: Philippe Cornu
On 01/26/2018 06:14 AM, Brian Norris wrote:
On Thu, Jan 25, 2018 at 11:37:59AM +0100, Philippe Cornu wrote:
The dcs/generic dsi read feature is not yet implemented so it
is important to warn the host_transfer() caller in case of
read operation requests.
Signed-off-by: Philippe Cornu
On 01/26/2018 06:16 AM, Brian Norris wrote:
On Thu, Jan 25, 2018 at 11:38:00AM +0100, Philippe Cornu wrote:
The dw_mipi_dsi_host_transfer() must return the number of
bytes transmitted/received on success instead of 0.
Note: As the read feature is not implemented, only the
transmitted number
On 01/26/2018 06:16 AM, Brian Norris wrote:
On Thu, Jan 25, 2018 at 11:38:00AM +0100, Philippe Cornu wrote:
The dw_mipi_dsi_host_transfer() must return the number of
bytes transmitted/received on success instead of 0.
Note: As the read feature is not implemented, only the
transmitted number
On 01/26/2018 03:24 PM, Philippe CORNU wrote:
Hi Brian,
And a big thanks for your Tested-by
On 01/25/2018 11:47 PM, Brian Norris wrote:
On Thu, Jan 25, 2018 at 7:55 AM, Philippe Cornu wrote:
The "adjusted_mode" clock value (ie the real pixel clock) is more
accurate
On 01/26/2018 03:24 PM, Philippe CORNU wrote:
Hi Brian,
And a big thanks for your Tested-by
On 01/25/2018 11:47 PM, Brian Norris wrote:
On Thu, Jan 25, 2018 at 7:55 AM, Philippe Cornu wrote:
The "adjusted_mode" clock value (ie the real pixel clock) is more
accurate than "mode" clock value
Hi,
On 01/22/2018 06:20 PM, Kieran Bingham wrote:
The ADV7511 has four 256-byte maps that can be accessed via the main I²C
ports. Each map has it own I²C address and acts as a standard slave
device on the I²C bus.
Allow a device tree node to override the default addresses so that
address
Hi,
On 01/22/2018 06:20 PM, Kieran Bingham wrote:
The ADV7511 has four 256-byte maps that can be accessed via the main I²C
ports. Each map has it own I²C address and acts as a standard slave
device on the I²C bus.
Allow a device tree node to override the default addresses so that
address
On 01/10/2018 02:02 AM, Brian Norris wrote:
This takes care of 2 TODOs in this driver, by using the common DSI
packet-marshalling code instead of our custom short/long write code.
This both saves us some duplicated code and gets us free support for
command types that weren't already part of
On 01/10/2018 02:02 AM, Brian Norris wrote:
This takes care of 2 TODOs in this driver, by using the common DSI
packet-marshalling code instead of our custom short/long write code.
This both saves us some duplicated code and gets us free support for
command types that weren't already part of
On 01/10/2018 08:03 PM, Andrzej Hajda wrote:
On 09.01.2018 21:32, Brian Norris wrote:
We're filling the "remainder" word with little-endian data, then writing
it out to IO registers with endian-correcting writel(). That probably
won't work on big-endian systems.
Let's mark the "remainder"
On 01/10/2018 08:03 PM, Andrzej Hajda wrote:
On 09.01.2018 21:32, Brian Norris wrote:
We're filling the "remainder" word with little-endian data, then writing
it out to IO registers with endian-correcting writel(). That probably
won't work on big-endian systems.
Let's mark the "remainder"
On 01/09/2018 08:18 PM, Thierry Escande wrote:
From: Jeffy Chen
Add missing pm_runtime_disable() in bind()'s error handling path.
Also cleanup encoder & connector in unbind().
I guess you'll need to drop this commit if this patch goes in first:
On 01/09/2018 08:18 PM, Thierry Escande wrote:
From: Jeffy Chen
Add missing pm_runtime_disable() in bind()'s error handling path.
Also cleanup encoder & connector in unbind().
I guess you'll need to drop this commit if this patch goes in first:
On 12/12/2017 06:40 AM, Nickey Yang wrote:
Add the ROCKCHIP DSI controller driver that uses the Synopsys DesignWare
MIPI DSI host controller bridge.
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
Signed-off-by: Nickey Yang <nickey.y...@rock-chips.com>
Signed-off-by:
On 12/12/2017 06:40 AM, Nickey Yang wrote:
Add the ROCKCHIP DSI controller driver that uses the Synopsys DesignWare
MIPI DSI host controller bridge.
Reviewed-by: Archit Taneja
Signed-off-by: Nickey Yang
Signed-off-by: Brian Norris
Reviewed-by: Brian Norris
Reviewed-by: Sean Paul
On 01/09/2018 08:18 PM, Thierry Escande wrote:
Hi,
This patchset makes edp display work on Chromebook kevin.
This patchset has been originally posted by Jeffy Chen and the 2 first
commits from the previous version (v6) are already merged in mainline.
This v7 has been rebased on top of
On 01/09/2018 08:18 PM, Thierry Escande wrote:
Hi,
This patchset makes edp display work on Chromebook kevin.
This patchset has been originally posted by Jeffy Chen and the 2 first
commits from the previous version (v6) are already merged in mainline.
This v7 has been rebased on top of
lt;thierry.esca...@collabora.com>
Reviewed-by: Neil Armstrong <narmstr...@baylibre.com>
Reviewed-by: Archit Taneja <arch...@codeaurora.org>
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 43 ++---
drivers/gpu/drm/imx/dw_hdmi-imx.c | 22 +
On 01/09/2018 08:18 PM, Thierry Escande wrote:
From: Jeffy Chen
Let plat drivers own the drvdata, so that they could cleanup resources
in their unbind().
Signed-off-by: Jeffy Chen
Signed-off-by: Thierry Escande
Reviewed-by: Neil Armstrong
Reviewed-by: Archit Taneja
---
drivers/gpu
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