There is a M4 Core for genernal purpose and a DSP core for audio,
add bootaux function in U-Boot to startup the core.
The DSP image is an ELF image.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8/cpu.c | 179 +++
1 file changed, 179 insertions(+)
diff
From: Ye Li
When doing "i2c dev 4; i2c probe" with ENET daughter card connected
on iMX8QXP MEK board, we met a i2c bus busy issue, that the BBF of
lpi2c always show busy, but the master is idle, and stop is detected
(SDF set).
This patch addes a handling to re-init the lpi2c master for this
case
Add board level codes and configs for i.MX8QXP MEK board.
- Enabled DM driver:
FEC, LPUART, LPI2C, GPIO, SD/MMC, PCA953X, pinctrl, Power-domain
- Board defconfigs:
imx8qxp_mek_defconfig
Boot log:
"
U-Boot 2018.05-00384-g8907416f0e (May 28 2018 - 14:06:27 +0800)
CPU: Freescale i.MX8QXP rev
Add off-on-delay-us for fixed regulator.
Signed-off-by: Peng Fan
Cc: Simon Glass
---
drivers/power/regulator/fixed.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c
index 0be5b7bd51..b72ad98cb8 100644
--- a/drivers/powe
From: Ye Li
When the power domain driver is enabled, we need to enable clocks after power
domain on. So the clock settings can't set in board_init, needs to set them
when the device is probed. Add this weak function in driver, that SoC codes
can implement the clock settings.
Reviewed-by: Peng Fa
Add pinctrl driver for i.MX8. The pads configuration is controlled
by SCU, so need to ask SCU to configure pads through scfw API.
Add pinctrl-scu to invoke sc_pad_set to configue pads.
Add a new flag IMX8_USE_SCU to differentiate i.MX8 from other platforms
which could directly configure pads from A
Implement imx_get_mac_from_fuse for i.MX8, this will be used by fec_mxc
driver to get the mac address.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8/cpu.c | 44
1 file changed, 44 insertions(+)
diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/ar
Add get_boot_device to detect boot device.
Add print_bootinfo to print the boot device info.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8/sys_proto.h | 10
arch/arm/mach-imx/imx8/cpu.c | 88 +-
2 files changed, 97 insertions(+), 1 dele
Implement mmc_get_env_dev for i.MX8.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8/cpu.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c
index 7aecaac356..fa32a9362c 100644
--- a/arch/arm/mac
From: Gao Pan
For LPI2C IP, NACK is detected by the rising edge of the ninth clock.
In current uboot driver, once NACK is detected, it will reset and then
disable LPI2C master. As a result, we can never see the falling edge
of the ninth clock.
Signed-off-by: Gao Pan
Signed-off-by: Peng Fan
Cc:
From: Ye Li
Enable the RX and TX FIFO in LPUART driver to avoid the input lost
during u-boot boot up.
Signed-off-by: Ye Li
Acked-by: Peng Fan
---
drivers/serial/serial_lpuart.c | 33 ++---
1 file changed, 26 insertions(+), 7 deletions(-)
diff --git a/drivers/seria
From: Ye Li
In xfer function, both bus_i2c_read and bus_i2c_write will
send a STOP command. This causes a problem when reading register
data from i2c device.
Generally two operations comprise the register data reading:
1. Write the register address to i2c device.
START | chip_addr | W
Add arch_cpu_init mainly to open the channel between ACore and SCU.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8/imx-regs.h | 2 ++
arch/arm/include/asm/arch-imx8/sys_proto.h | 9 +++
arch/arm/mach-imx/imx8/cpu.c | 40 ++
3 files cha
Add the PCA9646 support, which is 2-wire bus switch and buffered 4-channel.
Signed-off-by: Peng Fan
---
drivers/i2c/muxes/pca954x.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/pca954x.c
index 4debc03957..ab8b4000af 1
Add power_domain_lookup_name interface to power domain uclass to find
a power domain device by its DTB node name, not using its associated
client device.
Through this interface, we can operate the power domain devices directly.
This is needed for non-DM drivers.
Signed-off-by: Ye Li
Signed-off-b
Add the power domain DM driver for i.MX8, that it depends on the DTB
power domain trees to generate the power domain provider devices. Users
needs add power domain trees with property "compatible = "nxp,imx8-pd";"
When power on one PD device, the driver will power on its ancestor PD
devices in pow
On 28.05.2018 12:42, Baruch Siach wrote:
__twsi_i2c_init() is called from the main U-Boot image, but not from SPL as
far as my testing shows. Clearfog doesn't use i2c from SPL, but the Turris
board does.
Can't you switch to DM_I2C then? This should make sure, that the probe
function is alway
From: Ye Li
When sd/mmc work at DDR mode, like HS400/HS400ES/DDR52/DDR50 mode,
the actual clock rate is just half of the expected clock.
This patch set the DDR_EN bit first for DDR mode, hardware divide
the usdhc clock automatically, then follow the original sdr clock
setting method.
Signed-off
This patch added support to get reg base address from DTS file
and added rxfifo() and txfifo() functions to add the modularity.
Also, this patch is for the startup block issue in the spi controller.
SPI clock is passing through STARTUP block to FLASH. STARTUP block
don't provide clock as soon as Q
cmd_tbl_t is defined in command.h, so include it in log.h
Signed-off-by: Peng Fan
Cc: Simon Glass
---
include/log.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/log.h b/include/log.h
index a3edd25546..51cfd6fc0b 100644
--- a/include/log.h
+++ b/include/log.h
@@ -9,6 +9,7 @@
#ifn
Enable power domain associated with the device when probe.
Signed-off-by: Peng Fan
Cc: Simon Glass
---
drivers/core/device.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/core/device.c b/drivers/core/device.c
index e048e1a659..b6950d9dbb 100644
--- a/drivers/core/device.c
+
Introduce dtsi file for i.MX8QXP.
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile |2 +
arch/arm/dts/fsl-imx8qxp-mek.dts | 416
arch/arm/dts/fsl-imx8qxp.dtsi | 1593 +
include/dt-bindings/clock/imx8qxp-clock.h |
Hi Simon,
On Fri, May 25, 2018 at 4:42 AM, Simon Glass wrote:
> On 23 May 2018 at 08:07, Mario Six wrote:
>> Add driver for the IHS IO endpoint on IHS FPGAs.
>>
>> Signed-off-by: Mario Six
>>
>> ---
>>
>> v2 -> v3:
>> No changes
>>
>> v1 -> v2:
>> * Switched to regmap usage (instead of fpgamap)
On Mon, 28 May 2018 14:34:07 +0200
Stefan Roese wrote:
> On 28.05.2018 12:42, Baruch Siach wrote:
>
>
>
> > __twsi_i2c_init() is called from the main U-Boot image, but not
> > from SPL as far as my testing shows. Clearfog doesn't use i2c
> > from SPL, but the Turris board does.
>
Hi Simon,
On Fri, May 25, 2018 at 4:41 AM, Simon Glass wrote:
> Hi Mario,
>
> On 23 May 2018 at 08:07, Mario Six wrote:
>> Add generic enable/disable function to the misc uclass.
>>
>> Signed-off-by: Mario Six
>>
>> ---
>>
>> v2 -> v3:
>> * Now return old state from misc_set_enabled
>>
>> v1 ->
Just an FYI, earlier this month the team spent some time polishing and
publishing in source.android.com documentation about the flows the
bootloader goes through in Android, specially true for stock Android like
in Pixels phones or other devices based of recent AOSP versions.
Take a look at https:
(Added Mario and Chris)
On 27.05.2018 17:34, Baruch Siach wrote:
From: Rabeeh Khoury
Some QCA988x based modules presence is not detected by the SERDES lanes,
so force this detection which will trigger the LTSSM state machine to
negotiate link.
An example of such a card is WLE900VX.
Signed-of
Hi Simon,
On Fri, May 25, 2018 at 4:41 AM, Simon Glass wrote:
> +Marex
>
> Hi Mario,
>
> On 23 May 2018 at 08:07, Mario Six wrote:
>> The comments in misc.h are not in kernel-doc format. Correct the format.
>>
>> Signed-off-by: Mario Six
>>
>> ---
>>
>> v2 -> v3:
>> New in v3
>>
>> ---
>> incl
Hi Stefan,
On Mon, May 28, 2018 at 2:52 PM, Stefan Roese wrote:
> (Added Mario and Chris)
>
>
> On 27.05.2018 17:34, Baruch Siach wrote:
>>
>> From: Rabeeh Khoury
>>
>> Some QCA988x based modules presence is not detected by the SERDES lanes,
>> so force this detection which will trigger the LTSS
Hi Alex, Sam,
Sam have you tested Alex patches on your HW (as you asked earlier for
the repo to fetch the code)?
Could you add Tested-by: tag?
Are there any more comments on this series?
Best regards,
Łukasz
> This series merges the fastboot UDP support from AOSP into mainline
> U-Boot.
>
> C
MiniZed is a single-core Zynq 7Z007S development board.
More information on this board: http://zedboard.org/product/minized
Signed-off-by: Clement Laigle
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/zynq-minized.dts | 61 ++
configs/zynq_mini
On 26.05.2018 12:32, Chris Packham wrote:
This was being used by some Marvell boards to enable some file system
related features (many of which have already been moved to Kconfig).
Make the future migration of the final 2 or 3 config options easier by
expanding #define CONFIG_SYS_MVFS into the op
On Mon, May 28, 2018 at 12:02:31PM +0200, Alex Deymo wrote:
> Hi,
> I checked with our team and the include/dt_table.h import as BSD-3 here is
> fine with us. Would you like me to send a patch with just this header file
> or just Signed-off-by this whole patch?
> Thanks,
> deymo@
Thanks and pleas
On 28.05.2018 16:16, Rabeeh Khoury wrote:
I understand that this might fix an issue on a specific board (ClearFog
in this case, correct?). But are you sure that its safe to force this
link detection for all A38x boards?
We have tested on clearfog-pro / base and two other custom bo
On 28.05.2018 15:15, Mario Six wrote:
Hi Stefan,
On Mon, May 28, 2018 at 2:52 PM, Stefan Roese wrote:
(Added Mario and Chris)
On 27.05.2018 17:34, Baruch Siach wrote:
From: Rabeeh Khoury
Some QCA988x based modules presence is not detected by the SERDES lanes,
so force this detection whic
Android documentation defines the recommended image format for storing
DTB/DTBO files in a single dtbo.img image. This patch includes the
latest header file with the struct definitions for this format from
AOSP.
The header was adapted to U-Boot's coding style and the function
declarations were rem
From: Jon Nettleton
This switches the clearfog boards to use DM based gpio and i2c
drivers. The io expanders are configured via their device-tree
entries.
Signed-off-by: Jon Nettleton
[baruch: add DT i2c aliases]
Signed-off-by: Baruch Siach
---
The context lines in this patch depend on the p
You need both patches in order for it to work.
I tested these patches on Pinebook and Pine64 LTS, both were able to
boot from eMMC. What board are you using?
On Sun, May 27, 2018 at 11:43 AM, Jagan Teki wrote:
> On Mon, May 14, 2018 at 8:57 PM, Vasily Khoruzhick wrote:
>> That is necessary for
On Mon, May 14, 2018 at 06:47:51PM +0300, Tuomas Tynkkynen wrote:
> Now that PCI devices work with highmem-enabled QEMU emulation, bump up
> the RAM size in the MMU tables to gain access to the full 255 GB of RAM
> potential instead of the puny 3 GB.
>
> Signed-off-by: Tuomas Tynkkynen
> Reviewe
On Mon, May 14, 2018 at 06:47:50PM +0300, Tuomas Tynkkynen wrote:
> Currently, qemu_arm_defconfig and qemu_arm64_defconfig only work with
> the 'highmem=off' parameter passed to QEMU's virt machine. The reason is
> that when 'highmem' is not disabled, QEMU appends 64-bit a memory
> resource to the
On Mon, May 14, 2018 at 06:47:52PM +0300, Tuomas Tynkkynen wrote:
> Now that U-Boot works fine with highmem enabled, there is no need to
> tell users to disable highmem.
>
> Signed-off-by: Tuomas Tynkkynen
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
De
On Wed, May 16, 2018 at 12:13:37PM +0300, Ramon Fried wrote:
> Failure to set the clocks will causes data abort exception when
> trying to write to AHB uart registers.
> This patch ensures that we don't touch these registers if clock
> setting failed.
>
> Signed-off-by: Ramon Fried
> Reviewed-by
On Mon, May 14, 2018 at 11:50:05PM +0300, Tuomas Tynkkynen wrote:
> Add a doc comment for pciauto_region_allocate().
>
> Signed-off-by: Tuomas Tynkkynen
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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On Wed, May 16, 2018 at 05:27:11PM +0200, Radoslaw Pietrzyk wrote:
> - adds reading FMC swap setting from DTB to SDRAM driver
> - sets FMC swap for stm32f429-disco board
> - changes ram start address to 0x9000
>
> Signed-off-by: Radoslaw Pietrzyk
> Acked-by: Patrice Chotard
Applied to u-bo
On Wed, May 16, 2018 at 12:13:39PM +0300, Ramon Fried wrote:
> UART clock enabling flow was wrong.
> Changed the flow according to downstream implementation in LK.
>
> Signed-off-by: Ramon Fried
Applied to u-boot/master, thanks!
--
Tom
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__
On Wed, May 16, 2018 at 08:34:14PM +1200, Chris Packham wrote:
> Now that there are more boards defining this it can be removed from the
> whitelist.
>
> Signed-off-by: Chris Packham
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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Description: PGP signatur
On Thu, May 17, 2018 at 02:50:44PM +0200, Patrice Chotard wrote:
> From: Patrick Delaunay
>
> Implements serial setparity ops to allow uart parity change.
> It allows to select ODD, EVEN or NONE parity.
>
> Signed-off-by: Patrick Delaunay
> Signed-off-by: Patrice Chotard
Applied to u-boot/ma
On Thu, May 17, 2018 at 03:24:07PM +0200, Patrice Chotard wrote:
> From: Patrick Delaunay
>
> Use OTP57 and 58 for MAC address
> - OTP57 = MAC address bits [31:0]
> - OTP58 = MAC address bit [47:32] stored in OTP LSB's
>
> Use manufacture information in OTP13 to OTP15 to build unique
> chip
On Wed, May 16, 2018 at 12:13:36PM +0300, Ramon Fried wrote:
> The clock and serial nodes are needed before relocation.
> This patch ensures that the msm-serial driver will probe
> and provide uart output before relocation.
>
> Signed-off-by: Ramon Fried
> Reviewed-by: Simon Glass
Applied to u
On Wed, May 16, 2018 at 12:13:42PM +0300, Ramon Fried wrote:
> Serial port configuration was missing from previous implementation.
> It only worked because it was preconfigured by LK.
> This patch configures the uart for 115200 8N1.
> It also configures the pin mux for uart pins using DT bindings.
On Wed, May 16, 2018 at 12:13:40PM +0300, Ramon Fried wrote:
> This patch adds pinmux and pinctrl driver for TLMM
> subsystem in snapdragon chipsets.
> Currently, supporting only 8016, but implementation is
> generic and 8096 can be added easily.
>
> Driver is using the generic dt-bindings and do
On Thu, May 17, 2018 at 03:24:06PM +0200, Patrice Chotard wrote:
> From: Patrick Delaunay
>
> Add support of fuse command (read/write/program/sense)
> on bank 0 to access to BSEC SAFMEM (4096 OTP bits).
>
> Signed-off-by: Patrick Delaunay
> Signed-off-by: Patrice Chotard
Applied to u-boot/ma
On Thu, May 17, 2018 at 02:50:42PM +0200, Patrice Chotard wrote:
> From: Patrick Delaunay
>
> Add support for early debug printf, before the availability of
> driver model and device tree support.
>
> Signed-off-by: Patrick Delaunay
> Signed-off-by: Patrice Chotard
> Reviewed-by: Simon Glass
On Mon, May 14, 2018 at 07:38:13PM +0300, Tuomas Tynkkynen wrote:
> Currently, if we happen to allocate an address requiring 64 bits to a
> device only supporting 32-bit BARs, the address eventually gets silently
> truncated to 32 bits. Avoid this by adding a new flag to
> pciauto_region_allocate(
On Mon, May 14, 2018 at 07:38:12PM +0300, Tuomas Tynkkynen wrote:
> All of the debug output from this file is squished to one line. Fix
> it.
>
> Signed-off-by: Tuomas Tynkkynen
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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___
On Thu, May 17, 2018 at 03:24:05PM +0200, Patrice Chotard wrote:
> From: Patrick Delaunay
>
> Add a MISC driver with read and write access to BSEC IP
> (Boot and Security and OTP control)
> - offset 0: shadowed values
> - offset 0x8000: OTP fuse box values (SAFMEM)
>
> Signed-off-by: Patric
On Thu, May 17, 2018 at 02:50:46PM +0200, Patrice Chotard wrote:
> From: Patrick Delaunay
>
> Add the needed information to enable the debug uart
> to have printf before the serial driver probe
> (so before probe for clock, pincontrol and reset drivers)
>
> To enable the debug on uart 4 (defaul
On Thu, May 17, 2018 at 03:24:04PM +0200, Patrice Chotard wrote:
> From: Patrick Delaunay
>
> The register TAMP_BOOT_CONTEXT is already updated in
> get_bootmode() in cpu.c and no need to be done
> twice.
>
> Signed-off-by: Patrick Delaunay
> Signed-off-by: Patrice Chotard
Applied to u-boot/
On Wed, May 16, 2018 at 12:13:38PM +0300, Ramon Fried wrote:
> The uart is already initialized prior to relocation,
> reinitialization after relocation is unnecessary.
>
> Signed-off-by: Ramon Fried
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Descripti
On Fri, May 18, 2018 at 06:03:12PM +0800, Ley Foon Tan wrote:
> Follow implementation in mALLOc(). Check GD_FLG_FULL_MALLOC_INIT flag and use
> malloc_simple if GD_FLG_FULL_MALLOC_INIT is unset. Adjust the malloc bytes
> to align with the requested alignment.
>
> The original memalign() function
On Wed, May 16, 2018 at 12:13:41PM +0300, Ramon Fried wrote:
> Added TLMM pinctrl node for pin muxing & config.
> Additionally, added a serial node for uart.
>
> Signed-off-by: Ramon Fried
Applied to u-boot/master, thanks!
--
Tom
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On Sat, May 26, 2018 at 04:18:45PM -0600, Simon Glass wrote:
> Hi,
>
> On 15 May 2018 at 19:52, Simon Glass wrote:
> > This series ads a few more features to binman, principally the ability to
> > nest entries within other entries, to form hierarchical images.
> >
> > Also included are support fo
On Sat, May 19, 2018 at 06:21:37PM +0800, Kelvin Cheung wrote:
> Add FIT data-position & data-offset property support for bootm,
> which were already supported in SPL.
>
> Signed-off-by: Kelvin Cheung
Applied to u-boot/master, thanks!
--
Tom
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On Thu, May 17, 2018 at 02:50:45PM +0200, Patrice Chotard wrote:
> From: Patrick Delaunay
>
> Add possibility to update the serial parity used.
>
> Signed-off-by: Patrick Delaunay
> Signed-off-by: Patrice Chotard
Applied to u-boot/master, thanks!
--
Tom
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On 05/28/2018 09:12 PM, Tom Rini wrote:
On Wed, May 16, 2018 at 12:13:39PM +0300, Ramon Fried wrote:
UART clock enabling flow was wrong.
Changed the flow according to downstream implementation in LK.
Signed-off-by: Ramon Fried
Applied to u-boot/master, thanks!
Ramon, did you re-test this
On Thu, May 17, 2018 at 04:53:57PM +0200, Patrice Chotard wrote:
> SDMMC_CMD_CPSMEN bit is wrongly check and set in
> SDMMC_ARG register instead of SDMMC_CMD register.
>
> Signed-off-by: Patrice Chotard
Applied to u-boot/master, thanks!
--
Tom
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__
On Mon, May 28, 2018 at 10:24:36PM +0300, Ramon Fried wrote:
> On Mon, May 28, 2018 at 10:19 PM, Jorge Ramirez-Ortiz
> wrote:
> > On 05/28/2018 09:12 PM, Tom Rini wrote:
> >>
> >> On Wed, May 16, 2018 at 12:13:39PM +0300, Ramon Fried wrote:
> >>
> >>> UART clock enabling flow was wrong.
> >>> Chan
On Mon, May 28, 2018 at 10:19 PM, Jorge Ramirez-Ortiz
wrote:
> On 05/28/2018 09:12 PM, Tom Rini wrote:
>>
>> On Wed, May 16, 2018 at 12:13:39PM +0300, Ramon Fried wrote:
>>
>>> UART clock enabling flow was wrong.
>>> Changed the flow according to downstream implementation in LK.
>>>
>>> Signed-off
On Thu, May 17, 2018 at 02:50:43PM +0200, Patrice Chotard wrote:
> Rename USART_ISR_FLAG_xxx bits to USART_ISR_xxx bits and
> USART_ICR_OREF to USART_ICR_ORECF in order to match datasheets.
> Sort defines by descendant order.
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Simon Glass
Applie
On Mon, May 28, 2018 at 10:26 PM, Tom Rini wrote:
> On Mon, May 28, 2018 at 10:24:36PM +0300, Ramon Fried wrote:
>> On Mon, May 28, 2018 at 10:19 PM, Jorge Ramirez-Ortiz
>> wrote:
>> > On 05/28/2018 09:12 PM, Tom Rini wrote:
>> >>
>> >> On Wed, May 16, 2018 at 12:13:39PM +0300, Ramon Fried wrote:
On Mon, May 28, 2018 at 10:28:51PM +0300, Ramon Fried wrote:
> On Mon, May 28, 2018 at 10:26 PM, Tom Rini wrote:
> > On Mon, May 28, 2018 at 10:24:36PM +0300, Ramon Fried wrote:
> >> On Mon, May 28, 2018 at 10:19 PM, Jorge Ramirez-Ortiz
> >> wrote:
> >> > On 05/28/2018 09:12 PM, Tom Rini wrote:
>
On 05/28/2018 09:48 PM, Ramon Fried wrote:
On Mon, May 28, 2018 at 10:24 PM, Ramon Fried wrote:
On Mon, May 28, 2018 at 10:19 PM, Jorge Ramirez-Ortiz
wrote:
On 05/28/2018 09:12 PM, Tom Rini wrote:
On Wed, May 16, 2018 at 12:13:39PM +0300, Ramon Fried wrote:
UART clock enabling flow was wro
On Mon, May 28, 2018 at 11:14 PM, Ramon Fried wrote:
> On Mon, May 28, 2018 at 11:07 PM, Jorge Ramirez-Ortiz
> wrote:
>> On 05/28/2018 10:01 PM, Ramon Fried wrote:
>>>
>>> On Mon, May 28, 2018 at 10:59 PM, Jorge Ramirez-Ortiz
>>> wrote:
On 05/28/2018 09:48 PM, Ramon Fried wrote:
>
On Mon, May 28, 2018 at 10:24 PM, Ramon Fried wrote:
> On Mon, May 28, 2018 at 10:19 PM, Jorge Ramirez-Ortiz
> wrote:
>> On 05/28/2018 09:12 PM, Tom Rini wrote:
>>>
>>> On Wed, May 16, 2018 at 12:13:39PM +0300, Ramon Fried wrote:
>>>
UART clock enabling flow was wrong.
Changed the flow
On 05/28/2018 10:01 PM, Ramon Fried wrote:
On Mon, May 28, 2018 at 10:59 PM, Jorge Ramirez-Ortiz
wrote:
On 05/28/2018 09:48 PM, Ramon Fried wrote:
On Mon, May 28, 2018 at 10:24 PM, Ramon Fried
wrote:
On Mon, May 28, 2018 at 10:19 PM, Jorge Ramirez-Ortiz
wrote:
On 05/28/2018 09:12 PM, Tom R
On Mon, May 28, 2018 at 10:59 PM, Jorge Ramirez-Ortiz
wrote:
> On 05/28/2018 09:48 PM, Ramon Fried wrote:
>>
>> On Mon, May 28, 2018 at 10:24 PM, Ramon Fried
>> wrote:
>>>
>>> On Mon, May 28, 2018 at 10:19 PM, Jorge Ramirez-Ortiz
>>> wrote:
On 05/28/2018 09:12 PM, Tom Rini wrote:
>
On Mon, May 28, 2018 at 11:07 PM, Jorge Ramirez-Ortiz
wrote:
> On 05/28/2018 10:01 PM, Ramon Fried wrote:
>>
>> On Mon, May 28, 2018 at 10:59 PM, Jorge Ramirez-Ortiz
>> wrote:
>>>
>>> On 05/28/2018 09:48 PM, Ramon Fried wrote:
On Mon, May 28, 2018 at 10:24 PM, Ramon Fried
wrote:
>
On Mon, May 28, 2018 at 10:35 PM, Tom Rini wrote:
> On Mon, May 28, 2018 at 10:28:51PM +0300, Ramon Fried wrote:
>> On Mon, May 28, 2018 at 10:26 PM, Tom Rini wrote:
>> > On Mon, May 28, 2018 at 10:24:36PM +0300, Ramon Fried wrote:
>> >> On Mon, May 28, 2018 at 10:19 PM, Jorge Ramirez-Ortiz
>> >>
Pool size must be increased to support new additionals
drivers.
Signed-off-by: Ramon Fried
---
v2: increase pool size to 0x200 as suggested by Tom.
arch/arm/mach-snapdragon/Kconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdrag
On 05/28/2018 10:25 PM, Ramon Fried wrote:
On Mon, May 28, 2018 at 11:14 PM, Ramon Fried wrote:
On Mon, May 28, 2018 at 11:07 PM, Jorge Ramirez-Ortiz
wrote:
On 05/28/2018 10:01 PM, Ramon Fried wrote:
On Mon, May 28, 2018 at 10:59 PM, Jorge Ramirez-Ortiz
wrote:
On 05/28/2018 09:48 PM, Ramon
Dear Peng Fan,
On Mon, May 28, 2018 at 2:25 PM, Peng Fan wrote:
> From: Ye Li
>
> When sd/mmc work at DDR mode, like HS400/HS400ES/DDR52/DDR50 mode,
> the actual clock rate is just half of the expected clock.
>
> This patch set the DDR_EN bit first for DDR mode, hardware divide
> the usdhc clock
On Tue, May 29, 2018 at 12:52 AM Stefan Roese wrote:
> (Added Mario and Chris)
> On 27.05.2018 17:34, Baruch Siach wrote:
> > From: Rabeeh Khoury
> >
> > Some QCA988x based modules presence is not detected by the SERDES lanes,
> > so force this detection which will trigger the LTSSM state machi
The missing clock causes serial_msm driver probe to fail.
Added a dummy node so the probe succeeds, as the clock init
currently in db820c is empty.
Fixes: 11d59fe5374a ("serial: serial_msm: fail probe if settings clocks fails")
Signed-off-by: Ramon Fried
---
arch/arm/dts/dragonboard820c.dts | 1
On Tue, May 29, 2018, 12:11 AM Jorge Ramirez-Ortiz
wrote:
>
> On 05/28/2018 11:07 PM, Jorge Ramirez-Ortiz wrote:
>
> Jorge, I just sent you a fix. can you test it and if it works I'll
> push it upstream.
>
>
> yes I can see the console now so that fix is good.
>
> however there must be some other
On Tue, May 29, 2018 at 4:11 AM Baruch Siach wrote:
> From: Jon Nettleton
> This switches the clearfog boards to use DM based gpio and i2c
> drivers. The io expanders are configured via their device-tree
> entries.
> Signed-off-by: Jon Nettleton
> [baruch: add DT i2c aliases]
> Signed-off-by
Hi Tom,
On Tue, May 29, 2018 at 7:12 AM Tom Rini wrote:
> On Wed, May 16, 2018 at 08:34:14PM +1200, Chris Packham wrote:
> > Now that there are more boards defining this it can be removed from the
> > whitelist.
> >
> > Signed-off-by: Chris Packham
> > Reviewed-by: Simon Glass
> Applied to u-
2018-05-28 18:44 GMT+09:00 Ramon Fried :
> Add WARN_ONCE definition to allow single time notification
> of warnings to the user.
>
> Signed-off-by: Ramon Fried
> ---
> include/linux/bug.h | 18 ++
> 1 file changed, 18 insertions(+)
>
> diff --git a/include/linux/bug.h b/include/li
On 05/28/2018 11:07 PM, Jorge Ramirez-Ortiz wrote:
Jorge, I just sent you a fix. can you test it and if it works I'll
push it upstream.
yes I can see the console now so that fix is good.
however there must be some other regression lurking because the system
wont boot a kernel from the SD card
This is initial support for the Pengpod 1000 tablet. The display is
not currently working but the UART works fine and allows access to the
u-boot console. Memory timing is fine and Linux boots from SD card
and runs OK.
Signed-off-by: Bob Ham
---
arch/arm/dts/Makefile | 1 +
>
>
>>
> I understand that this might fix an issue on a specific board (ClearFog
> in this case, correct?). But are you sure that its safe to force this
> link detection for all A38x boards?
>
We have tested on clearfog-pro / base and two other custom boards that we
have.
On long traces this fix m
On Tue, May 29, 2018 at 11:12:22AM +1200, Chris Packham wrote:
> Hi Tom,
> On Tue, May 29, 2018 at 7:12 AM Tom Rini wrote:
>
> > On Wed, May 16, 2018 at 08:34:14PM +1200, Chris Packham wrote:
>
> > > Now that there are more boards defining this it can be removed from the
> > > whitelist.
> > >
>
Hi, Bryan
Anson Huang
Best Regards!
> -Original Message-
> From: Bryan O'Donoghue [mailto:bryan.odonog...@linaro.org]
> Sent: Monday, May 28, 2018 4:59 PM
> To: Anson Huang ; sba...@denx.de; Fabio Estevam
> ; albert.u.b...@aribaud.net;
> christian.gmei...@gmail.com; Peng Fan ;
> patrick.
On Sun, May 27, 2018 at 07:45:12PM -0600, Simon Glass wrote:
> +Tom
>
> Hi Angelo,
>
> On 27 May 2018 at 01:22, Angelo Dureghello wrote:
> > Hi Simon,
> >
> > On Sat, May 26, 2018 at 04:18:57PM -0600, Simon Glass wrote:
> >> Hi Angelo,
> >>
> >> On 3 May 2018 at 16:01, Angelo Dureghello wrote:
> -Original Message-
> From: Benoît Thébaudeau [mailto:benoit.thebaudeau@gmail.com]
> Sent: 2018年5月29日 6:32
> To: Peng Fan
> Cc: sba...@denx.de; Fabio Estevam ; U-Boot
> ; Bough Chen
> Subject: Re: [U-Boot] [PATCH 37/41] mmc: fsl_esdhc: fix sd/mmc ddr mode clock
> setting issue
>
>
Hi Chris,
On Tue, May 29, 2018 at 10:32:47AM +1200, Chris Packham wrote:
> Did you intend to omit the u-boot mailing list?
No, sorry. Thanks for noticing. I'll resend with the change that Stefan
suggested and keep your Tested-by.
> On Tue, May 29, 2018 at 3:11 AM Baruch Siach wrote:
> > Equiva
Hello Patrice,
Am 22.05.2018 um 10:10 schrieb Patrice Chotard:
Since 'commit f82290afc847 ("mtd: ubi: Fix worker handling")',
when booting from NAND, on a fresh NAND just after being flashed (and
only in this case), we got the following log:
ubi0: default fastmap pool size: 200
ubi0: default fa
Hello Tom,
please pull from u-boot-ubi.git master
The following changes since commit 624d2cae3401c2e4d43c571a9b81d1f650e7703d:
SPDX: Fixup SPDX tags in a few new files (2018-05-20 09:47:45 -0400)
are available in the Git repository at:
git://git.denx.de/u-boot-ubi.git master
for you to f
Hello Peng,
Am 28.05.2018 um 14:25 schrieb Peng Fan:
From: Ye Li
Add compatible string for i.MX8 and move imx_lpi2c.h from mx7ulp directory
to u-boot include directory as a common header file.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
Cc: Heiko Schocher
---
drivers/i2c/imx_lpi2c.c
On Tue, May 29, 2018 at 2:39 PM Baruch Siach wrote:
> Hi Chris,
> On Tue, May 29, 2018 at 10:32:47AM +1200, Chris Packham wrote:
> > Did you intend to omit the u-boot mailing list?
> No, sorry. Thanks for noticing. I'll resend with the change that Stefan
> suggested and keep your Tested-by.
>
Hello Peng,
Am 28.05.2018 um 14:25 schrieb Peng Fan:
From: Gao Pan
For LPI2C IP, NACK is detected by the rising edge of the ninth clock.
In current uboot driver, once NACK is detected, it will reset and then
disable LPI2C master. As a result, we can never see the falling edge
of the ninth cloc
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