This series support PCIe host controller support
on rockchip rk3399 platform.
It is based on previous version[1] changes.
Works well on rk3399 boards like rock960, nanopc-t4
and roc-kr3399-pc-mezzanine board as Gen1 configurable
host with M.2 SSD.
Changes for v2:
- handle USB, GMAC clocks
- co
Some drivers and other bsp code not only poll the
register with timeout but also required to delay
on each transaction.
This patch add that requirement by adding sleep_us
variable so-that read_poll_timeout now support
delay as well.
Cc: Tom Rini
Signed-off-by: Jagan Teki
---
Changes for v2:
- n
Enable/Disable the PCIEPHY clk for rk3399.
CLK is clear in both enable and disable functionality.
Signed-off-by: Jagan Teki
---
Changes for v2:
- clear the clk in enable
drivers/clk/rockchip/clk_rk3399.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3399.
Add readl poll API with sleep and timeout support.
Cc: Tom Rini
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
include/linux/iopoll.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/linux/iopoll.h b/include/linux/iopoll.h
index 0bbd757939..e087f23271 100644
--- a/include/l
Yes, most of the high speed peripheral clocks
in rk3399 enabled by default.
But it would be better to handle them via clk
enable/disable API for handling proper reset
conditions like 'usb reset' over command line.
So, enable USB, GMAC clock via enable/disable ops.
Signed-off-by: Jagan Teki
---
Yes, it is possible to have a dedicated UCLASS PHY driver
for this Rockchip PCIe PHY but there are some issues on
Generic PHY framework to support the same.
The Generic PHY framework is unable to get the PHY if
the PHY parent is of a different uclass.
Say if we try to get the PCIe PHY then the ph
Add Rockchip PCIe controller driver for rk3399 platform.
Driver support Gen1 by operating as a Root complex.
Thanks to Patrick for initial work.
Signed-off-by: Patrick Wildt
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v2:
- simplify bdf in rd_conf, wr_conf
- collect keve
Due to some on board limitation rock960 PCIe
works only with 1.8V IO domain.
So, this patch enables grf io_sel explicitly
to make PCIe/M.2 to work.
Cc: Tom Cubie
Cc: Manivannan Sadhasivam
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
board/vamrs/rock960_rk3399/rock960-rk3399.c | 20 ++
Enable PCIe/M.2 support on
- NanoPC-T4
- ROC-RK3399-PC Mezzanine boards.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
arch/arm/dts/rk3399-u-boot.dtsi | 1 +
configs/nanopc-t4-rk3399_defconfig| 4
configs/roc-pc-mezzanine-rk3399_defconfig | 4
3 files changed,
st 8. 4. 2020 v 10:39 odesílatel Michal Simek napsal:
>
> Both of them have nand controller that's why it is good to enable it
> because these configurations are also covered by testing.
>
> Signed-off-by: Michal Simek
> ---
>
> configs/xilinx_zynq_virt_defconfig | 5 +
> configs/xilinx_zy
čt 16. 4. 2020 v 14:21 odesílatel Michal Simek napsal:
>
> Stack size has been introduced by commit a69814c815b9 ("arm64: zynqmp:
> Set initrd_high to as high as possible") and commit 085201c246ee ("arm64:
> versal: Set initrd_high to as high as possible")
> to support setting up initrd_high as hi
st 8. 4. 2020 v 10:50 odesílatel Michal Simek napsal:
>
> This function should keep common shared late configurations for Xilinx
> SoCs.
>
> Signed-off-by: Michal Simek
> ---
>
> board/xilinx/common/board.c | 8
> board/xilinx/common/board.h | 12
> board/xilinx/versal/b
po 13. 4. 2020 v 9:53 odesílatel Michal Simek napsal:
>
> From: T Karthik Reddy
>
> Enable mux based clocks to populate LPD_LSBUS clock to xilinx_wwdt
> driver. Skip reading clock rate for the mux based clocks with
> parent clock id is zero.
>
> Signed-off-by: T Karthik Reddy
> Signed-off-by: As
st 8. 4. 2020 v 13:31 odesílatel Michal Simek napsal:
>
> Without this change QSPI is not detected on zcu104 revC.
>
> Signed-off-by: Michal Simek
> ---
>
> board/xilinx/zynqmp/zynqmp-zcu104-revA/psu_init_gpl.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/board/xili
po 13. 4. 2020 v 10:00 odesílatel Michal Simek napsal:
>
> From: Saeed Nowshadi
>
> Add label to GPIO lines controlling boot mode and POR EMIO pins so System
> Controller can assert those lines on Versal.
>
> Signed-off-by: Saeed Nowshadi
> Signed-off-by: Michal Simek
> ---
>
> arch/arm/dts/zy
po 13. 4. 2020 v 10:01 odesílatel Michal Simek napsal:
>
> Moving to common location initrd_high is also setup for Zynq which hasn't
> done in run time code.
>
> Signed-off-by: Michal Simek
> ---
>
> board/xilinx/common/board.c | 7 +++
> board/xilinx/versal/board.c | 6 --
> board/x
po 13. 4. 2020 v 10:01 odesílatel Michal Simek napsal:
>
> Create special function for reading bootmode on Versal and ZynqMP.
> Zynq is using specific function (without mask) already.
> Future patches will be calling this function from different location too.
>
> Signed-off-by: Michal Simek
> ---
po 20. 4. 2020 v 7:43 odesílatel Michal Simek napsal:
>
> From: T Karthik Reddy
>
> nand_scan_tail() function allocates memory dynamically for
> struct nand_buffers which needs ~21kbytes of memory. But the
> memory alloted with CONFIG_SYS_MALLOC_LEN is 4k which is insufficient.
> Increase CONFIG_
po 13. 4. 2020 v 10:05 odesílatel Michal Simek napsal:
>
> - Do not use irps54012 as device node which is not correct.
> - Fix addresses of irps5401/u180 on zcu104 revisions.
> - Remove clock-cells property. It is PMIC without any clock output.
> - Define irps5401 nodes in zynqmp-e-a2197
>
> Signe
čt 16. 4. 2020 v 14:22 odesílatel Michal Simek napsal:
>
> From: T Karthik Reddy
>
> Add memory-controller@e000e000 node in zynq-ces-nand.dts as
> zynq_nand driver utilizes flash@e100 node. Without this
> dt node mini nand u-boot does not probe.
>
> Signed-off-by: T Karthik Reddy
> Signed-of
po 20. 4. 2020 v 10:47 odesílatel Michal Simek napsal:
>
> Extend description of Xilinx custom boot commands to make clear what runs
> and what failed.
>
> Signed-off-by: Michal Simek
> ---
>
> include/configs/xilinx_versal.h | 12
> include/configs/xilinx_zynqmp.h | 9 ++---
>
pá 24. 4. 2020 v 12:25 odesílatel Michal Simek napsal:
>
> From: Patrick van Gelder
>
> The end_cmd field in the variables cmd_phase_addr and data_phase_addr
> contains the value 0xFF when the end_cmd equals NAND_CMD_NONE. This
> should be 0x00.
>
> This is caused by comparing NAND_CMD_NONE (int)
Hi Tom,
Please pull these patches to your tree.
Travis looks good.
https://travis-ci.org/github/michalsimek/u-boot/builds/680070323
Gitlab CI too
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze/pipelines/2952
I have tried to merge with your latest branch and there is small
conflict be
Change the mmc displayed name in U-Boot for stm32_sdmmc2 driver to
“STM32 SD/MMC”.
This stm32_sdmmc2 driver is for version 2 of the ST HW IP SDMMC but the
displayed name "STM32 SDMMC2" is confusing for user, between the
instance of SDMMC and the device identifier of MMC.
For example on EV1 board,
On 28. 04. 20 21:26, Dan Murphy wrote:
> Add phy_set/clear_bit helper routines so that ported drivers from the
> kernel can use these functions.
>
> Signed-off-by: Dan Murphy
> ---
> include/phy.h | 80 +++
> 1 file changed, 80 insertions(+)
>
> d
On 28. 04. 20 21:26, Dan Murphy wrote:
> ti_phy_init function was allocated to the DP83867 PHY. This function
> name is to generic for a specific PHY. The function can be moved to a
> TI specific file that can register all TI PHYs that are defined in the
> defconfig. The ti_phy_init file will co
On 28. 04. 20 21:26, Dan Murphy wrote:
> Add the DP8382X generic PHY registration to the TI PHY init file.
>
> Signed-off-by: Dan Murphy
> ---
> drivers/net/phy/ti_phy_init.c | 91 +++
> 1 file changed, 91 insertions(+)
>
> diff --git a/drivers/net/phy/ti_phy_ini
On 4/29/20 8:04 PM, Simon Glass wrote:
> Hi Patrice,
>
> On Wed, 29 Apr 2020 at 06:20, Patrice Chotard wrote:
>> Add documentation in doc/drivel-model for the bind/unbind command.
>> Part of this documentation is extracted from original patch commit
>> message:
>> commit 49c752c93a78 ("cmd: Add b
Hi Simon
On 4/29/20 8:04 PM, Simon Glass wrote:
> On Wed, 29 Apr 2020 at 06:20, Patrice Chotard wrote:
>> As bind-test is now binded at sandbox startup and no more by
>> test_bind.py, bind-test nodes are not located at the end of
>> "dm tree" output, but can be located everywwhere in the tree, so
Usage of lists_bind_fdt() in bind command imposes to add
a compatible string for bind-test node.
The other impact, is that bind-test node is binded at sandbox
start, so no need to bind it in test_bind_unbind_with_node() test
Signed-off-by: Patrice Chotard
Reviewed-by: Simon Glass
---
Changes in
Initial implementation invokes device_bind_with_driver_data()
with driver_data parameter equal to 0.
For driver with driver data, the bind command can't bind
correctly this driver or even worse causes data abort as shown below:
As example, for debug purpose on STM32MP1 platform, ethernet (dwc_eth_
Add documentation in doc/drivel-model for the bind/unbind command.
Part of this documentation is extracted from original patch commit
message:
commit 49c752c93a78 ("cmd: Add bind/unbind commands to bind a device to a
driver from the command line")
Signed-off-by: Patrice Chotard
---
Changes in
Add driver data to existing compatible string "sandbox,phy".
Add an additional compatible string without driver_data
This will verify that bind command parses, finds and passes the
correct driver data to device_bind_with_driver_data() by using
driver_data in the second sandbox_phy_ids table entry.
As bind-test is now binded at sandbox startup and no more by
test_bind.py, bind-test nodes are not located at the end of
"dm tree" output, but can be located everywhere in the tree, so
bind-test output could either be:
simple_bus0 [ ] generic_simple_bus|-- bind-test
phy 0
- fix the bind command
- add a bind command test
- add bind command documentation
Changes in v3:
- fix typo
- add bind/unbind parameters description and how to find them
Changes in v2:
- add a bind command test
- add bind command documentation in doc/driver/model/bind.rst
- si
Heiko,
This patch will cause build fail on sandbox_spl_defconfig:
dtc: option requires an argument -- 'p'
Thanks,
- Kever
On 2020/4/21 上午8:23, Heiko Stuebner wrote:
From: Heiko Stuebner
With SPL_FIT_SIGNATURE enabled we will likely want a generated
u-boot.itb to be signed and the key stor
On 2020/4/27 下午2:52, Chen-Yu Tsai wrote:
From: Chen-Yu Tsai
Hi everyone,
This is v3 of my ROC-RK3328-CC series. Changes from v2 are mainly
fixing USB functionality on RK3328 in U-boot. This includes restoring
the U-Boot specific "hnp-srp-disable" property for dwc2, moving the
dwc2 device nod
On 2020/4/27 下午2:52, Chen-Yu Tsai wrote:
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -5,6 +5,13 @@ F: board/rockchip/evb_rk3328
F: include/configs/evb_rk3328.h
F: configs/evb-rk3328_defconfig
+ROC-RK3328-CC
+M: Loic Devu
Hi Jagan,
Previous patch will be drop and replace by this one, right?
rockchip: Enable SF distro bootcmd
On 2020/4/30 上午3:39, Jagan Teki wrote:
Enable SPI flash(SF) distro boot command in rk3399.
This distro boot will read the boot script at specific
location at the flash and start sourcing t
On Mon, Apr 27, 2020 at 4:32 AM Simon Glass wrote:
>
> Hi Aiden,
>
> On Tue, 21 Apr 2020 at 18:45, wrote:
> >
> > From: Aiden Park
> >
> > Add slimbootloader-x86_64_defconfig for 64-bit slimbootloader board.
> >
> > Signed-off-by: Aiden Park
> > ---
> > configs/slimbootloader-x86_64_defconfig
Hi Aiden,
On Wed, Apr 29, 2020 at 1:44 PM Park, Aiden wrote:
>
> Hi Simon,
>
> > -Original Message-
> > From: Simon Glass
> > Sent: Sunday, April 26, 2020 1:16 PM
> > To: Park, Aiden
> > Cc: Bin Meng ; U-Boot Mailing List > b...@lists.denx.de>
> > Subject: Re: [PATCH 1/8] x86: Add a ne
On Wed, Apr 22, 2020 at 8:45 AM wrote:
>
> From: Aiden Park
>
> Add steps to build 64-bit Slim Bootloader and U-Boot.
>
> Signed-off-by: Aiden Park
> ---
> doc/board/intel/slimbootloader.rst | 29 +
> 1 file changed, 29 insertions(+)
>
Reviewed-by: Bin Meng
On Thu, Apr 30, 2020 at 5:08 PM Kever Yang wrote:
>
>
> On 2020/4/27 下午2:52, Chen-Yu Tsai wrote:
> > --- a/board/rockchip/evb_rk3328/MAINTAINERS
> > +++ b/board/rockchip/evb_rk3328/MAINTAINERS
> > @@ -5,6 +5,13 @@ F: board/rockchip/evb_rk3328
> > F: include/configs/evb_rk3328.h
> > F
This patch series moves the configuration of FPS-S and FSP-M for Apollo
Lake based SoCs from the code to the devicetree.
In order to make the FSP configuration easy to extend and maintain new
binding structs for FSP-M and FSP-S are introduced.
These structs contain the information of which devicet
Only load VBT if it's present in the u-boot.rom.
Signed-off-by: Bernhard Messerklinger
---
arch/x86/cpu/apollolake/fsp_s.c | 18 --
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c
index 17cf1682ad..
Hi Bin, Simon,
>This patch series moves the configuration of FPS-S for Apollo Lake
>based SoCs from the code to the device-tree.
>
>This is similar to the previous patch series for FSP-M.
>If wanted, I can also send FSP-M and FSP-S patch as a single series.
>
Please drop this series.
This series
List U-Boot project in vendor prefixes.
For more information take a look at:
https://en.wikipedia.org/wiki/Das_U-Boot
Source code is available here:
https://gitlab.denx.de/u-boot/u-boot
Signed-off-by: Michal Simek
---
The patch was created based on discussion with Rob
https://lore.kernel.org/li
On Sun, Apr 26, 2020 at 11:13 PM Simon Glass wrote:
>
> It is useful to be able to boot the same x86 image on a device with or
> without a first-stage bootloader. For example, with chromebook_coral, it
> is helpful for testing to be able to boot the same U-Boot (complete with
> FSP) on bare metal
Hi Bin, Simon,
>
>Move FSP-M configuration to the device-tree like it's already done
>for
>other SoCs (Baytrail).
>
>Signed-off-by: Bernhard Messerklinger
>
>---
>With this patch I moved the FSP-M configuration to the device-tree
>based
>on the Baytrail boards.
>
>Changes in v3:
>Added doc binding
On 30.04.20 10:52, Patrice Chotard wrote:
> Add documentation in doc/drivel-model for the bind/unbind command.
> Part of this documentation is extracted from original patch commit
> message:
> commit 49c752c93a78 ("cmd: Add bind/unbind commands to bind a device to a
> driver from the command line"
On Sun, Apr 26, 2020 at 11:13 PM Simon Glass wrote:
>
> When U-Boot is not the first-stage bootloader the interrupt and cache init
> must be skipped, as well as init for various peripherals. Update the code
> to add checks for this.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v4: None
> C
On Sun, Apr 26, 2020 at 11:13 PM Simon Glass wrote:
>
> When U-Boot is not the first-stage bootloader the FSP-S init must be
> skipped. Update it to add a check.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
> arch/x86/cpu/apollolake/f
On Sun, Apr 26, 2020 at 11:13 PM Simon Glass wrote:
>
> When U-Boot is run from another boot loader, much of the low-level init
> needs to be skipped.
>
> Add a flag for this and adjust ll_boot_init() to use it.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v4:
> - Rename flag to GD_FLG_SKI
On Sun, Apr 26, 2020 at 11:13 PM Simon Glass wrote:
>
> If U-Boot is running from coreboot we need to skip low-level init. Add
> an way to detect this and to set the gd flag.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v4:
> - Rename flag to GD_FLG_SKIP_LL_INIT
> - Split this patch into t
Hi Simon,
On Sun, Apr 26, 2020 at 11:13 PM Simon Glass wrote:
>
> To support detecting booting from coreboot, move the code which locates
> the coreboot tables into a common place. Adjust the algorithm slightly to
> use a word comparison instead of string, since it is faster.
>
> Signed-off-by: S
On Sun, Apr 26, 2020 at 11:13 PM Simon Glass wrote:
>
> When U-Boot is not the first-stage bootloader we don't want to
> re-configure the PCI devices, since this has already been done. Add a
> check to avoid this.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v4: None
> Changes in v3: None
On Sun, Apr 26, 2020 at 11:13 PM Simon Glass wrote:
>
> With chromebook_coral we normally run TPL->SPL->U-Boot. This is the
> 'bare metal' case.
>
> When running from coreboot we put u-boot.bin in the RW_LEGACY portion
> of the image, e.g. with:
>
>cbfstool image-coral.serial.bin add-flat-bina
On Sun, Apr 26, 2020 at 11:13 PM Simon Glass wrote:
>
> Add a few notes about this feature, which is aimed for development.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
> doc/arch/x86.rst | 28
> 1 file ch
HI!
Did I miss anything myself?
U-Boot:
=> ext4ls mmc 0:8 /home/root
4096 .
4096 ..
4096 .node_app_slot
Linux:
# ls -la /home/root/
total 76
drwxr-xr-x 3 root root 4096 Apr 30 09:27 .
drwxr-xr-x 4 root root 4096 Apr 30 09:11 ..
-rw--- 1 root root 4188 Apr 30 09:11 .ba
On Thu, Apr 30, 2020 at 12:34 PM Andy Shevchenko
wrote:
>
> HI!
>
> Did I miss anything myself?
U-Boot v2020.04
> U-Boot:
> => ext4ls mmc 0:8 /home/root
>4096 .
>4096 ..
>4096 .node_app_slot
>
> Linux:
(Some v3.10.98 based BSP)
> # ls -la /home/root/
> total 76
> drwxr-
Hi Heinrich
On 4/30/20 11:31 AM, Heinrich Schuchardt wrote:
> On 30.04.20 10:52, Patrice Chotard wrote:
>> Add documentation in doc/drivel-model for the bind/unbind command.
>> Part of this documentation is extracted from original patch commit
>> message:
>> commit 49c752c93a78 ("cmd: Add bind/unb
Hi all,
On 29/04/2020 22:11, Simon Glass wrote:
> Hi Tom,
>
> On Wed, 15 Apr 2020 at 13:59, Tom Rini wrote:
>>
>> On Tue, Apr 14, 2020 at 08:23:10PM -0600, Simon Glass wrote:
>>> Hi,
>>>
>>> On Sun, 22 Mar 2020 at 21:16, Simon Glass wrote:
At present the pinctrl nodes are not enabled
On Thu, Apr 30, 2020 at 2:41 PM Kever Yang wrote:
>
> Hi Jagan,
>
> Previous patch will be drop and replace by this one, right?
>
> rockchip: Enable SF distro bootcmd
Yes, I'll apply this via the spi tree since it has SF distro changes already.
Hi Simon,
On Thu, Apr 30, 2020 at 5:33 PM Bin Meng wrote:
>
> Hi Simon,
>
> On Sun, Apr 26, 2020 at 11:13 PM Simon Glass wrote:
> >
> > To support detecting booting from coreboot, move the code which locates
> > the coreboot tables into a common place. Adjust the algorithm slightly to
> > use a
Hi Simon,
On Sun, Apr 26, 2020 at 11:13 PM Simon Glass wrote:
>
> This little series adds a few checks into the code to allow better
> operation when booting a build from a previous-state loader such as
> coreboot.
>
> At present we have a 'coreboot' target but this runs very different code
> fro
On Wed, Apr 29, 2020 at 11:34 PM Simon Glass wrote:
>
> Hi Rayagonda,
>
> On Wed, 29 Apr 2020 at 00:21, Rayagonda Kokatanur
> wrote:
> >
> > Add gpio driver support for Broadcom iproc-based socs.
> >
> > Signed-off-by: Rayagonda Kokatanur
> > Signed-off-by: Sheetal Tigadoli
> > ---
> > drivers
Hello Jan,
On Wed, 2020-04-29 at 19:23 +0200, Jan Kiszka wrote:
> From: Jan Kiszka
>
> This was already changed in 0c3a9ed409a5 but apparently missed when
> adding 9d86dbd9cf9d.
I sent a very similar patch [1] as part of my "Fix spl_mmc_boot_mode()
implementation for IMX" series [2] which tries
Add driver data to existing compatible string "sandbox,phy".
Add an additional compatible string without driver_data
This will verify that bind command parses, finds and passes the
correct driver data to device_bind_with_driver_data() by using
driver_data in the second sandbox_phy_ids table entry.
Usage of lists_bind_fdt() in bind command imposes to add
a compatible string for bind-test node.
The other impact, is that bind-test node is binded at sandbox
start, so no need to bind it in test_bind_unbind_with_node() test
Signed-off-by: Patrice Chotard
Reviewed-by: Simon Glass
---
Changes in
Add documentation in doc/drivel-model for the bind/unbind command.
Part of this documentation is extracted from original patch commit
message:
commit 49c752c93a78 ("cmd: Add bind/unbind commands to bind a device to a
driver from the command line")
Signed-off-by: Patrice Chotard
---
Changes in
Initial implementation invokes device_bind_with_driver_data()
with driver_data parameter equal to 0.
For driver with driver data, the bind command can't bind
correctly this driver or even worse causes data abort as shown below:
As example, for debug purpose on STM32MP1 platform, ethernet (dwc_eth_
- fix the bind command
- add a bind command test
- add bind command documentation
Changes in v4:
- fix make htmldocs error "Title underline too short"
Changes in v3:
- fix typo
- fix typo
- add bind/unbind parameters description and how to find them
Changes in v2:
- add
On Wed, Apr 29, 2020 at 11:34 PM Simon Glass wrote:
>
> Hi Rayagonda,
>
> +Stephen Warren
>
> On Wed, 29 Apr 2020 at 10:35, Rayagonda Kokatanur
> wrote:
> >
> > Add support to use different register read/write api's
> > based on register width.
> >
> > Signed-off-by: Rayagonda Kokatanur
> > ---
As bind-test is now binded at sandbox startup and no more by
test_bind.py, bind-test nodes are not located at the end of
"dm tree" output, but can be located everywhere in the tree, so
bind-test output could either be:
simple_bus0 [ ] generic_simple_bus|-- bind-test
phy 0
On 30.04.20 12:06, Harald Seiler wrote:
Hello Jan,
On Wed, 2020-04-29 at 19:23 +0200, Jan Kiszka wrote:
From: Jan Kiszka
This was already changed in 0c3a9ed409a5 but apparently missed when
adding 9d86dbd9cf9d.
I sent a very similar patch [1] as part of my "Fix spl_mmc_boot_mode()
implementa
Hi Michal,
can you please try these files in SD boot mode?
Done, here are two logs, both in SD boot mode.
First, log.sd is with SD card inserted (with the image files that
apparently refuse to work other than the early UART message).
The other file, log.no-sd, is with no card inserted.
Ch
From: Pankit Garg
CONFIG_MTD_NOR_FLASH flag needs to be enable for all
boot sources,as all flash drivers need to compile in
TFA Boot.Probe ifc nor flash only when there is nor
flash available on board.So needs to detect ifc-nor
flash at run-time for probing.
Signed-off-by: Pankit Garg
---
comm
Rockchip Socs can support two controllers "snps, dwmac-4.20a"
and "snps, dwmac-3.50". In order to support two at gmac-rockchip.c,
export public interface functions and struct data, it will be more
general for others.
David Wu (8):
net: dwc_eth_qos: Use dev_ functions calls to get FDT data
net
It seems dev_ functions are more general than fdt_ functions.
Signed-off-by: David Wu
---
drivers/net/dwc_eth_qos.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 63f2086dec..a72132cacf 100644
--- a/drivers/
It can be seen that most of the Socs using STM mac, "snps,reset-gpio"
gpio is used, adding this option makes reset function more general.
Signed-off-by: David Wu
---
drivers/net/dwc_eth_qos.c | 40 ++-
1 file changed, 35 insertions(+), 5 deletions(-)
diff --
After moving to eqos_ops, if eqos_config is defined
outside, can not export interface() definition.
Signed-off-by: David Wu
---
drivers/net/dwc_eth_qos.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
inde
When using rgmii Gigabit mode, the wait_for_bit_le32()
reset method resulting in RX can not receive data, after
this patch, works well.
Signed-off-by: David Wu
---
drivers/net/dwc_eth_qos.c | 21 +++--
1 file changed, 15 insertions(+), 6 deletions(-)
diff --git a/drivers/net/dw
Before enabling mac and mac working, we need to obtain
the current link speed to configure the clock, so split
eqos_start into two functions.
Signed-off-by: David Wu
---
drivers/net/dwc_eth_qos.c | 56 ++-
1 file changed, 38 insertions(+), 18 deletions(-)
di
Open structure data and interface, so that Soc using dw_eth_qos
controller can reference.
Signed-off-by: David Wu
---
drivers/net/dwc_eth_qos.c | 81 +--
1 file changed, 9 insertions(+), 72 deletions(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dw
For others using, clk_rx and clk_tx may not be necessary,
and their clock names are different.
Signed-off-by: David Wu
---
drivers/net/dwc_eth_qos.c | 65 +++
1 file changed, 31 insertions(+), 34 deletions(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/
Change the original data structure so that Rockchip's Soc
gmac controller can support the designware.c and dwc_eth_qos.c
drivers, a Soc can only support one.
Signed-off-by: David Wu
---
drivers/net/Kconfig | 2 +-
drivers/net/gmac_rockchip.c | 160 ++--
Banana Pi P2 Zero is almost identic with Banana Pi M2 Zero with
additional eMMC and PoE functionality
This patch allows uboot to detect ethernet, usb, and eMMC during boot
Bootlog:
U-Boot SPL 2020.04 (Apr 30 2020 - 03:41:48 +0700)
DRAM: 512 MiB
Trying to boot from MMC1
U-Boot 2020.04 (
A the moment the FSP configuration is a mix of hard coded values and
devicetree properties.
This patch makes FSP-M and FSP-S full configurable from devicetree by
adding binding properties for all FSP parameters.
Co-developed-by: Wolfgang Wallner
Signed-off-by: Wolfgang Wallner
Signed-off-by: Ber
Hi Michal,
Sorry I misunderstood your message, and I didn't spot the attached
files. Now I booted with those two files, there's no output on the
UARTs whatsoever. Is there anything else I can try?
Cheers,
András
On 30/04/2020 12:33, Michal Simek wrote:
Hi,
On 30. 04. 20 12:19, Major
On Mon, Apr 20, 2020 at 4:46 PM Ley Foon Tan wrote:
>
> dram_init_banksize() is called in board_init_f() boot sequences
> in Uboot, remove it from SDRAM driver.
>
> Signed-off-by: Ley Foon Tan
> ---
> drivers/ddr/altera/sdram_arria10.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/d
Hi Simon,
On Wed, Apr 29, 2020 at 11:34 PM Simon Glass wrote:
>
> Hi Rayagonda,
>
> +Stephen Warren
>
> On Wed, 29 Apr 2020 at 10:36, Rayagonda Kokatanur
> wrote:
> >
> > Add pinctrl_ops->request api to configure pctrl
> > pad register in gpio mode.
> >
> > Signed-off-by: Rayagonda Kokatanur
>
hi,
that's quite weird. Did you try any petalinux bsp and boot petalinux
boot.bin on that board to make sure that board is fine?
M
On 30. 04. 20 13:01, Major A wrote:
> Hi Michal,
>
> Sorry I misunderstood your message, and I didn't spot the attached
> files. Now I booted with those two files,
On 4/30/20 1:02 PM, Ley Foon Tan wrote:
> On Mon, Apr 20, 2020 at 4:46 PM Ley Foon Tan wrote:
>>
>> dram_init_banksize() is called in board_init_f() boot sequences
>> in Uboot, remove it from SDRAM driver.
>>
>> Signed-off-by: Ley Foon Tan
>> ---
>> drivers/ddr/altera/sdram_arria10.c | 3 ---
>>
Hi Michal,
Yes, I did. The Petalinux image from here:
https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841937/Zynq+UltraScale+MPSoC+Ubuntu+part+2+-+Building+and+Running+the+Ubuntu+Desktop+From+Sources
works fine.
Cheers,
András
On 30/04/2020 13:03, Michal Simek wrote:
hi,
that'
On 29. 04. 20 16:55, Rob Herring wrote:
> On Tue, Apr 28, 2020 at 8:51 AM Michal Simek wrote:
>>
>> On 28. 04. 20 15:23, Rob Herring wrote:
>>> On Wed, Apr 1, 2020 at 4:23 AM Michal Simek wrote:
Hi Rob and others,
for couple of years already u-boot is using config node in root
Hi Simon,
On Wed, Apr 29, 2020 at 11:34 PM Simon Glass wrote:
>
> Hi Rayagonda,
>
> +Stephen Warren
>
> On Wed, 29 Apr 2020 at 10:35, Rayagonda Kokatanur
> wrote:
> >
> > Parse different gpio properties from dt as part of probe
> > function. This detail will be used to enable pinctrl pad
> > lat
Dear Tom,
Please find my pull-request for u-boot-fsl-qoriq/master
https://travis-ci.org/github/p-priyanka-jain/u-boot/builds/680868706
Summary
Add DM_ETH support for DPAA1, DPAA2 based RDB platforms: ls1046ardb,
ls1043ardb, lx2160ardb, ls2088ardb, ls1088ardb.
Add GICv3 support for ls1028a,
wt., 28 kwi 2020 o 09:01 Faiz Abbas napisał(a):
>
> +Bartosz
>
> On 28/04/20 9:47 am, Lokesh Vutla wrote:
> > +Faiz,
> >
> > On 28/04/20 12:29 AM, Tom Rini wrote:
> >> On Mon, Apr 27, 2020 at 05:33:41AM +, Peng Fan wrote:
> Subject: [PATCH v5 1/4] omap: mmc: Avoid using libfdt with of-pla
Michal
On 4/30/20 3:00 AM, Michal Simek wrote:
On 28. 04. 20 21:26, Dan Murphy wrote:
Add phy_set/clear_bit helper routines so that ported drivers from the
kernel can use these functions.
Signed-off-by: Dan Murphy
---
include/phy.h | 80 +++
>-Original Message-
>From: U-Boot On Behalf Of Kuldeep Singh
>Sent: Thursday, March 19, 2020 3:34 PM
>To: u-boot@lists.denx.de
>Cc: Priyanka Jain ; Kuldeep Singh
>
>Subject: [PATCH] configs: ls2088ardb: Correct DEFAULT_DEVICE_TREE value
>
>LS2088A-RDB has CONFIG_DEFAULT_DEVICE_TREE value c
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