If "esdhc" is configured in hwconfig, u-boot will configure
multiplexing pins from default IFC to SDHC in runtime to
enable SD function. And add minimal necessary mux command for
ifc/sdhc/ulpi to conveniently configure multiplexing pins
without reboot or updating u-boot.
Signed-off-by:
n. And add minimal necessary mux command for
ifc/sdhc/ulpi to conveniently configure multiplexing pins
without reboot or updating u-boot.
Signed-off-by: Shengzhou Liu
---
v2: updated description.
board/freescale/p1010rdb/p1010rdb.c | 128 +---
include/configs/
- add more serdes protocols support.
- fix some serdes lanes route.
- correct boot location info for SD/SPI boot.
Signed-off-by: Shengzhou Liu
---
board/freescale/t2080qds/t2080qds.c | 66 +
1 file changed, 60 insertions(+), 6 deletions(-)
diff --git a/board
We use dynamical mtdparts partition instead of directly puting
mtd partitions nodes in device tree.
Signed-off-by: Shengzhou Liu
---
include/configs/T2080QDS.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/include/configs/T2080QDS.h b/include/configs/T2080QDS.h
index
- add more serdes protocols support.
- fix some serdes lanes route.
- fix SGMII doesn't work and incorrect mdio display for XFI when serdes 0x6d.
- correct boot location info for SD/SPI boot.
Signed-off-by: Shengzhou Liu
---
board/freescale/t2080qds/eth_t2080qds.c | 11 +-
board/free
Erratum A006379 applies to T2080/T2081 also.
Signed-off-by: Shengzhou Liu
---
arch/powerpc/include/asm/fsl_errata.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/fsl_errata.h
b/arch/powerpc/include/asm/fsl_errata.h
index 8af6751..671296a 100644
- add more serdes protocols support.
- fix some serdes lanes route.
- fix SGMII doesn't work and incorrect mdio display for XFI when serdes 0x6d.
- correct boot location info for SD/SPI boot.
Signed-off-by: Shengzhou Liu
---
v2: update to support more serdes, applied in Gerrit sdk.
Enable Erratum A006379 for T2080, T2081, T4160, B4420.
Signed-off-by: Shengzhou Liu
---
arch/powerpc/include/asm/fsl_errata.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/fsl_errata.h
b/arch/powerpc/include/asm/fsl_errata.h
index 8af6751
- Optimize UDIMM parameters for whole range from 1500MT/s to 2140MT/s.
- Remove unused patameters: 'cpo', 'wrdata delay', '2T', which are
unrelated to DDR3/3L.
Signed-off-by: Shengzhou Liu
---
board/freescale/t2080qds/ddr.c | 12 ++--
board
We should check if the 10G port is enabled when we update dynamically
the corresponding dual-role MAC node in device tree.
Signed-off-by: Shengzhou Liu
---
drivers/net/fm/init.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/fm/init.c b/drivers/net/fm/init.c
- Optimize UDIMM parameters for whole range from 1500MT/s to 2140MT/s.
- Remove unused patameters: 'cpo', 'wrdata delay', '2T', which are
unrelated to DDR3/3L.
Tested with UDIMM 9JSF25672AZ-2G1K1 and verified speed 1200/1866/2133MT/s.
Signed-off-by: Shengzhou Liu
This patch reverts patch 'add ft_fixup_xgec to support 3rd and 4th 10GEC'.
When dual-role MAC acts as 10G,it still uses fsl,fman-port-1g-rx/tx as before.
Signed-off-by: Shengzhou Liu
---
drivers/net/fm/init.c | 53 +--
1 file changed, 1
- fix serdes definition for t2081.
- fix clock speed for t2081.
- update ids, as CONFIG_FSL_SATA_V2 is needed only for t2080,
T2081 has no SATA.
Signed-off-by: Shengzhou Liu
---
arch/powerpc/cpu/mpc85xx/speed.c| 3 ++-
arch/powerpc/cpu/mpc85xx/t2080_ids.c| 2 ++
arch/powerpc/cpu
SR-IOV)
- eSDHC:
- Supports various SD/SDHC/SDXC/eMMC devices with adapter cards and
voltage translators
- I2C:
- Four I2C controllers.
- UART:
- Dual 4-pins UART serial ports
Signed-off-by: Shengzhou Liu
---
board/freescale/{t2080qds => t208xqds}/Makefile| 6 +-
board/freesc
SR-IOV)
- eSDHC:
- Supports various SD/SDHC/SDXC/eMMC devices with adapter cards and
voltage translators
- I2C:
- Four I2C controllers.
- UART:
- Dual 4-pins UART serial ports
Signed-off-by: Shengzhou Liu
---
board/freescale/{t2080qds => t208xqds}/Makefile| 6 +-
board/freesc
On p1010rdb some signals are muxed for tdm/can/uart/flash.
If we don't set fsl_p1010mux:tdm_can to "can" or "tdm" explicitly,
defaultly we keep spi chip selection to spi-flash instead of to
tdm/slic and disable uart1 when not using flexcan, as well disable sdhc.
Sig
Signed-off-by: Shengzhou Liu
---
doc/README.p1010rdb | 147 +++
1 files changed, 147 insertions(+), 0 deletions(-)
create mode 100644 doc/README.p1010rdb
diff --git a/doc/README.p1010rdb b/doc/README.p1010rdb
new file mode 100644
index 000
Signed-off-by: Shengzhou Liu
---
doc/README.p1010rdb | 138 +++
1 files changed, 138 insertions(+), 0 deletions(-)
create mode 100644 doc/README.p1010rdb
diff --git a/doc/README.p1010rdb b/doc/README.p1010rdb
new file mode 100644
index 000
Signed-off-by: Shengzhou Liu
---
doc/README.p1010rdb | 200 +++
1 files changed, 200 insertions(+), 0 deletions(-)
create mode 100644 doc/README.p1010rdb
diff --git a/doc/README.p1010rdb b/doc/README.p1010rdb
new file mode 100644
index 000
Signed-off-by: Shengzhou Liu
---
board/freescale/p1010rdb/README | 212 +++
1 files changed, 212 insertions(+), 0 deletions(-)
create mode 100644 board/freescale/p1010rdb/README
diff --git a/board/freescale/p1010rdb/README b/board/freescale/p1010rdb/README
:
- Supports various SD/SDHC/SDXC/eMMC devices with adapter cards and
voltage translators
- I2C:
- Four I2C controllers.
- UART:
- Dual 4-pins UART serial ports
Signed-off-by: Shengzhou Liu
---
board/freescale/{t2080qds => t208xqds}/Makefile| 6 +-
board/freescale/{t2080qds => t2
:
- Supports various SD/SDHC/SDXC/eMMC devices with adapter cards and
voltage translators
- I2C:
- Four I2C controllers.
- UART:
- Dual 4-pins UART serial ports
Signed-off-by: Shengzhou Liu
---
v2: some update for serdes and network configuration.
board/freescale/{t2080qds => t208x
Add support for Cortina CS4315/CS4340 10G PHY.
- This driver loads CS43xx firmware to initialize Cortina PHY.
- To define macro CONFIG_PHY_CORTINA will enable this driver.
- Cortina PHY has non-standard offset of PHY ID registers, so
define own get_phy_id function.
Signed-off-by: Shengzhou Liu
In function get_phy_device_by_mask(), when trying Clause 45,
we should extend the value of devad(used in create_phy_by_mask)
to zero to cover more PHYs (e.g. devad must be 0 for CS4315 PHY).
Signed-off-by: Shengzhou Liu
---
drivers/net/phy/phy.c | 4 ++--
1 file changed, 2 insertions(+), 2
As some PHYs have non-standard PHY ID registers, PHY Id can't
be read correctly by current get_phy_id function, so we enable
get_phy_id redefinable to permit specific PHY driver having own
specific get_phy_id function.
Signed-off-by: Shengzhou Liu
---
drivers/net/phy/phy.c | 5 -
1
- change QIXIS timing parameter CONFIG_SYS_CS3_FTIM2 to 8 from 0.
- fix EMI2 for t2080qds, which was caused by adding t2081qds.
Signed-off-by: Shengzhou Liu
---
board/freescale/t208xqds/eth_t208xqds.c | 3 ++-
include/configs/T208xQDS.h | 2 +-
2 files changed, 3 insertions(+), 2
NOR flash is on CS1 instead of CS2 when NAND boot.
So correct NOR chip selection to CS1 from CS2.
Signed-off-by: Shengzhou Liu
---
include/configs/T208xQDS.h | 28 ++--
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/include/configs/T208xQDS.h b/include
Enable CONFIG_CMD_MEMTEST, CONFIG_FSL_DDR_INTERACTIVE, CONFIG_CMD_EEPROM
Signed-off-by: Shengzhou Liu
---
include/configs/T208xQDS.h | 6 +-
include/configs/T208xRDB.h | 6 +-
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/include/configs/T208xQDS.h b/include/configs
In function get_phy_device_by_mask(), when trying Clause 45,
we should extend the value of devad(used in create_phy_by_mask)
to zero to cover more PHYs (e.g. devad must be 0 for CS4315 PHY).
Signed-off-by: Shengzhou Liu
---
v2: no change
drivers/net/phy/phy.c | 4 ++--
1 file changed, 2
As some PHYs have non-standard PHY ID registers, PHY Id can't
be read correctly by current get_phy_id function, so we enable
get_phy_id redefinable to permit specific PHY driver having own
specific get_phy_id function.
Signed-off-by: Shengzhou Liu
---
v2: use __weak
drivers/net/phy/phy.
Add support for Cortina CS4315/CS4340 10G PHY.
- This driver loads CS43xx firmware to initialize Cortina PHY.
- To define macro CONFIG_PHY_CORTINA will enable this driver.
- Cortina PHY has non-standard offset of PHY ID registers, so
define own get_phy_id().
Signed-off-by: Shengzhou Liu
---
v2
As some PHYs have non-standard PHY ID registers, PHY Id can't
be read correctly by current get_phy_id function, so we enable
get_phy_id redefinable to permit specific PHY driver having own
specific get_phy_id function.
Signed-off-by: Shengzhou Liu
---
v2: use __weak
drivers/net/phy/phy.
Add support of 2-stage NAND boot loader using SPL framework on T2080RDB.
PBL initialise the internal SRAM and copy SPL(96K), this further
initialise DDR using SPD and environment and copy u-boot from NAND
to DDR, finally SPL transfer control to u-boot.
Signed-off-by: Shengzhou Liu
---
board
Add support of 2 stage NAND boot loader using SPL framework.
PBL initialise the internal SRAM and copy SPL(96K), this further
initialise DDR using SPD and environment and copy u-boot from NAND
to DDR, finally SPL transfer control to u-boot.
Signed-off-by: Shengzhou Liu
---
board/freescale
Add support of 2-stage NAND boot loader using SPL framework on T2080RDB.
PBL initialise the internal SRAM and copy SPL(96K), this further
initialise DDR using SPD and environment and copy u-boot from NAND
to DDR, finally SPL transfer control to u-boot.
Signed-off-by: Shengzhou Liu
---
board
We use dynamical mtdparts partition instead of directly puting
mtd partitions nodes in device tree.
Signed-off-by: Shengzhou Liu
---
Verified on T2080RDB.
include/configs/T208xRDB.h | 16
1 file changed, 16 insertions(+)
diff --git a/include/configs/T208xRDB.h b/include
We use dynamical mtdparts partition instead of directly puting
mtd partitions nodes in device tree.
Signed-off-by: Shengzhou Liu
---
Verified on T2080QDS.
include/configs/T208xQDS.h | 17 +
1 file changed, 17 insertions(+)
diff --git a/include/configs/T208xQDS.h b/include
As some PHYs have non-standard PHY ID registers, PHY Id can't
be read correctly by current get_phy_id function, so we enable
get_phy_id redefinable to permit specific PHY driver having own
specific get_phy_id function.
Signed-off-by: Shengzhou Liu
---
v3: no change.
v2: use weak style.
dr
Add support for Cortina CS4315/CS4340 10G PHY.
- This driver loads CS43xx firmware to initialize Cortina PHY.
- To define macro CONFIG_PHY_CORTINA will enable this driver.
- Cortina PHY has non-standard offset of PHY ID registers, so
define own get_phy_id().
Signed-off-by: Shengzhou Liu
---
v3
Tested with NOR boot and NAND boot on T2080QDS and T2080RDB.
Signed-off-by: Shengzhou Liu
---
based on 'next' branch.
include/configs/T208xQDS.h | 2 ++
include/configs/T208xRDB.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/include/configs/T208xQDS.h b/include/configs/
Support SODIMM D3XP12081XL10AA 1866MT/s on T2080RDB.
Enable CONFIG_CMD_MEMTEST as well.
Signed-off-by: Shengzhou Liu
---
v2: refined commit description.
board/freescale/t208xrdb/ddr.h | 4 ++--
include/configs/T208xRDB.h | 5 +
2 files changed, 7 insertions(+), 2 deletions(-)
diff
SD/MMC card and eMMC on-board
- 256Kbit M24256 I2C EEPROM
- RTC: Real-time clock DS1339 on I2C bus
- UART: one serial port on-board with RJ45 connector
- Debugging: JTAG/COP for T1023 debugging
As well updated T1024RDB to add T1023RDB.
Signed-off-by: Shengzhou Liu
---
v4: squashed ddr patch to
T2080RDB RevC uses new SODIMM 1867MT/s instead of previous 1600MT/s.
So update RCW to support new DDR frequency i.e 1867MT/s
Signed-off-by: Shengzhou Liu
---
board/freescale/t208xrdb/t2080_rcw.cfg | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/freescale/t208xrdb
commit 3c6928fd7b0f84 "net: phy: fix warnings with W=1" caused
some PHYs(e.g. CS4315/CS4340) not working. This patch fixes the
warning and make those special PHYs working as well.
Signed-off-by: Shengzhou Liu
---
drivers/net/phy/phy.c | 2 +-
include/phy.h | 1 +
2 files
CONFIG_PHY_AQ1202 is no longer needed, use CONFIG_PHY_AQUANTIA.
Signed-off-by: Shengzhou Liu
---
include/configs/T208xRDB.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index db6b42e..508edec 100644
--- a/include
Use fdt_setprop_string instead of fdt_setprop to fix string length.
Signed-off-by: Shengzhou Liu
---
board/freescale/t102xqds/eth_t102xqds.c | 9 +
board/freescale/t102xrdb/eth_t102xrdb.c | 4 ++--
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/board/freescale/t102xqds
CS4315 PHY doesn't phy reset by software, it needs to
reset it by hardware reset via CPLD control.
Signed-off-by: Shengzhou Liu
---
board/freescale/t208xrdb/cpld.h | 3 +++
board/freescale/t208xrdb/t208xrdb.c | 7 +++
2 files changed, 10 insertions(+)
diff --git a/board/free
CS4315 PHY doesn't support phy-reset by software, it
needs to reset it by hardware via CPLD control.
Signed-off-by: Shengzhou Liu
---
board/freescale/t208xrdb/cpld.h | 3 +++
board/freescale/t208xrdb/t208xrdb.c | 7 +++
2 files changed, 10 insertions(+)
diff --git a/board/free
T2080RDB RevC uses new SODIMM 1867MT/s instead of previous 1600MT/s.
So update RCW to support new DDR frequency 1867MT/s by default.
Reserve the old 1600MT/s in comment for users in needed.
Signed-off-by: Shengzhou Liu
---
board/freescale/t208xrdb/t2080_rcw.cfg | 5 -
1 file changed, 4
RTL8211F needs to enalbe TXDLY for RGMII during
phy initialization, so move it to rtl8211f_config
for early initialization.
Signed-off-by: Shengzhou Liu
cc: Joe Hershberger
---
v2: add default page and use macro instead of magic number.
drivers/net/phy/realtek.c | 33
Signed-off-by: Shengzhou Liu
---
board/freescale/t208xqds/README | 243
1 file changed, 243 insertions(+)
create mode 100755 board/freescale/t208xqds/README
diff --git a/board/freescale/t208xqds/README b/board/freescale/t208xqds/README
new file mode
As auto-negotiation is not supported for 2.5G SGMII, we need
to add a new type PHY_INTERFACE_MODE_SGMII_2500 to differentiate
SGMII-1G and SGMII-2.5G with different setting for auto-negotiation.
Signed-off-by: Shaohui Xie
Signed-off-by: Shengzhou Liu
---
arch/powerpc/include/asm/fsl_serdes.h
Add serdes2 protocol 0x2e.
Signed-off-by: Shengzhou Liu
---
arch/powerpc/cpu/mpc85xx/t2080_serdes.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c
b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c
index 7138bb4..c65f41d 100644
--- a/arch/powerpc/cpu/mpc85xx
8-bit
Signed-off-by: Shengzhou Liu
---
arch/powerpc/cpu/mpc85xx/Makefile | 4 ++
arch/powerpc/cpu/mpc85xx/speed.c | 12 +++-
arch/powerpc/cpu/mpc85xx/t1024_ids.c | 82
arch/powerpc/cpu/mpc85xx/t1024_serdes.c| 50 +
arch/po
naming for 10GEC to fit different SoC.
Signed-off-by: Shengzhou Liu
---
arch/powerpc/include/asm/config_mpc85xx.h | 1 +
arch/powerpc/include/asm/immap_85xx.h | 5 +
drivers/net/fm/eth.c | 7 +--
drivers/net/fm/init.c | 2 ++
include
USB2.0 ports with internal PHY (one Type-A + one micro Type mini-AB)
- eSDHC: Support SD, SDHC, SDXC and MMC/eMMC.
- I2C: Four I2C controllers.
- UART: Two UART on board.
Signed-off-by: Shengzhou Liu
---
arch/powerpc/cpu/mpc85xx/Kconfig | 4 +
board/freescale/t102xqds/Kconfig
Increase IO drive strength to fix FCS error on RGMII ports
on T1024QDS and T1024RDB.
Signed-off-by: Shengzhou Liu
---
arch/powerpc/include/asm/immap_85xx.h | 3 +++
board/freescale/t102xqds/t102xqds.c | 4
board/freescale/t102xrdb/t102xrdb.c | 3 +++
3 files changed, 10 insertions
1. add fdt_fixup_spi_mux() for spi mux between SPI flash and TDM riser.
2. if "adaptor=sdxc" is set in hwconfig, route spi pin to SDHC slot.
3. if "pin_mux=tdm" is set in hwconfig, route spi pin to TDM Riser Card.
Signed-off-by: Shengzhou Liu
Signed-off-by: Xie Xiaobo
Signe
Initialize retimer for XFI on t1024qds.
Signed-off-by: Shengzhou Liu
---
board/freescale/t102xqds/t102xqds.c | 57 +
include/configs/T102xQDS.h | 5 +++-
2 files changed, 61 insertions(+), 1 deletion(-)
diff --git a/board/freescale/t102xqds
QSGMII doesn't work without enabling serdes auto-negotiation.
Signed-off-by: Shengzhou Liu
---
drivers/net/phy/vitesse.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c
index 2b29cd8..5b2e11a 100644
--- a/drivers/ne
- I2C: Four I2C controllers
- UART: Two UART serial ports
Signed-off-by: Shengzhou Liu
---
arch/powerpc/cpu/mpc85xx/Kconfig| 4 +
board/freescale/t102xrdb/Kconfig| 12 +
board/freescale/t102xrdb/MAINTAINERS| 14 +
board/freescale/t102xrdb/Makefile | 17 +
board
when missing USB PHY clock and issuing "usb start" at u-boot prompt, writing to
or_portsc register will cause CPU halt. We should check USBGP[PHY_CLK_VALID] bit
at the first time in ehci_hcd_init() to avoid CPU hang in this case.
Signed-off-by: Shengzhou Liu
---
drivers/usb/host/
Add NAND chip ID 0x38 in ids table to support Micron 4K pagesize NAND chip.
Signed-off-by: Shengzhou Liu
---
based on 'master' branch of Wolfgang's tree.
drivers/mtd/nand/nand_ids.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/nand/nand_
eater than 2K bytes,
we have a board_nand_init_tail() between nand_scan_ident() and nand_scan_tail().
Signed-off-by: Shengzhou Liu
---
based on 'master' branch of Wolfgang's tree.
drivers/mtd/nand/nand.c | 14 +-
1 files changed, 13 insertions(+), 1 deletions(-)
diff
Freescale FCM controller has a 2K size limitation of buffer RAM. In order
to support the Nand flash chip whose page size is larger than 2K bytes,
we read/write 2k data repeatedly by issuing FIR_OP_RB/FIR_OP_WB and save
them to a large buffer.
Signed-off-by: Shengzhou Liu
Signed-off-by: Liu Shuo
eater than 2K bytes,
we have a board_nand_init_tail() between nand_scan_ident() and nand_scan_tail().
Signed-off-by: Shengzhou Liu
---
drivers/mtd/nand/nand.c | 14 +-
1 files changed, 13 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/nand.c
There was a bug logically in the order of nand_flash_detect_onfi
and checking nand_flash_ids. We should get NAND devices related
informations first by ONFI method instead of querying nand_flash_ids table,
if ONFI fails, then query nand_flash_ids table.
Signed-off-by: Shengzhou Liu
---
drivers
We should first try ONFI detection, if ONFI is not supported or fails,
then try to check nand_flash_ids table.
Signed-off-by: Shengzhou Liu
---
drivers/mtd/nand/nand_base.c |9 -
include/linux/mtd/nand.h |2 --
2 files changed, 0 insertions(+), 11 deletions(-)
diff --git a
- fix NAND_CMD_READID command for ONFI detect.
- add NAND_CMD_PARAM command to read the ONFI parameter page.
Signed-off-by: Shengzhou Liu
---
drivers/mtd/nand/fsl_elbc_nand.c | 16 +++-
1 files changed, 15 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand
We are not doing this any more. The bdinfo command will be updated to
display this information instead, so remove previous display info.
Signed-off-by: Shengzhou Liu
---
board/freescale/p3060qds/p3060qds.c |3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/board
We are not doing this any more. The bdinfo command will be updated to
display this information instead, so remove previous display info.
Signed-off-by: Shengzhou Liu
---
board/freescale/corenet_ds/corenet_ds.c |4
board/freescale/p2041rdb/p2041rdb.c |4
board/freescale
eater than 2K bytes,
we have a board_nand_init_tail() between nand_scan_ident() and nand_scan_tail().
Signed-off-by: Shengzhou Liu
---
drivers/mtd/nand/nand.c | 19 ++-
1 files changed, 18 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/n
In the past the ONFI never worked dut to u-boot aborted when nand device id
not found in ids table. Now if not found in ids table, u-boot still continues
to detect by ONFI way.
Signed-off-by: Shengzhou Liu
---
drivers/mtd/nand/nand_base.c | 26 --
1 files changed, 16
- fix NAND_CMD_READID command for ONFI detect.
- add NAND_CMD_PARAM command to read the ONFI parameter page.
Signed-off-by: Shengzhou Liu
---
drivers/mtd/nand/fsl_elbc_nand.c | 19 ---
1 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/mtd/nand
Freescale FCM controller has a 2K size limitation of buffer RAM. In order
to support the Nand flash chip whose page size is larger than 2K bytes,
we read/write 2k data repeatedly by issuing FIR_OP_RB/FIR_OP_WB and save
them to a large buffer.
Signed-off-by: Shengzhou Liu
Signed-off-by: Liu Shuo
remove CONFIG_SYS_NAND_ONFI_DETECTION to enable ONFI detection.
Signed-off-by: Shengzhou Liu
---
drivers/mtd/nand/nand_base.c |9 -
include/linux/mtd/nand.h |2 --
2 files changed, 0 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand
In the past the ONFI never worked dut to u-boot aborted when nand device id
not found in ids table. Now if not found in ids table, u-boot still continues
to detect by ONFI way.
Signed-off-by: Shengzhou Liu
---
drivers/mtd/nand/nand_base.c | 26 --
1 files changed, 16
remove CONFIG_SYS_NAND_ONFI_DETECTION to enable ONFI detection.
Signed-off-by: Shengzhou Liu
---
drivers/mtd/nand/nand_base.c |9 -
include/linux/mtd/nand.h |2 --
2 files changed, 0 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand
- fix NAND_CMD_READID command for ONFI detect.
- add NAND_CMD_PARAM command to read the ONFI parameter page.
Signed-off-by: Shengzhou Liu
---
drivers/mtd/nand/fsl_elbc_nand.c | 17 ++---
1 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/mtd/nand
eater than 2K bytes,
we have a board_nand_init_tail() between nand_scan_ident() and nand_scan_tail().
Signed-off-by: Shengzhou Liu
---
drivers/mtd/nand/nand.c | 19 ++-
1 files changed, 18 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/n
Freescale FCM controller has a 2K size limitation of buffer RAM. In order
to support the Nand flash chip with pagesize larger than 2K bytes,
we read/write 2k data repeatedly by issuing FIR_OP_RB/FIR_OP_WB and save
them to a large buffer.
Signed-off-by: Shengzhou Liu
Signed-off-by: Liu Shuo
According to new QIXIS system definition, update QIXIS registers set
to add present2 register instead of obsolete ctl_sys2.
Signed-off-by: Shengzhou Liu
---
based on master branch of upstream tree.
This patch is needed by T4QDS patches.
board/freescale/common/qixis.c |2 +-
board/freescale
for
upstream transactions and removes the deadlock condition.
The Workaround is for the T4240 silicon rev 1.0.
Signed-off-by: Shengzhou Liu
---
based on master branch upstream tree.
arch/powerpc/cpu/mpc85xx/cmd_errata.c |4
arch/powerpc/cpu/mpc85xx/cpu_init.c | 14
Per the latest errata updated, B4860/B4420 Rev 1.0 has also
errata A-005871, so adding define A-005871 for B4 SoCs.
Signed-off-by: Shengzhou Liu
---
arch/powerpc/include/asm/config_mpc85xx.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm
- Rename old P1010RDB board as P1010RDB-PA.
- Add support for new P1010RDB-PB board.
- Some optimization.
For more details, see board/freescale/p1010rdb/README.
Signed-off-by: Shengzhou Liu
---
board/freescale/p1010rdb/p1010rdb.c | 176 ++--
boards.cfg
'esdhc' in hwconfig and save it.
To enable IFC in case of SD boot
a) For temporary use case in runtime without reboot system
run 'mux ifc' in u-boot to validate IFC with invalidating SDHC.
b) For long-term use case
set 'ifc' in hwconfig and save it.
Function cpld_show() was for debug and not called, so clean it.
Signed-off-by: Shengzhou Liu
---
board/freescale/p1010rdb/p1010rdb.c | 35 ---
1 file changed, 35 deletions(-)
diff --git a/board/freescale/p1010rdb/p1010rdb.c
b/board/freescale/p1010rdb/p1010rdb.c
doesn't impact on previous existing boards.
Signed-off-by: Shengzhou Liu
---
Verified with 128B and 256B EEPROM, CRC works.
board/freescale/common/sys_eeprom.c | 4
1 file changed, 4 insertions(+)
diff --git a/board/freescale/common/sys_eeprom.c
b/board/freescale/common/sys_eeprom.c
- Remove duplicate doc/README.p1010rdb
- Rename README to README.P1010RDB-PA
- Add new README.P1010RDB-PB
P1010RDB-PB is a variation of previous P1010RDB-PA board.
Signed-off-by: Shengzhou Liu
---
v4: keep readme support for p1010rdb-pa
v3: add frequency combination support
v2: removed
The base address of I2C2 is 0x118100 instead of 0x119000.
Signed-off-by: Shengzhou Liu
---
include/configs/T1040QDS.h | 2 +-
include/configs/T104xRDB.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 2215ac8
- Fix base address of I2C2 as 0x118100 instead of 0x119000.
- Add definitions for I2C3 & I2C4.
Signed-off-by: Shengzhou Liu
---
include/configs/T1040QDS.h | 10 --
include/configs/T104xRDB.h | 10 --
2 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/include/con
Add support for 3rd and 4th I2C.
Signed-off-by: Shengzhou Liu
---
drivers/i2c/fsl_i2c.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c
index aa159f8..811033b 100644
--- a/drivers/i2c/fsl_i2c.c
+++ b
There are more than two 10GEC in single FMAN in some SoCs(e.g. T2080).
This patch adds support for 10GEC3 and 10GEC4.
Signed-off-by: Shengzhou Liu
---
Against master branch of upstream.
arch/powerpc/include/asm/fsl_serdes.h | 2 ++
arch/powerpc/include/asm/immap_85xx.h | 2 ++
drivers/net/fm
SoC Package: 896-pins 780-pins
Signed-off-by: Shengzhou Liu
---
Against master branch of upstream.
arch/powerpc/cpu/mpc85xx/Makefile | 6 +
arch/powerpc/cpu/mpc85xx/speed.c | 2 +-
arch/powerpc/cpu/mpc85xx/t2080_ids.c | 142
arch/powerp
Add the default RCW(0x66_0x16) and PBI configure file for
T2080QDS board, so we can use PBL tool to generate the ramboot
image to support boot from NAND/SPI/SD.
Signed-off-by: Shengzhou Liu
---
Against master branch of upstream.
board/freescale/t2080qds/t2080_pbi.cfg | 41
> -Original Message-
> From: York Sun [mailto:york...@freescale.com]
> Sent: Friday, November 22, 2013 1:51 AM
> To: Liu Shengzhou-B36685; u-boot@lists.denx.de
> Subject: Re: [PATCH 1/4] net/fman: Add support for 10GEC3 and 10GEC4
>
> > #ifdef CONFIG_SYS_FMAN_V3
> > - if (fm_eth->type =
SoC Package: 896-pins 780-pins
Signed-off-by: Shengzhou Liu
---
Against master branch of git://git.denx.de/u-boot.git
v2: resubmit for rebase.
arch/powerpc/cpu/mpc85xx/Makefile | 6 +
arch/powerpc/cpu/mpc85xx/speed.c | 2 +-
arch/powerpc/cpu/mpc85xx/t2080_ids.c
Add the default RCW(SerDes 0x66_0x16) and PBI configure file for
T2080QDS board, so we can use PBL tool to generate the ramboot
image to support boot from NAND/SPI/SD.
Signed-off-by: Shengzhou Liu
---
Against master branch of git://git.denx.de/u-boot.git
v2: resubmit for rebase.
board
There are more than two 10GEC in single FMAN in some SoCs(e.g. T2080).
This patch adds support for 10GEC3 and 10GEC4.
Signed-off-by: Shengzhou Liu
---
Against master branch of git://git.denx.de/u-boot.git
v2: Rebase and add more comments description.
arch/powerpc/include/asm/fsl_serdes.h | 2
As mEMAC1 and mEMAC2 are dual-role MACs, which are used as 1G or 10G MAC.
So we update dynamically 'cell-index' to '2' and '3' for 10GEC3 and 10GEC4.
Also change 'fsl,fman-port-1g-rx' to 'fsl,fman-port-10g-rx', ditto for Tx.
Signed-off-
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