Re: [PATCH 01/13] drm/amd/display: HDCP SEND AKI INIT error
Dear Alex, Am 25.03.22 um 21:43 schrieb Hung, Alex: Thanks for your feedback. Thank you for your reply. For the future, it’d be great if you could use interleaved style [1], when replying, or when it’s a new topic, do not cite the previous message. I fixed many errors and typos you highlighted in this series. In cases where modification requires re-testing we or anyone can have follow-up patches in the future. Thank you. Did you resubmit them in *[PATCH 00/16] DC Patches March 25, 2022*? Unfortunately, they are not tagged as v2 and the emails do not contain an information what was changed between v1 and v2. Can you please send them again with the correct tags, and information included? Kind regards, Paul [1]: https://en.wikipedia.org/wiki/Posting_style
RE: [PATCH V2] drm/amdgpu: fix incorrect GCR_GENERAL_CNTL address
Reviewed-by: Aaron Liu
--
Best Regards
Aaron Liu
> -Original Message-
> From: amd-gfx On Behalf Of Ji, Ruili
> Sent: Monday, March 28, 2022 12:59 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Yifan ; Liu, Aaron
> ; Liang, Prike ; Huang, Ray
> ; Deucher, Alexander
> ; Ji, Ruili
> Subject: [PATCH V2] drm/amdgpu: fix incorrect GCR_GENERAL_CNTL address
>
> From: Ruili Ji
>
> gfx10.3.3/gfx10.3.6/gfx10.3.7 shall use 0x1580 address for
> GCR_GENERAL_CNTL
>
> Signed-off-by: Ruili Ji
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index 99df18ae7316..e4c9d92ac381 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -3300,7 +3300,7 @@ static const struct soc15_reg_golden
> golden_settings_gc_10_3_3[] =
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x,
> 0x0280),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0x,
> 0x0080),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG,
> 0x0c1807ff, 0x0242),
> - SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL,
> 0x1ff1, 0x0500),
> + SOC15_REG_GOLDEN_VALUE(GC, 0,
> mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1,
> +0x0500),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0x00ff,
> 0x00e4),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0,
> 0x, 0x32103210),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1,
> 0x, 0x32103210), @@ -3436,7 +3436,7 @@ static const struct
> soc15_reg_golden golden_settings_gc_10_3_6[] =
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x,
> 0x0280),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0x,
> 0x0080),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG,
> 0x0c1807ff, 0x0042),
> - SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL,
> 0x1ff1, 0x0500),
> + SOC15_REG_GOLDEN_VALUE(GC, 0,
> mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1,
> +0x0500),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0x00ff,
> 0x0044),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0,
> 0x, 0x32103210),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1,
> 0x, 0x32103210), @@ -3461,7 +3461,7 @@ static const struct
> soc15_reg_golden golden_settings_gc_10_3_7[] = {
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x,
> 0x0280),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0x,
> 0x0080),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG,
> 0x0c1807ff, 0x0041),
> - SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL,
> 0x1ff1, 0x0500),
> + SOC15_REG_GOLDEN_VALUE(GC, 0,
> mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1,
> +0x0500),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0x00ff,
> 0x00e4),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0,
> 0x, 0x32103210),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1,
> 0x, 0x32103210),
> --
> 2.25.1
[PATCH V2] drm/amdgpu: fix incorrect GCR_GENERAL_CNTL address
From: Ruili Ji
gfx10.3.3/gfx10.3.6/gfx10.3.7 shall use 0x1580 address for GCR_GENERAL_CNTL
Signed-off-by: Ruili Ji
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 99df18ae7316..e4c9d92ac381 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -3300,7 +3300,7 @@ static const struct soc15_reg_golden
golden_settings_gc_10_3_3[] =
SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x, 0x0280),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0x, 0x0080),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0x0c1807ff, 0x0242),
- SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL, 0x1ff1,
0x0500),
+ SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1,
0x0500),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0x00ff, 0x00e4),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0, 0x,
0x32103210),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1, 0x,
0x32103210),
@@ -3436,7 +3436,7 @@ static const struct soc15_reg_golden
golden_settings_gc_10_3_6[] =
SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x, 0x0280),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0x, 0x0080),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0x0c1807ff, 0x0042),
- SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL, 0x1ff1,
0x0500),
+ SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1,
0x0500),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0x00ff, 0x0044),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0, 0x,
0x32103210),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1, 0x,
0x32103210),
@@ -3461,7 +3461,7 @@ static const struct soc15_reg_golden
golden_settings_gc_10_3_7[] = {
SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x, 0x0280),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0x, 0x0080),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0x0c1807ff, 0x0041),
- SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL, 0x1ff1,
0x0500),
+ SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1,
0x0500),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0x00ff, 0x00e4),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0, 0x,
0x32103210),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1, 0x,
0x32103210),
--
2.25.1
RE: [PATCH] drm/amdgpu: fix incorrect GCR_GENERAL_CNTL address
[AMD Official Use Only]
Thanks Ruili. Please remove Change-Id.
With this fixed, Reviewed-by: Aaron Liu
> -Original Message-
> From: Ji, Ruili
> Sent: Monday, March 28, 2022 11:47 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Huang, Ray
> ; Liu, Aaron ; Zhang, Yifan
> ; Liang, Prike ; Ji, Ruili
>
> Subject: [PATCH] drm/amdgpu: fix incorrect GCR_GENERAL_CNTL address
>
> From: Ruili Ji
>
> RMB shall use 0x1580 address for GCR_GENERAL_CNTL
>
> Signed-off-by: Ruili Ji
> Change-Id: I10a85891986f31411f85fa3db46970aaa8a5bd03
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index 99df18ae7316..e4c9d92ac381 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -3300,7 +3300,7 @@ static const struct soc15_reg_golden
> golden_settings_gc_10_3_3[] =
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x,
> 0x0280),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0x,
> 0x0080),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG,
> 0x0c1807ff, 0x0242),
> - SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL,
> 0x1ff1, 0x0500),
> + SOC15_REG_GOLDEN_VALUE(GC, 0,
> mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1,
> +0x0500),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER,
> 0x00ff, 0x00e4),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0,
> 0x, 0x32103210),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1,
> 0x, 0x32103210), @@ -3436,7 +3436,7 @@ static const struct
> soc15_reg_golden golden_settings_gc_10_3_6[] =
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x,
> 0x0280),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0x,
> 0x0080),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG,
> 0x0c1807ff, 0x0042),
> - SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL,
> 0x1ff1, 0x0500),
> + SOC15_REG_GOLDEN_VALUE(GC, 0,
> mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1,
> +0x0500),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER,
> 0x00ff, 0x0044),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0,
> 0x, 0x32103210),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1,
> 0x, 0x32103210), @@ -3461,7 +3461,7 @@ static const struct
> soc15_reg_golden golden_settings_gc_10_3_7[] = {
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x,
> 0x0280),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0x,
> 0x0080),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG,
> 0x0c1807ff, 0x0041),
> - SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL,
> 0x1ff1, 0x0500),
> + SOC15_REG_GOLDEN_VALUE(GC, 0,
> mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1,
> +0x0500),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER,
> 0x00ff, 0x00e4),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0,
> 0x, 0x32103210),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1,
> 0x, 0x32103210),
> --
> 2.25.1
[PATCH] drm/amdgpu: fix incorrect GCR_GENERAL_CNTL address
From: Ruili Ji
RMB shall use 0x1580 address for GCR_GENERAL_CNTL
Signed-off-by: Ruili Ji
Change-Id: I10a85891986f31411f85fa3db46970aaa8a5bd03
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 99df18ae7316..e4c9d92ac381 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -3300,7 +3300,7 @@ static const struct soc15_reg_golden
golden_settings_gc_10_3_3[] =
SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x, 0x0280),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0x, 0x0080),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0x0c1807ff, 0x0242),
- SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL, 0x1ff1,
0x0500),
+ SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1,
0x0500),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0x00ff, 0x00e4),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0, 0x,
0x32103210),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1, 0x,
0x32103210),
@@ -3436,7 +3436,7 @@ static const struct soc15_reg_golden
golden_settings_gc_10_3_6[] =
SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x, 0x0280),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0x, 0x0080),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0x0c1807ff, 0x0042),
- SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL, 0x1ff1,
0x0500),
+ SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1,
0x0500),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0x00ff, 0x0044),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0, 0x,
0x32103210),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1, 0x,
0x32103210),
@@ -3461,7 +3461,7 @@ static const struct soc15_reg_golden
golden_settings_gc_10_3_7[] = {
SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x, 0x0280),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0x, 0x0080),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0x0c1807ff, 0x0041),
- SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL, 0x1ff1,
0x0500),
+ SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1,
0x0500),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0x00ff, 0x00e4),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0, 0x,
0x32103210),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1, 0x,
0x32103210),
--
2.25.1
Re: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0
[AMD Official Use Only]
Thank you very much for your suggestion, but I have already submitted.
Regards,
Rico
From: Chen, Guchun
Sent: Monday, March 28, 2022 10:17
To: Chen, Guchun ; Yin, Tianci (Rico)
; amd-gfx@lists.freedesktop.org
Cc: Wang, Yu (Charlie) ; Zhu, James ; Yin,
Tianci (Rico)
Subject: RE: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0
Hi Tianci,
I think we shall improve the subject a bit like "drm/amdgpu: fix incorrect
instance id passing when stopping dpg mode". How do you think?
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Chen, Guchun
Sent: Monday, March 28, 2022 9:26 AM
To: Yin, Tianci (Rico) ; amd-gfx@lists.freedesktop.org
Cc: Wang, Yu (Charlie) ; Zhu, James ; Yin,
Tianci (Rico)
Subject: RE: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0
Reviewed-by: Guchun Chen
Regards,
Guchun
-Original Message-
From: Tianci Yin
Sent: Sunday, March 27, 2022 7:19 PM
To: amd-gfx@lists.freedesktop.org
Cc: Chen, Guchun ; Zhu, James ; Wang,
Yu (Charlie) ; Yin, Tianci (Rico)
Subject: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0
From: tiancyin
Some video card has more than one vcn instance, passing 0 to
vcn_v3_0_pause_dpg_mode is incorrect.
Error msg:
Register(1) [mmUVD_POWER_STATUS] failed to reach value
0x0001 != 0x0002
Signed-off-by: tiancyin
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index e1cca0a10653..cb5f0a12333f 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -1488,7 +1488,7 @@ static int vcn_v3_0_stop_dpg_mode(struct amdgpu_device
*adev, int inst_idx)
struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE};
uint32_t tmp;
- vcn_v3_0_pause_dpg_mode(adev, 0, );
+ vcn_v3_0_pause_dpg_mode(adev, inst_idx, );
/* Wait for power status to be 1 */
SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,
--
2.25.1
RE: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0
Hi Tianci,
I think we shall improve the subject a bit like "drm/amdgpu: fix incorrect
instance id passing when stopping dpg mode". How do you think?
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Chen, Guchun
Sent: Monday, March 28, 2022 9:26 AM
To: Yin, Tianci (Rico) ; amd-gfx@lists.freedesktop.org
Cc: Wang, Yu (Charlie) ; Zhu, James ; Yin,
Tianci (Rico)
Subject: RE: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0
Reviewed-by: Guchun Chen
Regards,
Guchun
-Original Message-
From: Tianci Yin
Sent: Sunday, March 27, 2022 7:19 PM
To: amd-gfx@lists.freedesktop.org
Cc: Chen, Guchun ; Zhu, James ; Wang,
Yu (Charlie) ; Yin, Tianci (Rico)
Subject: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0
From: tiancyin
Some video card has more than one vcn instance, passing 0 to
vcn_v3_0_pause_dpg_mode is incorrect.
Error msg:
Register(1) [mmUVD_POWER_STATUS] failed to reach value
0x0001 != 0x0002
Signed-off-by: tiancyin
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index e1cca0a10653..cb5f0a12333f 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -1488,7 +1488,7 @@ static int vcn_v3_0_stop_dpg_mode(struct amdgpu_device
*adev, int inst_idx)
struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE};
uint32_t tmp;
- vcn_v3_0_pause_dpg_mode(adev, 0, );
+ vcn_v3_0_pause_dpg_mode(adev, inst_idx, );
/* Wait for power status to be 1 */
SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,
--
2.25.1
RE: [PATCH v2 3/25] drm/amdgpu: Disable ABM when AC mode
[AMD Official Use Only]
Hi Harry,
I have been reminded to do some modifications to the patch format. So the 3/25
it's the date I resent the mail v2.
If the mail title usage is not correct, please let me know.
And about the questions:
" This file lives in DC, which is shared code between Windows and Linux. We
cannot directly use adev here. Any information needs to go through DC structs."
- I use the adev here because I just reference the code I found in the
same function.
+ if (strcmp(entry->device_class, "battery") == 0) {
< I added.
+ adev->pm.ac_power = power_supply_is_system_supplied() > 0;
+ }
+
if (strcmp(entry->device_class, ACPI_AC_CLASS) == 0) {
< I found.
if (power_supply_is_system_supplied() > 0)
DRM_DEBUG_DRIVER("pm: AC\n");
-And the reason why I need to add another comparison is that the string
of the device_class I got is always "battery" when I plug/unplug the ac cable.
It never reports "ac_adapter" to me. So I add the "battery" line to do
that.
"I seem to remember someone saying that ABM gets disabled on Windows when we're
in AC mode. Have you checked with our Windows guys about this? I feel we're
re-inventing the wheel here for no good reason."
-Yes, I have asked the Windows guys and they told me the ABM should be
disabled in AC mode. But seems we don’t have this function on Linux, so I
implemented this to disable ABM in AC mode.
Thanks,
Ryan Lin.
-Original Message-
From: Wentland, Harry
Sent: Friday, March 25, 2022 10:46 PM
To: Lin, Tsung-hua (Ryan) ; Li, Sun peng (Leo)
; Deucher, Alexander ; Koenig,
Christian ; david1.z...@amd.com; airl...@linux.ie;
dan...@ffwll.ch; seanp...@chromium.org; b...@basnieuwenhuizen.nl; Kazlauskas,
Nicholas ; sas...@kernel.org;
markyac...@google.com; victorchengchi...@amd.com;
ching-shih...@amd.corp-partner.google.com; Siqueira, Rodrigo
; ddavenp...@chromium.org;
amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
linux-ker...@vger.kernel.org; Li, Leon
Subject: Re: [PATCH v2 3/25] drm/amdgpu: Disable ABM when AC mode
On 2022-03-25 00:05, Ryan Lin wrote:
> Disable ABM feature when the system is running on AC mode to get the
> more perfect contrast of the display.
It says patch 3 out of 25. Are there other patches? If so, I can't find them in
my mailbox and neither can patchwork
https://patchwork.freedesktop.org/series/101767/
> Signed-off-by: Ryan Lin
>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 4 ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 1 +
> drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c | 58 ---
> drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 1 +
> 4 files changed, 42 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> index c560c1ab62ecb..bc8bb9aad2e36 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> @@ -822,6 +822,10 @@ static int amdgpu_acpi_event(struct notifier_block *nb,
> struct amdgpu_device *adev = container_of(nb, struct amdgpu_device,
> acpi_nb);
> struct acpi_bus_event *entry = (struct acpi_bus_event *)data;
>
> + if (strcmp(entry->device_class, "battery") == 0) {
> + adev->pm.ac_power = power_supply_is_system_supplied() > 0;
> + }
> +
> if (strcmp(entry->device_class, ACPI_AC_CLASS) == 0) {
> if (power_supply_is_system_supplied() > 0)
> DRM_DEBUG_DRIVER("pm: AC\n");
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index abfcc1304ba0c..3a0afe7602727 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -3454,6 +3454,7 @@ int amdgpu_device_init(struct amdgpu_device
> *adev,
>
> adev->gfx.gfx_off_req_count = 1;
> adev->pm.ac_power = power_supply_is_system_supplied() > 0;
> + adev->pm.old_ac_power = true;
>
> atomic_set(>throttling_logging_enabled, 1);
> /*
> diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c
> b/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c
> index 54a1408c8015c..478a734b66926 100644
> --- a/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c
> +++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c
> @@ -23,6 +23,8 @@
> *
> */
>
> +#include
> +#include "amdgpu.h"
> #include "dmub_abm.h"
> #include "dce_abm.h"
> #include "dc.h"
> @@ -51,6 +53,7 @@
> #define DISABLE_ABM_IMMEDIATELY 255
>
>
> +extern uint amdgpu_dm_abm_level;
>
> static void dmub_abm_enable_fractional_pwm(struct dc_context *dc) {
> @@ -117,28 +120,6 @@ static void dmub_abm_init(struct abm *abm, uint32_t
> backlight)
> dmub_abm_enable_fractional_pwm(abm->ctx);
> }
>
> -static unsigned int
RE: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0
Reviewed-by: Guchun Chen
Regards,
Guchun
-Original Message-
From: Tianci Yin
Sent: Sunday, March 27, 2022 7:19 PM
To: amd-gfx@lists.freedesktop.org
Cc: Chen, Guchun ; Zhu, James ; Wang,
Yu (Charlie) ; Yin, Tianci (Rico)
Subject: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0
From: tiancyin
Some video card has more than one vcn instance, passing 0 to
vcn_v3_0_pause_dpg_mode is incorrect.
Error msg:
Register(1) [mmUVD_POWER_STATUS] failed to reach value
0x0001 != 0x0002
Signed-off-by: tiancyin
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index e1cca0a10653..cb5f0a12333f 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -1488,7 +1488,7 @@ static int vcn_v3_0_stop_dpg_mode(struct amdgpu_device
*adev, int inst_idx)
struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE};
uint32_t tmp;
- vcn_v3_0_pause_dpg_mode(adev, 0, );
+ vcn_v3_0_pause_dpg_mode(adev, inst_idx, );
/* Wait for power status to be 1 */
SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,
--
2.25.1
Re: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0
[AMD Official Use Only]
Thank you James!
Rico
From: Zhu, James
Sent: Sunday, March 27, 2022 21:47
To: Yin, Tianci (Rico) ; amd-gfx@lists.freedesktop.org
Cc: Chen, Guchun ; Wang, Yu (Charlie)
Subject: Re: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0
[AMD Official Use Only]
This patch is Reviewed-by: James Zhu
From: Tianci Yin
Sent: Sunday, March 27, 2022 7:18 AM
To: amd-gfx@lists.freedesktop.org
Cc: Chen, Guchun ; Zhu, James ; Wang,
Yu (Charlie) ; Yin, Tianci (Rico)
Subject: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0
From: tiancyin
Some video card has more than one vcn instance, passing 0 to
vcn_v3_0_pause_dpg_mode is incorrect.
Error msg:
Register(1) [mmUVD_POWER_STATUS] failed to reach value
0x0001 != 0x0002
Signed-off-by: tiancyin
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index e1cca0a10653..cb5f0a12333f 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -1488,7 +1488,7 @@ static int vcn_v3_0_stop_dpg_mode(struct amdgpu_device
*adev, int inst_idx)
struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE};
uint32_t tmp;
- vcn_v3_0_pause_dpg_mode(adev, 0, );
+ vcn_v3_0_pause_dpg_mode(adev, inst_idx, );
/* Wait for power status to be 1 */
SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,
--
2.25.1
Re: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0
[AMD Official Use Only]
This patch is Reviewed-by: James Zhu
From: Tianci Yin
Sent: Sunday, March 27, 2022 7:18 AM
To: amd-gfx@lists.freedesktop.org
Cc: Chen, Guchun ; Zhu, James ; Wang,
Yu (Charlie) ; Yin, Tianci (Rico)
Subject: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0
From: tiancyin
Some video card has more than one vcn instance, passing 0 to
vcn_v3_0_pause_dpg_mode is incorrect.
Error msg:
Register(1) [mmUVD_POWER_STATUS] failed to reach value
0x0001 != 0x0002
Signed-off-by: tiancyin
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index e1cca0a10653..cb5f0a12333f 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -1488,7 +1488,7 @@ static int vcn_v3_0_stop_dpg_mode(struct amdgpu_device
*adev, int inst_idx)
struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE};
uint32_t tmp;
- vcn_v3_0_pause_dpg_mode(adev, 0, );
+ vcn_v3_0_pause_dpg_mode(adev, inst_idx, );
/* Wait for power status to be 1 */
SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,
--
2.25.1
[PATCH] drm/amd/vcn: fix an error msg on vcn 3.0
From: tiancyin
Some video card has more than one vcn instance, passing 0 to
vcn_v3_0_pause_dpg_mode is incorrect.
Error msg:
Register(1) [mmUVD_POWER_STATUS] failed to reach value
0x0001 != 0x0002
Signed-off-by: tiancyin
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index e1cca0a10653..cb5f0a12333f 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -1488,7 +1488,7 @@ static int vcn_v3_0_stop_dpg_mode(struct amdgpu_device
*adev, int inst_idx)
struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE};
uint32_t tmp;
- vcn_v3_0_pause_dpg_mode(adev, 0, );
+ vcn_v3_0_pause_dpg_mode(adev, inst_idx, );
/* Wait for power status to be 1 */
SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,
--
2.25.1
[PATCH 3/5] umr: Add command line support for "--gpu-metrics"
Add command line support for --gpu-metrics, to fall in line with the rest
of the command line arguments' format.
Cc: Tom StDenis
Cc: Jinzhou.Su
Signed-off-by: Luben Tuikov
---
src/app/main.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/app/main.c b/src/app/main.c
index 62ea2f42145f60..6cfbe09bea7b4d 100644
--- a/src/app/main.c
+++ b/src/app/main.c
@@ -861,7 +861,9 @@ int main(int argc, char **argv)
if (umr_print_pp_table(asic, NULL) != 0)
fprintf(stderr, "[ERROR]: can not print
pp table info.\n");
}
- } else if (!strcmp(argv[i], "--gpu_metrics") ||
!strcmp(argv[i], "-gm")) {
+ } else if (!strcmp(argv[i], "--gpu-metrics") ||
+ !strcmp(argv[i], "--gpu_metrics") ||
+ !strcmp(argv[i], "-gm")) {
if (!asic)
asic = get_asic();
if (umr_print_gpu_metrics(asic) != 0)
--
2.35.1.607.gf01e51a7cf
[PATCH 1/5] umr: Add support for "--ppt-read"
Add support for "--ppt-read" to fall in line with the way rest of the
command line options are formatted. The old "--ppt_read" is still
supported.
Cc: Tom StDenis
Cc: Jinzhou.Su
Signed-off-by: Luben Tuikov
---
src/app/main.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/app/main.c b/src/app/main.c
index 2f9d6aadd7ff46..62ea2f42145f60 100644
--- a/src/app/main.c
+++ b/src/app/main.c
@@ -848,7 +848,9 @@ int main(int argc, char **argv)
umr_set_clock_performance(asic, "auto");
if (umr_check_clock_performance(asic, clockperformance,
sizeof(clockperformance)) != 0)
printf("power_dpm_force_performance_level: %s",
clockperformance);
- } else if (!strcmp(argv[i], "--ppt_read") || !strcmp(argv[i],
"-pptr")) {
+ } else if (!strcmp(argv[i], "--ppt-read") ||
+ !strcmp(argv[i], "--ppt_read") ||
+ !strcmp(argv[i], "-pptr")) {
if (!asic)
asic = get_asic();
if (i + 1 < argc) {
base-commit: decd91d8eae42d63eda4f6b7c97159b9cc343c26
--
2.35.1.607.gf01e51a7cf
[PATCH 4/5] umr: Document new format command line options
Document new format command line options in the manual page: "--ppt-read" and "--gpu-metrics". The old format using underscores is still supported in the main app, in case it is used in scripts, and so on. Cc: Tom StDenis Cc: Jinzhou.Su Signed-off-by: Luben Tuikov --- doc/umr.1 | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/doc/umr.1 b/doc/umr.1 index 62eea7db320b88..ad518e0fa7451d 100644 --- a/doc/umr.1 +++ b/doc/umr.1 @@ -288,11 +288,11 @@ Set power_dpm_force_performance_level to low. .IP "--clock-auto, -ca" Set power_dpm_force_performance_level to auto. -.IP "--ppt_read, -pptr [ppt_field_name]" +.IP "--ppt-read, -pptr [ppt_field_name]" Read powerplay table value and print it to stdout. This command will print all the powerplay table information or the corresponding string in powerplay table. -.IP "--gpu_metrics, -gm" +.IP "--gpu-metrics, -gm" Print the GPU metrics table for the device. .SH "Notes" -- 2.35.1.607.gf01e51a7cf
[PATCH 5/5] umr: Completion: update new format options
Update completion for "--ppt-read" and "--gpu-metrics".
Cc: Tom StDenis
Cc: Jinzhou.Su
Signed-off-by: Luben Tuikov
---
scripts/umr-completion.bash | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/umr-completion.bash b/scripts/umr-completion.bash
index 0e1444357c82a9..bd0b61b2d38831 100644
--- a/scripts/umr-completion.bash
+++ b/scripts/umr-completion.bash
@@ -333,7 +333,7 @@ _umr_comp_ring_stream()
_umr_completion()
{
-local ALL_LONG_ARGS=(--database-path --option --gpu --instance --force
--pci --gfxoff --vm_partition --bank --sbank --cbank --config --enumerate
--list-blocks --list-regs --dump-discovery-table --lookup --write --writebit
--read --scan --logscan --top --waves --profiler --vm-decode --vm-read
--vm-write --vm-write-word --vm-disasm --ring-stream --dump-ib --dump-ib-file
--header-dump --power --clock-scan --clock-manual --clock-high --clock-low
--clock-auto --ppt_read --gpu_metrics --power --vbios_info --test-log
--test-harness --server --gui)
+local ALL_LONG_ARGS=(--database-path --option --gpu --instance --force
--pci --gfxoff --vm_partition --bank --sbank --cbank --config --enumerate
--list-blocks --list-regs --dump-discovery-table --lookup --write --writebit
--read --scan --logscan --top --waves --profiler --vm-decode --vm-read
--vm-write --vm-write-word --vm-disasm --ring-stream --dump-ib --dump-ib-file
--header-dump --power --clock-scan --clock-manual --clock-high --clock-low
--clock-auto --ppt-read --gpu-metrics --power --vbios_info --test-log
--test-harness --server --gui)
local cur prev
--
2.35.1.607.gf01e51a7cf
[PATCH 2/5] umr: Reorg and print the message on ppt-read
Reorganize the logic and actually print the error message when the ASIC
doesn't support the power-play table feature.
Cc: Tom StDenis
Cc: Jinzhou.Su
Signed-off-by: Luben Tuikov
---
src/app/pp_table.c | 29 +
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/src/app/pp_table.c b/src/app/pp_table.c
index 9ab42a9ae2296c..33c2d01e897ef3 100644
--- a/src/app/pp_table.c
+++ b/src/app/pp_table.c
@@ -20,27 +20,32 @@
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
+
+#include
#include "umrapp.h"
#include "smu_pptable_navi10.h"
-int umr_print_pp_table(struct umr_asic *asic, const char* param)
+int umr_print_pp_table(struct umr_asic *asic, const char *param)
{
- FILE* fp;
- int ret = -1;
+ FILE *fp;
+ int res;
char name[256];
snprintf(name, sizeof(name)-1, \
- "/sys/class/drm/card%d/device/pp_table", asic->instance);
+"/sys/class/drm/card%d/device/pp_table", asic->instance);
fp = fopen(name, "r");
- if (fp) {
- if (strcmp(asic->asicname, "navi10") == 0 ||
strcmp(asic->asicname, "navi14") == 0) {
- ret = umr_navi10_pptable_print(param, fp);
- }
- fclose(fp);
+ if (!fp) {
+ asic->err_msg("fopen: %s: %d\n", strerror(errno), errno);
+ return -errno;
+ }
+ if (strcmp(asic->asicname, "navi10") == 0 ||
+ strcmp(asic->asicname, "navi14") == 0) {
+ res = umr_navi10_pptable_print(param, fp);
} else {
- printf("Powerplay table feature only support on Navi10/Navi14
now.");
- return -1;
+ asic->err_msg("The powerplay table feature is currently
supported only on Navi10/Navi14.\n");
+ res = -1;
}
+ fclose(fp);
- return ret;
+ return res;
}
--
2.35.1.607.gf01e51a7cf
