[PATCH] drm/amd/amdkfd: Fix a resource leak in svm_range_validate_and_map()
Analysis of code by Coverity, a static code analyser, has identified
a resource leak in the symbol hmm_range. This leak occurs when one of
the prior steps before it is released encounters an error.
Signed-off-by: Ramesh Errabolu
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
index 386875e6eb96..dcb1d5d3f860 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
@@ -1658,7 +1658,7 @@ static int svm_range_validate_and_map(struct mm_struct
*mm,
start = map_start << PAGE_SHIFT;
end = (map_last + 1) << PAGE_SHIFT;
for (addr = start; !r && addr < end; ) {
- struct hmm_range *hmm_range;
+ struct hmm_range *hmm_range = NULL;
unsigned long map_start_vma;
unsigned long map_last_vma;
struct vm_area_struct *vma;
@@ -1696,7 +1696,9 @@ static int svm_range_validate_and_map(struct mm_struct
*mm,
}
svm_range_lock(prange);
- if (!r && amdgpu_hmm_range_get_pages_done(hmm_range)) {
+
+ // Free backing memory of hmm_range if it was initialized
+ if (hmm_range && amdgpu_hmm_range_get_pages_done(hmm_range)) {
pr_debug("hmm update the range, need validate again\n");
r = -EAGAIN;
}
--
2.34.1
[PATCH] drm/amdgpu: Add gfx v9_4_4 ip block
From: Hawking Zhang
Add gfx v9_4_4 ip block support
Signed-off-by: Hawking Zhang
Reviewed-by: Le Ma
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 10 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 11 --
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 3 +-
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 6
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c | 4 ++-
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 36 +--
drivers/gpu/drm/amd/amdgpu/soc15.c| 2 ++
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 1 +
drivers/gpu/drm/amd/amdkfd/kfd_debug.h| 1 +
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 22 +---
.../amd/amdkfd/kfd_device_queue_manager_v9.c | 3 +-
.../gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c | 12 ---
.../gpu/drm/amd/amdkfd/kfd_packet_manager.c | 3 +-
drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 6 ++--
drivers/gpu/drm/amd/amdkfd/kfd_process.c | 3 +-
.../amd/amdkfd/kfd_process_queue_manager.c| 8 +++--
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 1 +
drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 6 ++--
drivers/gpu/drm/amd/pm/amdgpu_pm.c| 29 +--
21 files changed, 123 insertions(+), 48 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 861ccff78af95..03a7b2c07f02b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1308,6 +1308,7 @@ static int amdgpu_device_asic_init(struct amdgpu_device
*adev)
amdgpu_asic_pre_asic_init(adev);
if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) ||
+ amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4) ||
amdgpu_ip_version(adev, GC_HWIP, 0) >= IP_VERSION(11, 0, 0)) {
amdgpu_psp_wait_for_bootloader(adev);
ret = amdgpu_atomfirmware_asic_init(adev, true);
@@ -5840,9 +5841,9 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
adev->asic_reset_res = r;
/* Aldebaran and gfx_11_0_3 support ras in SRIOV, so need
resume ras during reset */
- if (amdgpu_ip_version(adev, GC_HWIP, 0) ==
- IP_VERSION(9, 4, 2) ||
+ if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 2)
||
amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3)
||
+ amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4)
||
amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(11, 0, 3))
amdgpu_ras_resume(adev);
} else {
@@ -6276,8 +6277,9 @@ pci_ers_result_t amdgpu_pci_slot_reset(struct pci_dev
*pdev)
amdgpu_put_xgmi_hive(hive);
}
ras = amdgpu_ras_get_context(adev);
- if ((amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3)) &&
-ras && (atomic_read(>in_recovery) || hive_ras_recovery))
+ if ((amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) ||
+amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4)) &&
+ ras && (atomic_read(>in_recovery) || hive_ras_recovery))
return PCI_ERS_RESULT_RECOVERED;
DRM_INFO("PCI error: slot reset callback!!\n");
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 8384cda48b29f..7ed7a259c79a1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -1424,7 +1424,8 @@ static void amdgpu_discovery_harvest_ip(struct
amdgpu_device *adev)
* harvest configuration.
*/
if (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(10, 2, 0) &&
- amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 3)) {
+ amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 3) &&
+ amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 4)) {
if ((adev->pdev->device == 0x731E &&
(adev->pdev->revision == 0xC6 ||
adev->pdev->revision == 0xC7)) ||
@@ -1677,6 +1678,7 @@ static int amdgpu_discovery_set_common_ip_blocks(struct
amdgpu_device *adev)
case IP_VERSION(9, 4, 1):
case IP_VERSION(9, 4, 2):
case IP_VERSION(9, 4, 3):
+ case IP_VERSION(9, 4, 4):
amdgpu_device_ip_block_add(adev, _common_ip_block);
break;
case IP_VERSION(10, 1, 10):
@@ -1729,6 +1731,7 @@ static int amdgpu_discovery_set_gmc_ip_blocks(struct
amdgpu_device *adev)
case IP_VERSION(9, 4, 1):
case IP_VERSION(9, 4, 2):
case IP_VERSION(9, 4, 3):
+ case IP_VERSION(9, 4, 4):
[PATCH] drm/amdgpu: Add smu v13_0_14 ip block
From: Hawking Zhang
Add smu v13_0_14 ip block support
Signed-off-by: Hawking Zhang
Reviewed-by: Le Ma
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c | 6 --
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c | 4 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c| 2 ++
drivers/gpu/drm/amd/amdgpu/soc15.c | 4 +++-
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c| 2 ++
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 3 ++-
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 7 +--
10 files changed, 25 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
index c50202215f6b1..b6b757268b8e3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
@@ -759,7 +759,7 @@ static int aca_bank_get_error_code(struct amdgpu_device
*adev, struct aca_bank *
if (!smu_funcs || !smu_funcs->parse_error_code)
return -EOPNOTSUPP;
- return smu_funcs->parse_error_code(adev, bank);
+ return (smu_funcs->parse_error_code(adev, bank));
}
int aca_bank_check_error_codes(struct amdgpu_device *adev, struct aca_bank
*bank, int *err_codes, int size)
@@ -892,7 +892,9 @@ DEFINE_DEBUGFS_ATTRIBUTE(aca_debug_mode_fops, NULL,
amdgpu_aca_smu_debug_mode_se
void amdgpu_aca_smu_debugfs_init(struct amdgpu_device *adev, struct dentry
*root)
{
#if defined(CONFIG_DEBUG_FS)
- if (!root || adev->ip_versions[MP1_HWIP][0] != IP_VERSION(13, 0, 6))
+ if (!root ||
+ (adev->ip_versions[MP1_HWIP][0] != IP_VERSION(13, 0, 6) &&
+adev->ip_versions[MP1_HWIP][0] != IP_VERSION(13, 0, 14)))
return;
debugfs_create_file("aca_debug_mode", 0200, root, adev,
_debug_mode_fops);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index b68cd3b9d60ab..8384cda48b29f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -1910,6 +1910,7 @@ static int amdgpu_discovery_set_smu_ip_blocks(struct
amdgpu_device *adev)
case IP_VERSION(13, 0, 8):
case IP_VERSION(13, 0, 10):
case IP_VERSION(13, 0, 11):
+ case IP_VERSION(13, 0, 14):
amdgpu_device_ip_block_add(adev, _v13_0_ip_block);
break;
case IP_VERSION(14, 0, 0):
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
index a08c148b13f92..ceb5163480f4c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
@@ -100,6 +100,7 @@ static bool is_fru_eeprom_supported(struct amdgpu_device
*adev, u32 *fru_addr)
*fru_addr = FRU_EEPROM_MADDR_6;
return true;
case IP_VERSION(13, 0, 6):
+ case IP_VERSION(13, 0, 14):
if (fru_addr)
*fru_addr = FRU_EEPROM_MADDR_8;
return true;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
index a111751b97818..7b7040ec61bd7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
@@ -609,7 +609,9 @@ DEFINE_DEBUGFS_ATTRIBUTE(mca_debug_mode_fops, NULL,
amdgpu_mca_smu_debug_mode_se
void amdgpu_mca_smu_debugfs_init(struct amdgpu_device *adev, struct dentry
*root)
{
#if defined(CONFIG_DEBUG_FS)
- if (!root || amdgpu_ip_version(adev, MP1_HWIP, 0) != IP_VERSION(13, 0,
6))
+ if (!root ||
+ (amdgpu_ip_version(adev, MP1_HWIP, 0) != IP_VERSION(13, 0, 6) &&
+amdgpu_ip_version(adev, MP1_HWIP, 0) != IP_VERSION(13, 0, 14)))
return;
debugfs_create_file("mca_debug_mode", 0200, root, adev,
_debug_mode_fops);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
index 06a62a8a992e9..9b789dcc2bd17 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
@@ -161,6 +161,7 @@ static bool __is_ras_eeprom_supported(struct amdgpu_device
*adev)
case IP_VERSION(13, 0, 10):
return true;
case IP_VERSION(13, 0, 6):
+ case IP_VERSION(13, 0, 14):
return (adev->gmc.is_app_apu) ? false : true;
default:
return false;
@@ -222,6 +223,7 @@ static bool __get_eeprom_i2c_addr(struct amdgpu_device
*adev,
return true;
case IP_VERSION(13, 0, 6):
case IP_VERSION(13, 0, 10):
+ case IP_VERSION(13, 0, 14):
control->i2c_address =
[PATCH] drm/amdgpu: Add psp v13_0_14 ip block
From: Hawking Zhang
Add psp v13_0_14 ip block support.
Signed-off-by: Hawking Zhang
Reviewed-by: Le Ma
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 13 ++---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 ++
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c| 12 +---
drivers/gpu/drm/amd/amdgpu/soc15.c| 3 ++-
5 files changed, 24 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 83bc80f517fe1..b68cd3b9d60ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -1851,6 +1851,7 @@ static int amdgpu_discovery_set_psp_ip_blocks(struct
amdgpu_device *adev)
case IP_VERSION(13, 0, 8):
case IP_VERSION(13, 0, 10):
case IP_VERSION(13, 0, 11):
+ case IP_VERSION(13, 0, 14):
case IP_VERSION(14, 0, 0):
case IP_VERSION(14, 0, 1):
amdgpu_device_ip_block_add(adev, _v13_0_ip_block);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index a551c5b67fdd1..37820dd03cabd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -145,6 +145,7 @@ static int psp_init_sriov_microcode(struct psp_context *psp)
adev->virt.autoload_ucode_id = 0;
break;
case IP_VERSION(13, 0, 6):
+ case IP_VERSION(13, 0, 14):
ret = psp_init_cap_microcode(psp, ucode_prefix);
ret &= psp_init_ta_microcode(psp, ucode_prefix);
break;
@@ -207,6 +208,7 @@ static int psp_early_init(void *handle)
psp->boot_time_tmr = false;
fallthrough;
case IP_VERSION(13, 0, 6):
+ case IP_VERSION(13, 0, 14):
psp_v13_0_set_psp_funcs(psp);
psp->autoload_supported = false;
break;
@@ -355,7 +357,8 @@ static bool psp_get_runtime_db_entry(struct amdgpu_device
*adev,
bool ret = false;
int i;
- if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6))
+ if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) ||
+ amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14))
return false;
db_header_pos = adev->gmc.mc_vram_size - PSP_RUNTIME_DB_OFFSET;
@@ -847,6 +850,7 @@ static bool psp_skip_tmr(struct psp_context *psp)
case IP_VERSION(13, 0, 2):
case IP_VERSION(13, 0, 6):
case IP_VERSION(13, 0, 10):
+ case IP_VERSION(13, 0, 14):
return true;
default:
return false;
@@ -1450,7 +1454,9 @@ int psp_xgmi_get_topology_info(struct psp_context *psp,
(psp->xgmi_context.supports_extended_data &&
get_extended_data) ||
amdgpu_ip_version(psp->adev, MP0_HWIP, 0) ==
- IP_VERSION(13, 0, 6);
+ IP_VERSION(13, 0, 6) ||
+ amdgpu_ip_version(psp->adev, MP0_HWIP, 0) ==
+ IP_VERSION(13, 0, 14);
bool ta_port_num_support = amdgpu_sriov_vf(psp->adev) ? 0 :
psp->xgmi_context.xgmi_ta_caps &
EXTEND_PEER_LINK_INFO_CMD_FLAG;
@@ -2636,7 +2642,8 @@ static int psp_load_p2s_table(struct psp_context *psp)
(adev->pm.rpm_mode == AMDGPU_RUNPM_BAMACO)))
return 0;
- if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6)) {
+ if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) ||
+ amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14)) {
uint32_t supp_vers = adev->flags & AMD_IS_APU ? 0x0036013D :
0x0036003C;
if (psp->sos.fw_version < supp_vers)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index a037e8fba29f1..7b30f448eab63 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -3053,6 +3053,7 @@ static bool amdgpu_ras_asic_supported(struct
amdgpu_device *adev)
switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) {
case IP_VERSION(13, 0, 2):
case IP_VERSION(13, 0, 6):
+ case IP_VERSION(13, 0, 14):
return true;
default:
return false;
@@ -3064,6 +3065,7 @@ static bool amdgpu_ras_asic_supported(struct
amdgpu_device *adev)
case IP_VERSION(13, 0, 0):
case IP_VERSION(13, 0, 6):
case IP_VERSION(13, 0, 10):
+ case IP_VERSION(13, 0, 14):
return true;
[PATCH] drm/amdgpu: Add sdma v4_4_5 ip block
From: Hawking Zhang
Add sdma v4_4_5 ip block support
Signed-off-by: Hawking Zhang
Reviewed-by: Le Ma
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 3 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c | 9 +
drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c | 6 --
drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 9 ++---
drivers/gpu/drm/amd/amdgpu/vega20_ih.c| 9 ++---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 1 +
6 files changed, 25 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 2aad1ba0ab9d2..83bc80f517fe1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -1781,6 +1781,7 @@ static int amdgpu_discovery_set_ih_ip_blocks(struct
amdgpu_device *adev)
case IP_VERSION(4, 2, 1):
case IP_VERSION(4, 4, 0):
case IP_VERSION(4, 4, 2):
+ case IP_VERSION(4, 4, 5):
amdgpu_device_ip_block_add(adev, _ih_ip_block);
break;
case IP_VERSION(5, 0, 0):
@@ -2059,6 +2060,7 @@ static int amdgpu_discovery_set_sdma_ip_blocks(struct
amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, _v4_0_ip_block);
break;
case IP_VERSION(4, 4, 2):
+ case IP_VERSION(4, 4, 5):
amdgpu_device_ip_block_add(adev, _v4_4_2_ip_block);
break;
case IP_VERSION(5, 0, 0):
@@ -2611,6 +2613,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device
*adev)
case IP_VERSION(4, 2, 1):
case IP_VERSION(4, 4, 0):
case IP_VERSION(4, 4, 2):
+ case IP_VERSION(4, 4, 5):
adev->hdp.funcs = _v4_0_funcs;
break;
case IP_VERSION(5, 0, 0):
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
index 6d23588ef2a2e..151f83ea803bb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
@@ -258,11 +258,12 @@ int amdgpu_sdma_init_microcode(struct amdgpu_device *adev,
else {
/* Use a single copy per SDMA firmware
type. PSP uses the same instance for all
* groups of SDMAs */
- if (amdgpu_ip_version(adev, SDMA0_HWIP,
- 0) ==
- IP_VERSION(4, 4, 2) &&
+ if ((amdgpu_ip_version(adev,
SDMA0_HWIP, 0) ==
+ IP_VERSION(4, 4, 2) ||
+amdgpu_ip_version(adev,
SDMA0_HWIP, 0) ==
+ IP_VERSION(4, 4, 5)) &&
adev->firmware.load_type ==
- AMDGPU_FW_LOAD_PSP &&
+ AMDGPU_FW_LOAD_PSP &&
adev->sdma.num_inst_per_aid == i) {
break;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
index 4db6bb73ead42..077c6d920e27f 100644
--- a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
@@ -50,7 +50,8 @@ static void hdp_v4_0_invalidate_hdp(struct amdgpu_device
*adev,
struct amdgpu_ring *ring)
{
if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 0) ||
- amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 2))
+ amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 2) ||
+ amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 5))
return;
if (!ring || !ring->funcs->emit_wreg)
@@ -129,7 +130,8 @@ static void hdp_v4_0_get_clockgating_state(struct
amdgpu_device *adev,
{
int data;
- if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 2)) {
+ if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 2) ||
+ amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 5)) {
/* Default enabled */
*flags |= AMD_CG_SUPPORT_HDP_MGCG;
return;
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
index 7ea209b681541..3b5f7a5c3756b 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
@@ -44,6 +44,7 @@
#include "amdgpu_ras.h"
MODULE_FIRMWARE("amdgpu/sdma_4_4_2.bin");
+MODULE_FIRMWARE("amdgpu/sdma_4_4_5.bin");
#define mmSMNAID_AID0_MCA_SMU 0x03b30400
@@ -134,8 +135,8 @@ static int sdma_v4_4_2_init_microcode(struct
[PATCH 1/4] drm/amd/pm: support mode1 reset on smu_v14_0_3
From: Kenneth Feng
support mode1 reset on smu_v14_0_3
Signed-off-by: Kenneth Feng
Reviewed-by: Likun Gao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc24.c| 1 +
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c
b/drivers/gpu/drm/amd/amdgpu/soc24.c
index 1bbcd23e703ba..12900488dd618 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc24.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc24.c
@@ -204,6 +204,7 @@ soc24_asic_reset_method(struct amdgpu_device *adev)
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
case IP_VERSION(14, 0, 2):
+ case IP_VERSION(14, 0, 3):
return AMD_RESET_METHOD_MODE1;
default:
if (amdgpu_dpm_is_baco_supported(adev))
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 7789b313285c4..9bcc2ffd1b63a 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1844,6 +1844,8 @@ static int smu_disable_dpms(struct smu_context *smu)
case IP_VERSION(13, 0, 0):
case IP_VERSION(13, 0, 7):
case IP_VERSION(13, 0, 10):
+ case IP_VERSION(14, 0, 2):
+ case IP_VERSION(14, 0, 3):
return 0;
default:
break;
--
2.44.0
[PATCH 4/4] drm/amd/pm: add pstate support for SMU_14_0_2
From: Gui Chengming
Populate pstate clock.
Signed-off-by: Gui Chengming
Reviewed-by: Kenneth Feng
Change-Id: Ib95b7a334c1bd51592535b40fd2e7b8f6802571f
Signed-off-by: Alex Deucher
---
.../drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c | 54 ++-
1 file changed, 53 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
index 83bca23c3ebee..0d5ad531c764f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
@@ -1232,7 +1232,59 @@ static int
smu_v14_0_2_get_thermal_temperature_range(struct smu_context *smu,
static int smu_v14_0_2_populate_umd_state_clk(struct smu_context *smu)
{
- // TODO
+ struct smu_14_0_dpm_context *dpm_context =
+ smu->smu_dpm.dpm_context;
+ struct smu_14_0_dpm_table *gfx_table =
+ _context->dpm_tables.gfx_table;
+ struct smu_14_0_dpm_table *mem_table =
+ _context->dpm_tables.uclk_table;
+ struct smu_14_0_dpm_table *soc_table =
+ _context->dpm_tables.soc_table;
+ struct smu_14_0_dpm_table *vclk_table =
+ _context->dpm_tables.vclk_table;
+ struct smu_14_0_dpm_table *dclk_table =
+ _context->dpm_tables.dclk_table;
+ struct smu_14_0_dpm_table *fclk_table =
+ _context->dpm_tables.fclk_table;
+ struct smu_umd_pstate_table *pstate_table =
+ >pstate_table;
+ struct smu_table_context *table_context = >smu_table;
+ PPTable_t *pptable = table_context->driver_pptable;
+ DriverReportedClocks_t driver_clocks =
+ pptable->SkuTable.DriverReportedClocks;
+
+ pstate_table->gfxclk_pstate.min = gfx_table->min;
+ if (driver_clocks.GameClockAc &&
+ (driver_clocks.GameClockAc < gfx_table->max))
+ pstate_table->gfxclk_pstate.peak = driver_clocks.GameClockAc;
+ else
+ pstate_table->gfxclk_pstate.peak = gfx_table->max;
+
+ pstate_table->uclk_pstate.min = mem_table->min;
+ pstate_table->uclk_pstate.peak = mem_table->max;
+
+ pstate_table->socclk_pstate.min = soc_table->min;
+ pstate_table->socclk_pstate.peak = soc_table->max;
+
+ pstate_table->vclk_pstate.min = vclk_table->min;
+ pstate_table->vclk_pstate.peak = vclk_table->max;
+
+ pstate_table->dclk_pstate.min = dclk_table->min;
+ pstate_table->dclk_pstate.peak = dclk_table->max;
+
+ pstate_table->fclk_pstate.min = fclk_table->min;
+ pstate_table->fclk_pstate.peak = fclk_table->max;
+
+ if (driver_clocks.BaseClockAc &&
+ driver_clocks.BaseClockAc < gfx_table->max)
+ pstate_table->gfxclk_pstate.standard =
driver_clocks.BaseClockAc;
+ else
+ pstate_table->gfxclk_pstate.standard = gfx_table->max;
+ pstate_table->uclk_pstate.standard = mem_table->max;
+ pstate_table->socclk_pstate.standard = soc_table->min;
+ pstate_table->vclk_pstate.standard = vclk_table->min;
+ pstate_table->dclk_pstate.standard = dclk_table->min;
+ pstate_table->fclk_pstate.standard = fclk_table->min;
return 0;
}
--
2.44.0
[PATCH 3/4] drm/amd/pm: add tool log support on smu v14.0.2/3
From: Kenneth Feng
add tool log support on smu v14.0.2/3
Signed-off-by: Kenneth Feng
Reviewed-by: Jack Gui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h | 2 ++
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h
b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h
index 1fc4557e6fb44..2617d94b4c4de 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h
@@ -46,6 +46,8 @@
#define MAX_DPM_LEVELS 16
#define MAX_PCIE_CONF 3
+#define SMU14_TOOL_SIZE0x19000
+
struct smu_14_0_max_sustainable_clocks {
uint32_t display_clock;
uint32_t phy_clock;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
index b5bd8dd38dfdf..83bca23c3ebee 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
@@ -465,6 +465,8 @@ static int smu_v14_0_2_tables_init(struct smu_context *smu)
PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
SMU_TABLE_INIT(tables, SMU_TABLE_OVERDRIVE, sizeof(OverDriveTable_t),
PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
+ SMU_TABLE_INIT(tables, SMU_TABLE_PMSTATUSLOG, SMU14_TOOL_SIZE,
+ PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
SMU_TABLE_INIT(tables, SMU_TABLE_ACTIVITY_MONITOR_COEFF,
sizeof(DpmActivityMonitorCoeffIntExternal_t), PAGE_SIZE,
AMDGPU_GEM_DOMAIN_VRAM);
--
2.44.0
[PATCH 2/4] drm/amd/pm: enable mode1 reset on smu v14.0.2/v14.0.3
From: Kenneth Feng
enable mode1 reset on smu v14.0.2/v14.0.3
Signed-off-by: Kenneth Feng
Reviewed-by: Likun Gao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
index 706265220292a..b5bd8dd38dfdf 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
@@ -1637,7 +1637,13 @@ static int smu_v14_0_2_mode1_reset(struct smu_context
*smu)
{
int ret = 0;
- // TODO
+ ret = smu_cmn_send_smc_msg(smu, SMU_MSG_Mode1Reset, NULL);
+ if (!ret) {
+ if (amdgpu_emu_mode == 1)
+ msleep(5);
+ else
+ msleep(500);
+ }
return ret;
}
--
2.44.0
[PATCH 3/3] drm/amdgpu/mes12: Use a separate fence per transaction
We can't use a shared fence location because each transaction
should be considered independently.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index 57bc277677ed6..76db85157bf9c 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
@@ -153,6 +153,10 @@ static int mes_v12_0_submit_pkt_and_poll_completion(struct
amdgpu_mes *mes,
unsigned long flags;
const char *op_str, *misc_op_str;
signed long timeout = 300; /* 3000 ms */
+ u32 fence_offset;
+ u64 fence_gpu_addr;
+ u64 *fence_ptr;
+ int ret;
if (x_pkt->header.opcode >= MES_SCH_API_MAX)
return -EINVAL;
@@ -165,15 +169,24 @@ static int
mes_v12_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes,
}
BUG_ON(size % 4 != 0);
+ ret = amdgpu_device_wb_get(adev, _offset);
+ if (ret)
+ return ret;
+ fence_gpu_addr =
+ adev->wb.gpu_addr + (fence_offset * 4);
+ fence_ptr = (u64 *)>wb.wb[fence_offset];
+ *fence_ptr = 0;
+
spin_lock_irqsave(>ring_lock, flags);
if (amdgpu_ring_alloc(ring, ndw)) {
spin_unlock_irqrestore(>ring_lock, flags);
+ amdgpu_device_wb_free(adev, fence_offset);
return -ENOMEM;
}
api_status = (struct MES_API_STATUS *)((char *)pkt + api_status_off);
- api_status->api_completion_fence_addr = mes->ring.fence_drv.gpu_addr;
- api_status->api_completion_fence_value = ++mes->ring.fence_drv.sync_seq;
+ api_status->api_completion_fence_addr = fence_gpu_addr;
+ api_status->api_completion_fence_value = 1;
amdgpu_ring_write_multiple(ring, pkt, ndw);
amdgpu_ring_commit(ring);
@@ -189,8 +202,9 @@ static int mes_v12_0_submit_pkt_and_poll_completion(struct
amdgpu_mes *mes,
else
dev_dbg(adev->dev, "MES msg=%d was emitted\n",
x_pkt->header.opcode);
- r = amdgpu_fence_wait_polling(ring, ring->fence_drv.sync_seq,
- timeout);
+ r = amdgpu_mes_fence_wait_polling(fence_ptr, (u64)1, timeout);
+ amdgpu_device_wb_free(adev, fence_offset);
+
if (r < 1) {
if (misc_op_str)
dev_err(adev->dev, "MES failed to respond to msg=%s
(%s)\n",
--
2.44.0
[PATCH 2/3] drm/amdgpu/mes12: increase mes submission timeout
MES internally has a timeout allowance of 2 seconds. Increase driver timeout to 3 seconds to be safe. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c index 9385ee76f3e6b..57bc277677ed6 100644 --- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c @@ -151,8 +151,8 @@ static int mes_v12_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, struct amdgpu_device *adev = mes->adev; struct amdgpu_ring *ring = >ring; unsigned long flags; - signed long timeout = adev->usec_timeout; const char *op_str, *misc_op_str; + signed long timeout = 300; /* 3000 ms */ if (x_pkt->header.opcode >= MES_SCH_API_MAX) return -EINVAL; -- 2.44.0
[PATCH 1/3] drm/amdgpu/mes12: print MES opcodes rather than numbers
Makes it easier to review the logs when there are MES
errors.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 81 --
1 file changed, 77 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index cbd5b312a075b..9385ee76f3e6b 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
@@ -86,18 +86,76 @@ static const struct amdgpu_ring_funcs mes_v12_0_ring_funcs
= {
.insert_nop = amdgpu_ring_insert_nop,
};
+static const char *mes_v12_0_opcodes[] = {
+ "SET_HW_RSRC",
+ "SET_SCHEDULING_CONFIG",
+ "ADD_QUEUE",
+ "REMOVE_QUEUE",
+ "PERFORM_YIELD",
+ "SET_GANG_PRIORITY_LEVEL",
+ "SUSPEND",
+ "RESUME",
+ "RESET",
+ "SET_LOG_BUFFER",
+ "CHANGE_GANG_PRORITY",
+ "QUERY_SCHEDULER_STATUS",
+ "SET_DEBUG_VMID",
+ "MISC",
+ "UPDATE_ROOT_PAGE_TABLE",
+ "AMD_LOG",
+ "SET_SE_MODE",
+ "SET_GANG_SUBMIT",
+ "SET_HW_RSRC_1",
+};
+
+static const char *mes_v12_0_misc_opcodes[] = {
+ "WRITE_REG",
+ "INV_GART",
+ "QUERY_STATUS",
+ "READ_REG",
+ "WAIT_REG_MEM",
+ "SET_SHADER_DEBUGGER",
+ "NOTIFY_WORK_ON_UNMAPPED_QUEUE",
+ "NOTIFY_TO_UNMAP_PROCESSES",
+};
+
+static const char *mes_v12_0_get_op_string(union MESAPI__MISC *x_pkt)
+{
+ const char *op_str = NULL;
+
+ if (x_pkt->header.opcode < ARRAY_SIZE(mes_v12_0_opcodes))
+ op_str = mes_v12_0_opcodes[x_pkt->header.opcode];
+
+ return op_str;
+}
+
+static const char *mes_v12_0_get_misc_op_string(union MESAPI__MISC *x_pkt)
+{
+ const char *op_str = NULL;
+
+ if ((x_pkt->header.opcode == MES_SCH_API_MISC) &&
+ (x_pkt->opcode < ARRAY_SIZE(mes_v12_0_misc_opcodes)))
+ op_str = mes_v12_0_misc_opcodes[x_pkt->opcode];
+
+ return op_str;
+}
+
static int mes_v12_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes,
void *pkt, int size,
int api_status_off)
{
int ndw = size / 4;
signed long r;
- union MESAPI__ADD_QUEUE *x_pkt = pkt;
+ union MESAPI__MISC *x_pkt = pkt;
struct MES_API_STATUS *api_status;
struct amdgpu_device *adev = mes->adev;
struct amdgpu_ring *ring = >ring;
unsigned long flags;
signed long timeout = adev->usec_timeout;
+ const char *op_str, *misc_op_str;
+
+ if (x_pkt->header.opcode >= MES_SCH_API_MAX)
+ return -EINVAL;
if (amdgpu_emu_mode) {
timeout *= 100;
@@ -121,13 +179,28 @@ static int
mes_v12_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes,
amdgpu_ring_commit(ring);
spin_unlock_irqrestore(>ring_lock, flags);
- DRM_DEBUG("MES msg=%d was emitted\n", x_pkt->header.opcode);
+ op_str = mes_v12_0_get_op_string(x_pkt);
+ misc_op_str = mes_v12_0_get_misc_op_string(x_pkt);
+
+ if (misc_op_str)
+ dev_dbg(adev->dev, "MES msg=%s (%s) was emitted\n", op_str,
misc_op_str);
+ else if (op_str)
+ dev_dbg(adev->dev, "MES msg=%s was emitted\n", op_str);
+ else
+ dev_dbg(adev->dev, "MES msg=%d was emitted\n",
x_pkt->header.opcode);
r = amdgpu_fence_wait_polling(ring, ring->fence_drv.sync_seq,
timeout);
if (r < 1) {
- DRM_ERROR("MES failed to response msg=%d\n",
- x_pkt->header.opcode);
+ if (misc_op_str)
+ dev_err(adev->dev, "MES failed to respond to msg=%s
(%s)\n",
+ op_str, misc_op_str);
+ else if (op_str)
+ dev_err(adev->dev, "MES failed to respond to msg=%s\n",
+ op_str);
+ else
+ dev_err(adev->dev, "MES failed to respond to msg=%d\n",
+ x_pkt->header.opcode);
while (halt_if_hws_hang)
schedule();
--
2.44.0
[PATCH] drm/amd/amdgpu: enable mmhub and athub cg on gc 12.0.1
From: Kenneth Feng enable mmhub and athub cg on gc 12.0.1 Signed-off-by: Kenneth Feng Reviewed-by: Likun Gao Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc24.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c b/drivers/gpu/drm/amd/amdgpu/soc24.c index 174126bc5f602..1bbcd23e703ba 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc24.c +++ b/drivers/gpu/drm/amd/amdgpu/soc24.c @@ -408,7 +408,12 @@ static int soc24_common_early_init(void *handle) AMD_CG_SUPPORT_GFX_3D_CGLS | AMD_CG_SUPPORT_REPEATER_FGCG | AMD_CG_SUPPORT_GFX_FGCG | - AMD_CG_SUPPORT_GFX_PERF_CLK; + AMD_CG_SUPPORT_GFX_PERF_CLK | + AMD_CG_SUPPORT_ATHUB_MGCG | + AMD_CG_SUPPORT_ATHUB_LS | + AMD_CG_SUPPORT_MC_MGCG | + AMD_CG_SUPPORT_MC_LS; + adev->pg_flags = AMD_PG_SUPPORT_VCN | AMD_PG_SUPPORT_JPEG | AMD_PG_SUPPORT_VCN_DPG; -- 2.44.0
[PATCH 7/7] drm/amd/amdgpu: enable gfxoff on gc 12.0.1
From: Kenneth Feng
Enable gfxoff on gc 12.0.1
Signed-off-by: Kenneth Feng
Reviewed-by: Jack Gui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 14 +-
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c | 1 +
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index 08f866c5ff432..d9e975a9825d4 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@ -3606,7 +3606,19 @@ static void gfx_v12_cntl_pg(struct amdgpu_device *adev,
bool enable)
static int gfx_v12_0_set_powergating_state(void *handle,
enum amd_powergating_state state)
{
- /* TODO */
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+ bool enable = (state == AMD_PG_STATE_GATE);
+
+ if (amdgpu_sriov_vf(adev))
+ return 0;
+
+ switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
+ case IP_VERSION(12, 0, 1):
+ amdgpu_gfx_off_ctrl(adev, enable);
+ break;
+ default:
+ break;
+ }
return 0;
}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c
b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c
index 68b9bf822e8d8..fe6834f1648b9 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c
@@ -758,6 +758,7 @@ int smu_v14_0_gfx_off_control(struct smu_context *smu, bool
enable)
case IP_VERSION(14, 0, 0):
case IP_VERSION(14, 0, 1):
case IP_VERSION(14, 0, 2):
+ case IP_VERSION(14, 0, 3):
if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))
return 0;
if (enable)
--
2.44.0
[PATCH 6/7] drm/amdgpu: support cg state get for gfx v12
From: Likun Gao
Support to get clockgating state for gfx v12.
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 38 +-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index 8d4b234bd287e..08f866c5ff432 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@ -3863,7 +3863,43 @@ static int gfx_v12_0_set_clockgating_state(void *handle,
static void gfx_v12_0_get_clockgating_state(void *handle, u64 *flags)
{
- /* TODO */
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+ int data;
+
+ /* AMD_CG_SUPPORT_GFX_MGCG */
+ data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);
+ if (!(data & RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK))
+ *flags |= AMD_CG_SUPPORT_GFX_MGCG;
+
+ /* AMD_CG_SUPPORT_REPEATER_FGCG */
+ if (!(data & RLC_CGTT_MGCG_OVERRIDE__GFXIP_REPEATER_FGCG_OVERRIDE_MASK))
+ *flags |= AMD_CG_SUPPORT_REPEATER_FGCG;
+
+ /* AMD_CG_SUPPORT_GFX_FGCG */
+ if (!(data & RLC_CGTT_MGCG_OVERRIDE__GFXIP_FGCG_OVERRIDE_MASK))
+ *flags |= AMD_CG_SUPPORT_GFX_FGCG;
+
+ /* AMD_CG_SUPPORT_GFX_PERF_CLK */
+ if (!(data & RLC_CGTT_MGCG_OVERRIDE__PERFMON_CLOCK_STATE_MASK))
+ *flags |= AMD_CG_SUPPORT_GFX_PERF_CLK;
+
+ /* AMD_CG_SUPPORT_GFX_CGCG */
+ data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL);
+ if (data & RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK)
+ *flags |= AMD_CG_SUPPORT_GFX_CGCG;
+
+ /* AMD_CG_SUPPORT_GFX_CGLS */
+ if (data & RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK)
+ *flags |= AMD_CG_SUPPORT_GFX_CGLS;
+
+ /* AMD_CG_SUPPORT_GFX_3D_CGCG */
+ data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D);
+ if (data & RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK)
+ *flags |= AMD_CG_SUPPORT_GFX_3D_CGCG;
+
+ /* AMD_CG_SUPPORT_GFX_3D_CGLS */
+ if (data & RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK)
+ *flags |= AMD_CG_SUPPORT_GFX_3D_CGLS;
}
static u64 gfx_v12_0_ring_get_rptr_gfx(struct amdgpu_ring *ring)
--
2.44.0
[PATCH 4/7] drm/amd/amdgpu: enable perfcounter mgcg and repeater fgcg
From: Kenneth Feng
enable perfcounter mgcg and repeater fgcg on gc 12.0.1
Signed-off-by: Kenneth Feng
Reviewed-by: Likun Gao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 32 --
drivers/gpu/drm/amd/amdgpu/soc24.c | 4 +++-
2 files changed, 33 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index f7c5b10c753dd..9aeced9d31616 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@ -3532,7 +3532,20 @@ static void gfx_v12_0_unset_safe_mode(struct
amdgpu_device *adev,
static void gfx_v12_0_update_perf_clk(struct amdgpu_device *adev,
bool enable)
{
- /* TODO */
+ uint32_t def, data;
+
+ if (!(adev->cg_flags & AMD_CG_SUPPORT_GFX_PERF_CLK))
+ return;
+
+ def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);
+
+ if (enable)
+ data &= ~RLC_CGTT_MGCG_OVERRIDE__PERFMON_CLOCK_STATE_MASK;
+ else
+ data |= RLC_CGTT_MGCG_OVERRIDE__PERFMON_CLOCK_STATE_MASK;
+
+ if (def != data)
+ WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);
}
static void gfx_v12_0_update_spm_vmid(struct amdgpu_device *adev,
@@ -3763,7 +3776,22 @@ static void
gfx_v12_0_update_medium_grain_clock_gating(struct amdgpu_device *ade
static void gfx_v12_0_update_repeater_fgcg(struct amdgpu_device *adev,
bool enable)
{
- /* TODO */
+ uint32_t def, data;
+
+ if (!(adev->cg_flags & AMD_CG_SUPPORT_REPEATER_FGCG))
+ return;
+
+ def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);
+
+ if (enable)
+ data &=
~(RLC_CGTT_MGCG_OVERRIDE__GFXIP_REPEATER_FGCG_OVERRIDE_MASK |
+
RLC_CGTT_MGCG_OVERRIDE__RLC_REPEATER_FGCG_OVERRIDE_MASK);
+ else
+ data |=
RLC_CGTT_MGCG_OVERRIDE__GFXIP_REPEATER_FGCG_OVERRIDE_MASK |
+
RLC_CGTT_MGCG_OVERRIDE__RLC_REPEATER_FGCG_OVERRIDE_MASK;
+
+ if (def != data)
+ WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);
}
static void gfx_v12_0_update_sram_fgcg(struct amdgpu_device *adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c
b/drivers/gpu/drm/amd/amdgpu/soc24.c
index 780e54b74979a..701056a865a4c 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc24.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc24.c
@@ -405,7 +405,9 @@ static int soc24_common_early_init(void *handle)
AMD_CG_SUPPORT_GFX_CGLS |
AMD_CG_SUPPORT_GFX_MGCG |
AMD_CG_SUPPORT_GFX_3D_CGCG |
- AMD_CG_SUPPORT_GFX_3D_CGLS;
+ AMD_CG_SUPPORT_GFX_3D_CGLS |
+ AMD_CG_SUPPORT_REPEATER_FGCG |
+ AMD_CG_SUPPORT_GFX_PERF_CLK;
adev->pg_flags = AMD_PG_SUPPORT_VCN |
AMD_PG_SUPPORT_JPEG |
AMD_PG_SUPPORT_VCN_DPG;
--
2.44.0
[PATCH 5/7] drm/amd/amdgpu: enable sram fgcg on gc 12.0.1
From: Kenneth Feng
enable sram fgcg on gc 12.0.1
Signed-off-by: Kenneth Feng
Reviewed-by: Likun Gao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 15 ++-
drivers/gpu/drm/amd/amdgpu/soc24.c | 1 +
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index 9aeced9d31616..8d4b234bd287e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@ -3797,7 +3797,20 @@ static void gfx_v12_0_update_repeater_fgcg(struct
amdgpu_device *adev,
static void gfx_v12_0_update_sram_fgcg(struct amdgpu_device *adev,
bool enable)
{
- /* TODO */
+ uint32_t def, data;
+
+ if (!(adev->cg_flags & AMD_CG_SUPPORT_GFX_FGCG))
+ return;
+
+ def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);
+
+ if (enable)
+ data &= ~RLC_CGTT_MGCG_OVERRIDE__GFXIP_FGCG_OVERRIDE_MASK;
+ else
+ data |= RLC_CGTT_MGCG_OVERRIDE__GFXIP_FGCG_OVERRIDE_MASK;
+
+ if (def != data)
+ WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);
}
static int gfx_v12_0_update_gfx_clock_gating(struct amdgpu_device *adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c
b/drivers/gpu/drm/amd/amdgpu/soc24.c
index 701056a865a4c..174126bc5f602 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc24.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc24.c
@@ -407,6 +407,7 @@ static int soc24_common_early_init(void *handle)
AMD_CG_SUPPORT_GFX_3D_CGCG |
AMD_CG_SUPPORT_GFX_3D_CGLS |
AMD_CG_SUPPORT_REPEATER_FGCG |
+ AMD_CG_SUPPORT_GFX_FGCG |
AMD_CG_SUPPORT_GFX_PERF_CLK;
adev->pg_flags = AMD_PG_SUPPORT_VCN |
AMD_PG_SUPPORT_JPEG |
--
2.44.0
[PATCH 3/7] drm/amd/amdgpu: enable 3D cgcg and 3D cgls
From: Kenneth Feng enable 3D cgcg and 3D cgls on gc 12.0.1 Signed-off-by: Kenneth Feng Reviewed-by: Likun Gao Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc24.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c b/drivers/gpu/drm/amd/amdgpu/soc24.c index 30e166004e39e..780e54b74979a 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc24.c +++ b/drivers/gpu/drm/amd/amdgpu/soc24.c @@ -403,7 +403,9 @@ static int soc24_common_early_init(void *handle) case IP_VERSION(12, 0, 1): adev->cg_flags = AMD_CG_SUPPORT_GFX_CGCG | AMD_CG_SUPPORT_GFX_CGLS | - AMD_CG_SUPPORT_GFX_MGCG; + AMD_CG_SUPPORT_GFX_MGCG | + AMD_CG_SUPPORT_GFX_3D_CGCG | + AMD_CG_SUPPORT_GFX_3D_CGLS; adev->pg_flags = AMD_PG_SUPPORT_VCN | AMD_PG_SUPPORT_JPEG | AMD_PG_SUPPORT_VCN_DPG; -- 2.44.0
[PATCH 2/7] drm/amd/amdgpu: enable mgcg on gfx 12.0.1
From: Kenneth Feng
enable mgcg on gfx 12.0.1
Signed-off-by: Kenneth Feng
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 30 +-
drivers/gpu/drm/amd/amdgpu/soc24.c | 6 ++
2 files changed, 31 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index 3e2a6806f1c19..f7c5b10c753dd 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@ -3729,7 +3729,35 @@ static void
gfx_v12_0_update_coarse_grain_clock_gating(struct amdgpu_device *ade
static void gfx_v12_0_update_medium_grain_clock_gating(struct amdgpu_device
*adev,
bool enable)
{
- /* TODO */
+ uint32_t data, def;
+ if (!(adev->cg_flags & (AMD_CG_SUPPORT_GFX_MGCG |
AMD_CG_SUPPORT_GFX_MGLS)))
+ return;
+
+ /* It is disabled by HW by default */
+ if (enable) {
+ if (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGCG) {
+ /* 1 - RLC_CGTT_MGCG_OVERRIDE */
+ def = data = RREG32_SOC15(GC, 0,
regRLC_CGTT_MGCG_OVERRIDE);
+
+ data &=
~(RLC_CGTT_MGCG_OVERRIDE__GRBM_CGTT_SCLK_OVERRIDE_MASK |
+
RLC_CGTT_MGCG_OVERRIDE__RLC_CGTT_SCLK_OVERRIDE_MASK |
+
RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK);
+
+ if (def != data)
+ WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE,
data);
+ }
+ } else {
+ if (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGCG) {
+ def = data = RREG32_SOC15(GC, 0,
regRLC_CGTT_MGCG_OVERRIDE);
+
+ data |=
(RLC_CGTT_MGCG_OVERRIDE__RLC_CGTT_SCLK_OVERRIDE_MASK |
+
RLC_CGTT_MGCG_OVERRIDE__GRBM_CGTT_SCLK_OVERRIDE_MASK |
+
RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK);
+
+ if (def != data)
+ WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE,
data);
+ }
+ }
}
static void gfx_v12_0_update_repeater_fgcg(struct amdgpu_device *adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c
b/drivers/gpu/drm/amd/amdgpu/soc24.c
index 143329ed2c9a1..30e166004e39e 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc24.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc24.c
@@ -402,14 +402,12 @@ static int soc24_common_early_init(void *handle)
break;
case IP_VERSION(12, 0, 1):
adev->cg_flags = AMD_CG_SUPPORT_GFX_CGCG |
- AMD_CG_SUPPORT_GFX_CGLS;
+ AMD_CG_SUPPORT_GFX_CGLS |
+ AMD_CG_SUPPORT_GFX_MGCG;
adev->pg_flags = AMD_PG_SUPPORT_VCN |
AMD_PG_SUPPORT_JPEG |
AMD_PG_SUPPORT_VCN_DPG;
adev->external_rev_id = adev->rev_id + 0x50;
- adev->cg_flags = AMD_CG_SUPPORT_GFX_CGCG |
- AMD_CG_SUPPORT_GFX_CGLS;
-
break;
default:
/* FIXME: not supported yet */
--
2.44.0
[PATCH 1/7] drm/amd/amdgpu: enable cgcg and cgls
From: Kenneth Feng enable cgcg and cgls on gc 12.0.1 Signed-off-by: Kenneth Feng Reviewed-by: Likun Gao Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc24.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c b/drivers/gpu/drm/amd/amdgpu/soc24.c index 0979dffe37424..143329ed2c9a1 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc24.c +++ b/drivers/gpu/drm/amd/amdgpu/soc24.c @@ -401,7 +401,8 @@ static int soc24_common_early_init(void *handle) adev->external_rev_id = adev->rev_id + 0x40; break; case IP_VERSION(12, 0, 1): - adev->cg_flags = 0; + adev->cg_flags = AMD_CG_SUPPORT_GFX_CGCG | + AMD_CG_SUPPORT_GFX_CGLS; adev->pg_flags = AMD_PG_SUPPORT_VCN | AMD_PG_SUPPORT_JPEG | AMD_PG_SUPPORT_VCN_DPG; -- 2.44.0
Re: [PATCH v1 03/12] drm/i915: Make I2C terminology more inclusive
On Tue, Apr 30, 2024 at 05:38:02PM +, Easwar Hariharan wrote:
> I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
> with more appropriate terms. Inspired by and following on to Wolfram's
> series to fix drivers/i2c/[1], fix the terminology for users of
> I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
> in the specification.
>
> Compile tested, no functionality changes intended
>
> [1]:
> https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/
>
> Signed-off-by: Easwar Hariharan
I'm glad to see this change!
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/dvo_ch7017.c | 14 -
> drivers/gpu/drm/i915/display/dvo_ch7xxx.c | 18 +--
> drivers/gpu/drm/i915/display/dvo_ivch.c | 16 +-
> drivers/gpu/drm/i915/display/dvo_ns2501.c | 18 +--
> drivers/gpu/drm/i915/display/dvo_sil164.c | 18 +--
> drivers/gpu/drm/i915/display/dvo_tfp410.c | 18 +--
> drivers/gpu/drm/i915/display/intel_bios.c | 22 +++---
> drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> .../gpu/drm/i915/display/intel_display_core.h | 2 +-
> drivers/gpu/drm/i915/display/intel_dsi.h | 2 +-
> drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 20 ++---
> drivers/gpu/drm/i915/display/intel_dvo.c | 14 -
> drivers/gpu/drm/i915/display/intel_dvo_dev.h | 2 +-
> drivers/gpu/drm/i915/display/intel_gmbus.c| 4 +--
> drivers/gpu/drm/i915/display/intel_sdvo.c | 30 +--
> drivers/gpu/drm/i915/display/intel_vbt_defs.h | 4 +--
> drivers/gpu/drm/i915/gvt/edid.c | 28 -
> drivers/gpu/drm/i915/gvt/edid.h | 4 +--
> drivers/gpu/drm/i915/gvt/opregion.c | 2 +-
> 19 files changed, 119 insertions(+), 119 deletions(-)
The chances of conflicts are high with this many changes,
but should be easy enough to deal with later, so feel free
to move with this i915 patch on any other tree and we catch-up
later.
Acked-by: Rodrigo Vivi
>
> diff --git a/drivers/gpu/drm/i915/display/dvo_ch7017.c
> b/drivers/gpu/drm/i915/display/dvo_ch7017.c
> index d0c3880d7f80..493e730c685b 100644
> --- a/drivers/gpu/drm/i915/display/dvo_ch7017.c
> +++ b/drivers/gpu/drm/i915/display/dvo_ch7017.c
> @@ -170,13 +170,13 @@ static bool ch7017_read(struct intel_dvo_device *dvo,
> u8 addr, u8 *val)
> {
> struct i2c_msg msgs[] = {
> {
> - .addr = dvo->slave_addr,
> + .addr = dvo->target_addr,
> .flags = 0,
> .len = 1,
> .buf = ,
> },
> {
> - .addr = dvo->slave_addr,
> + .addr = dvo->target_addr,
> .flags = I2C_M_RD,
> .len = 1,
> .buf = val,
> @@ -189,7 +189,7 @@ static bool ch7017_write(struct intel_dvo_device *dvo, u8
> addr, u8 val)
> {
> u8 buf[2] = { addr, val };
> struct i2c_msg msg = {
> - .addr = dvo->slave_addr,
> + .addr = dvo->target_addr,
> .flags = 0,
> .len = 2,
> .buf = buf,
> @@ -197,7 +197,7 @@ static bool ch7017_write(struct intel_dvo_device *dvo, u8
> addr, u8 val)
> return i2c_transfer(dvo->i2c_bus, , 1) == 1;
> }
>
> -/** Probes for a CH7017 on the given bus and slave address. */
> +/** Probes for a CH7017 on the given bus and target address. */
> static bool ch7017_init(struct intel_dvo_device *dvo,
> struct i2c_adapter *adapter)
> {
> @@ -227,13 +227,13 @@ static bool ch7017_init(struct intel_dvo_device *dvo,
> break;
> default:
> DRM_DEBUG_KMS("ch701x not detected, got %d: from %s "
> - "slave %d.\n",
> - val, adapter->name, dvo->slave_addr);
> + "target %d.\n",
> + val, adapter->name, dvo->target_addr);
> goto fail;
> }
>
> DRM_DEBUG_KMS("%s detected on %s, addr %d\n",
> - str, adapter->name, dvo->slave_addr);
> + str, adapter->name, dvo->target_addr);
> return true;
>
> fail:
> diff --git a/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
> b/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
> index 2e8e85da5a40..534b8544e0a4 100644
> --- a/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
> +++ b/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
> @@ -153,13 +153,13 @@ static bool ch7xxx_readb(struct intel_dvo_device *dvo,
> int addr, u8 *ch)
>
> struct i2c_msg msgs[] = {
> {
> - .addr = dvo->slave_addr,
> + .addr = dvo->target_addr,
> .flags = 0,
> .len = 1,
> .buf = out_buf,
> },
RE: [PATCH] Revert "drm/amdkfd: Add partition id field to location_id"
[Public] > -Original Message- > From: Lazar, Lijo > Sent: Tuesday, April 23, 2024 7:28 AM > To: amd-gfx@lists.freedesktop.org > Cc: Zhang, Hawking ; Deucher, Alexander > ; Joshi, Mukul ; > Kim, Jonathan ; Poag, Charis > ; Cheung, Donald ; Yat > Sin, David ; Chaudhary, Jatin Jaikishan > ; Du, Wenkai > Subject: [PATCH] Revert "drm/amdkfd: Add partition id field to location_id" > > This reverts commit 925c7bd1d1cf9f173b22603c8bd4816d142d4935. > > RCCL library is currently not treating spatial partitions differently, > hence this change is causing issues. Revert temporarily till RCCL > implementation is ready for spatial partitions. > > Signed-off-by: Lijo Lazar Reviewed-by: Jonathan Kim > --- > drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c > b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c > index c51f131eaa2f..bc9eb847ecfe 100644 > --- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c > @@ -1997,9 +1997,8 @@ int kfd_topology_add_device(struct kfd_node > *gpu) > HSA_CAP_ASIC_REVISION_MASK); > > dev->node_props.location_id = pci_dev_id(gpu->adev->pdev); > - /* On multi-partition nodes, node id = location_id[31:28] */ > - if (gpu->kfd->num_nodes > 1) > - dev->node_props.location_id |= (dev->gpu->node_id << 28); > + if (KFD_GC_VERSION(dev->gpu->kfd) == IP_VERSION(9, 4, 3)) > + dev->node_props.location_id |= dev->gpu->node_id; > > dev->node_props.domain = pci_domain_nr(gpu->adev->pdev->bus); > dev->node_props.max_engine_clk_fcompute = > -- > 2.25.1
[linux-next:master] BUILD REGRESSION d04466706db5e241ee026f17b5f920e50dee26b5
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master branch HEAD: d04466706db5e241ee026f17b5f920e50dee26b5 Add linux-next specific files for 20240430 Error/Warning reports: https://lore.kernel.org/oe-kbuild-all/202404301738.j71xgyar-...@intel.com Unverified Error/Warning (likely false positive, please contact us if interested): drivers/virt/acrn/mm.c:217 acrn_vm_ram_map() error: uninitialized symbol 'start_pfn'. drivers/virt/acrn/mm.c:224 acrn_vm_ram_map() error: uninitialized symbol 'ret'. net/ipv6/route.c:5712 rt6_fill_node() error: we previously assumed 'dst' could be null (see line 5697) Error/Warning ids grouped by kconfigs: gcc_recent_errors |-- alpha-allyesconfig | `-- drivers-usb-dwc3-core.c:warning:variable-hw_mode-set-but-not-used |-- arc-allmodconfig | `-- drivers-usb-dwc3-core.c:warning:variable-hw_mode-set-but-not-used |-- arc-allyesconfig | `-- drivers-usb-dwc3-core.c:warning:variable-hw_mode-set-but-not-used |-- arc-randconfig-r121-20240430 | |-- drivers-hwmon-pmbus-xdp710.c:sparse:sparse:symbol-micro_ohm_rsense-was-not-declared.-Should-it-be-static | |-- fs-bcachefs-btree_cache.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-struct-task_struct-got-unsigned-long | `-- fs-ext4-orphan.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-restricted-__le32-_prev_-got-unsigned-long |-- arc-randconfig-r122-20240430 | |-- block-blk-mq.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-struct-request | |-- block-blk-mq.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-struct-request | |-- block-blk-mq.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-struct-request-got-unsigned-long | |-- drivers-dma-buf-dma-fence-chain.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-struct-dma_fence-noderef-__rcu | |-- drivers-dma-buf-dma-fence-chain.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-struct-dma_fence-noderef-__rcu | |-- drivers-dma-buf-dma-fence-chain.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-struct-dma_fence-noderef-__rcu-got-unsigned-long | |-- drivers-nvme-target-fabrics-cmd.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-struct-nvmet_ctrl | |-- drivers-nvme-target-fabrics-cmd.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-struct-nvmet_ctrl | |-- drivers-nvme-target-fabrics-cmd.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-struct-nvmet_ctrl-got-unsigned-long | |-- fs-btrfs-raid56.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-struct-btrfs_stripe_hash_table | |-- fs-btrfs-raid56.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-struct-btrfs_stripe_hash_table | |-- fs-btrfs-raid56.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-struct-btrfs_stripe_hash_table-got-unsigned-long | |-- fs-crypto-hooks.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-char | |-- fs-crypto-hooks.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-char | |-- fs-crypto-hooks.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-char-got-unsigned-long | |-- fs-crypto-keysetup.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-struct-fscrypt_inode_info | |-- fs-crypto-keysetup.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-struct-fscrypt_inode_info | |-- fs-crypto-keysetup.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-struct-fscrypt_inode_info-got-unsigned-long | |-- fs-debugfs-file.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-void | |-- fs-debugfs-file.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-void | |-- fs-debugfs-file.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-void-got-unsigned-long | |-- fs-ext4-orphan.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-restricted-__le32-_n_ | |-- fs-ext4-orphan.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-restricted-__le32-_o_ | |-- fs-libfs.c:sparse:sparse:incorrect-type-in-argument
Re: [PATCH v2] drm/amdkfd: Let VRAM allocations go to GTT domain on small APUs
On 2024-04-30 6:08, Lang Yu wrote:
Small APUs(i.e., consumer, embedded products) usually have a small
carveout device memory which can't satisfy most compute workloads
memory allocation requirements.
We can't even run a Basic MNIST Example with a default 512MB carveout.
https://github.com/pytorch/examples/tree/main/mnist.
Error Log when running mnist:
"torch.cuda.OutOfMemoryError: HIP out of memory. Tried to allocate
84.00 MiB. GPU 0 has a total capacity of 512.00 MiB of which 0 bytes
is free. Of the allocated memory 103.83 MiB is allocated by PyTorch,
and 22.17 MiB is reserved by PyTorch but unallocated"
Though we can change BIOS settings to enlarge carveout size,
which is inflexible and may bring complaint. On the other hand,
the memory resource can't be effectively used between host and device.
The solution is MI300A approach, i.e., let VRAM allocations go to GTT.
Then device and host can effectively share system memory.
v2: Report local_mem_size_private as 0. (Felix)
Signed-off-by: Lang Yu
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c| 5 +
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 20 ++-
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 6 --
drivers/gpu/drm/amd/amdkfd/kfd_svm.h | 3 ++-
5 files changed, 23 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index 7ba05f030dd1..e3738d417245 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -455,6 +455,9 @@ void amdgpu_amdkfd_get_local_mem_info(struct amdgpu_device
*adev,
else
mem_info->local_mem_size_private =
KFD_XCP_MEMORY_SIZE(adev, xcp->id);
+ } else if (adev->flags & AMD_IS_APU) {
+ mem_info->local_mem_size_public = (ttm_tt_pages_limit() <<
PAGE_SHIFT);
+ mem_info->local_mem_size_private = 0;
} else {
mem_info->local_mem_size_public = adev->gmc.visible_vram_size;
mem_info->local_mem_size_private = adev->gmc.real_vram_size -
@@ -824,6 +827,8 @@ u64 amdgpu_amdkfd_xcp_memory_size(struct amdgpu_device
*adev, int xcp_id)
}
do_div(tmp, adev->xcp_mgr->num_xcp_per_mem_partition);
return ALIGN_DOWN(tmp, PAGE_SIZE);
+ } else if (adev->flags & AMD_IS_APU) {
+ return (ttm_tt_pages_limit() << PAGE_SHIFT);
} else {
return adev->gmc.real_vram_size;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index 4bdf59213384..5843c3d35cb9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -196,7 +196,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device
*adev,
return -EINVAL;
vram_size = KFD_XCP_MEMORY_SIZE(adev, xcp_id);
- if (adev->gmc.is_app_apu) {
+ if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
system_mem_needed = size;
ttm_mem_needed = size;
}
@@ -232,7 +232,8 @@ int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device
*adev,
"adev reference can't be null when vram is used");
if (adev && xcp_id >= 0) {
adev->kfd.vram_used[xcp_id] += vram_needed;
- adev->kfd.vram_used_aligned[xcp_id] += adev->gmc.is_app_apu ?
+ adev->kfd.vram_used_aligned[xcp_id] +=
+ (adev->gmc.is_app_apu || adev->flags &
AMD_IS_APU) ?
vram_needed :
ALIGN(vram_needed, VRAM_AVAILABLITY_ALIGN);
}
@@ -260,7 +261,7 @@ void amdgpu_amdkfd_unreserve_mem_limit(struct amdgpu_device
*adev,
if (adev) {
adev->kfd.vram_used[xcp_id] -= size;
- if (adev->gmc.is_app_apu) {
+ if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
adev->kfd.vram_used_aligned[xcp_id] -= size;
kfd_mem_limit.system_mem_used -= size;
kfd_mem_limit.ttm_mem_used -= size;
@@ -889,7 +890,7 @@ static int kfd_mem_attach(struct amdgpu_device *adev,
struct kgd_mem *mem,
* if peer device has large BAR. In contrast, access over xGMI is
* allowed for both small and large BAR configurations of peer device
*/
- if ((adev != bo_adev && !adev->gmc.is_app_apu) &&
+ if ((adev != bo_adev && !(adev->gmc.is_app_apu || adev->flags & AMD_IS_APU))
&&
((mem->domain == AMDGPU_GEM_DOMAIN_VRAM) ||
(mem->alloc_flags &
Re: [PATCH v3 1/4] drm/amdgpu: Fix two reset triggered in a row
On 4/26/2024 9:27 AM, Yunxiang Li wrote:
> Some times a hang GPU causes multiple reset sources to schedule resets.
> The second source will be able to trigger an unnecessary reset if they
> schedule after we call amdgpu_device_stop_pending_resets.
>
> Move amdgpu_device_stop_pending_resets to after the reset is done. Since
> at this point the GPU is supposedly in a good state, any reset scheduled
> after this point would be a legitimate reset.
>
> Remove unnecessary and incorrect checks for amdgpu_in_reset that was
> kinda serving this purpose.
>
> Signed-off-by: Yunxiang Li
Reviewed-by: Lijo Lazar
Thanks,
Lijo
> ---
> v2: instead of adding amdgpu_in_reset check, move when we cancel pending
> resets
> v3: no changes from v2, collect all the patches in one series for easier
> review
>
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 19 ++-
> drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c | 2 +-
> 5 files changed, 14 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 861ccff78af9..8befd10bf007 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -5070,8 +5070,6 @@ static int amdgpu_device_reset_sriov(struct
> amdgpu_device *adev,
> retry:
> amdgpu_amdkfd_pre_reset(adev);
>
> - amdgpu_device_stop_pending_resets(adev);
> -
> if (from_hypervisor)
> r = amdgpu_virt_request_full_gpu(adev, true);
> else
> @@ -5823,13 +5821,6 @@ int amdgpu_device_gpu_recover(struct amdgpu_device
> *adev,
> r, adev_to_drm(tmp_adev)->unique);
> tmp_adev->asic_reset_res = r;
> }
> -
> - if (!amdgpu_sriov_vf(tmp_adev))
> - /*
> - * Drop all pending non scheduler resets. Scheduler
> resets
> - * were already dropped during drm_sched_stop
> - */
> - amdgpu_device_stop_pending_resets(tmp_adev);
> }
>
> /* Actual ASIC resets if needed.*/
> @@ -5851,6 +5842,16 @@ int amdgpu_device_gpu_recover(struct amdgpu_device
> *adev,
> goto retry;
> }
>
> + list_for_each_entry(tmp_adev, device_list_handle, reset_list) {
> + /*
> + * Drop any pending non scheduler resets queued before reset is
> done.
> + * Any reset scheduled after this point would be valid.
> Scheduler resets
> + * were already dropped during drm_sched_stop and no new ones
> can come
> + * in before drm_sched_start.
> + */
> + amdgpu_device_stop_pending_resets(tmp_adev);
> + }
> +
> skip_hw_reset:
>
> /* Post ASIC reset for all devs .*/
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> index 54ab51a4ada7..c2385178d6b3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> @@ -597,7 +597,7 @@ static void amdgpu_virt_update_vf2pf_work_item(struct
> work_struct *work)
> if (ret) {
> adev->virt.vf2pf_update_retry_cnt++;
> if ((adev->virt.vf2pf_update_retry_cnt >=
> AMDGPU_VF2PF_UPDATE_MAX_RETRY_LIMIT) &&
> - amdgpu_sriov_runtime(adev) && !amdgpu_in_reset(adev)) {
> + amdgpu_sriov_runtime(adev)) {
> amdgpu_ras_set_fed(adev, true);
> if (amdgpu_reset_domain_schedule(adev->reset_domain,
> >virt.flr_work))
> diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
> b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
> index 0c7275bca8f7..c5ba9c4757a8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
> @@ -319,7 +319,7 @@ static int xgpu_ai_mailbox_rcv_irq(struct amdgpu_device
> *adev,
>
> switch (event) {
> case IDH_FLR_NOTIFICATION:
> - if (amdgpu_sriov_runtime(adev) && !amdgpu_in_reset(adev))
> + if (amdgpu_sriov_runtime(adev))
>
> WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain,
>
> >virt.flr_work),
> "Failed to queue work! at %s",
> diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
> b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
> index aba00d961627..fa9d1b02f391 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
> @@ -358,7 +358,7 @@ static int xgpu_nv_mailbox_rcv_irq(struct amdgpu_device
> *adev,
>
> switch (event) {
> case IDH_FLR_NOTIFICATION:
RE: [PATCH v3 1/4] drm/amdgpu: Fix two reset triggered in a row
[Public] Hi Christ, I got R-b from the SRIOV team for the rest of the patches, can you help review this last one? I think the concerns from the previous thread are all addressed https://patchwork.freedesktop.org/patch/590678/?series=132727 Regards, Teddy
[PATCH] drm/amdgpu/vcn5: Add VCN5 capabilities
From: "David (Ming Qiang) Wu"
Add VCN5 encode and decode capabilities support
Signed-off-by: David (Ming Qiang) Wu
Reviewed-by: Leo Liu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc24.c | 43 ++
1 file changed, 43 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c
b/drivers/gpu/drm/amd/amdgpu/soc24.c
index e7929be1a6ff7..0979dffe37424 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc24.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc24.c
@@ -47,6 +47,48 @@
static const struct amd_ip_funcs soc24_common_ip_funcs;
+static const struct amdgpu_video_codec_info
vcn_5_0_0_video_codecs_encode_array_vcn0[] = {
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 3840,
2160, 0)},
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 7680, 4320,
0)},
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 7680, 4320, 0)},
+};
+
+static const struct amdgpu_video_codecs vcn_5_0_0_video_codecs_encode_vcn0 = {
+ .codec_count = ARRAY_SIZE(vcn_5_0_0_video_codecs_encode_array_vcn0),
+ .codec_array = vcn_5_0_0_video_codecs_encode_array_vcn0,
+};
+
+static const struct amdgpu_video_codec_info
vcn_5_0_0_video_codecs_decode_array_vcn0[] = {
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096,
2160, 52)},
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4320,
183)},
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 4096, 4096,
0)},
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)},
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 8192, 4352, 0)},
+};
+
+static const struct amdgpu_video_codecs vcn_5_0_0_video_codecs_decode_vcn0 = {
+ .codec_count = ARRAY_SIZE(vcn_5_0_0_video_codecs_decode_array_vcn0),
+ .codec_array = vcn_5_0_0_video_codecs_decode_array_vcn0,
+};
+
+static int soc24_query_video_codecs(struct amdgpu_device *adev, bool encode,
+const struct amdgpu_video_codecs **codecs)
+{
+ if (adev->vcn.num_vcn_inst == hweight8(adev->vcn.harvest_config))
+ return -EINVAL;
+
+ switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) {
+ case IP_VERSION(5, 0, 0):
+ if (encode)
+ *codecs = _5_0_0_video_codecs_encode_vcn0;
+ else
+ *codecs = _5_0_0_video_codecs_decode_vcn0;
+ return 0;
+ default:
+ return -EINVAL;
+ }
+}
+
static u32 soc24_get_config_memsize(struct amdgpu_device *adev)
{
return adev->nbio.funcs->get_memsize(adev);
@@ -323,6 +365,7 @@ static const struct amdgpu_asic_funcs soc24_asic_funcs = {
.get_pcie_replay_count = _get_pcie_replay_count,
.supports_baco = _dpm_is_baco_supported,
.pre_asic_init = _pre_asic_init,
+ .query_video_codecs = _query_video_codecs,
.update_umd_stable_pstate = _update_umd_stable_pstate,
};
--
2.44.0
[PATCH 2/3] drm/amdgpu/jpeg5: enable power gating
From: Sonny Jiang Enable PG on JPEG5 Signed-off-by: Sonny Jiang Reviewed-by: Leo Liu Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc24.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c b/drivers/gpu/drm/amd/amdgpu/soc24.c index c8cb255b6cf68..9c14f81c88a7f 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc24.c +++ b/drivers/gpu/drm/amd/amdgpu/soc24.c @@ -359,7 +359,8 @@ static int soc24_common_early_init(void *handle) break; case IP_VERSION(12, 0, 1): adev->cg_flags = 0; - adev->pg_flags = AMD_PG_SUPPORT_VCN; + adev->pg_flags = AMD_PG_SUPPORT_VCN | + AMD_PG_SUPPORT_JPEG; adev->external_rev_id = adev->rev_id + 0x50; adev->cg_flags = AMD_CG_SUPPORT_GFX_CGCG | AMD_CG_SUPPORT_GFX_CGLS; -- 2.44.0
[PATCH 3/3] drm/amdgpu/vcn5: enable DPG mode support
From: Sonny Jiang Enable DPG mode Signed-off-by: Sonny Jiang Reviewed-by: Leo Liu Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc24.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c b/drivers/gpu/drm/amd/amdgpu/soc24.c index 9c14f81c88a7f..e7929be1a6ff7 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc24.c +++ b/drivers/gpu/drm/amd/amdgpu/soc24.c @@ -360,7 +360,8 @@ static int soc24_common_early_init(void *handle) case IP_VERSION(12, 0, 1): adev->cg_flags = 0; adev->pg_flags = AMD_PG_SUPPORT_VCN | - AMD_PG_SUPPORT_JPEG; + AMD_PG_SUPPORT_JPEG | + AMD_PG_SUPPORT_VCN_DPG; adev->external_rev_id = adev->rev_id + 0x50; adev->cg_flags = AMD_CG_SUPPORT_GFX_CGCG | AMD_CG_SUPPORT_GFX_CGLS; -- 2.44.0
[PATCH 1/3] amdgpu/vcn: enable AMD_PG_SUPPORT_VCN
From: "David (Ming Qiang) Wu" turn on AMD_PG_SUPPORT_VCN flag for power saving Signed-off-by: David (Ming Qiang) Wu Reviewed-by: Sonny Jiang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc24.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c b/drivers/gpu/drm/amd/amdgpu/soc24.c index 6b438f0cc86e7..c8cb255b6cf68 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc24.c +++ b/drivers/gpu/drm/amd/amdgpu/soc24.c @@ -359,7 +359,7 @@ static int soc24_common_early_init(void *handle) break; case IP_VERSION(12, 0, 1): adev->cg_flags = 0; - adev->pg_flags = 0; + adev->pg_flags = AMD_PG_SUPPORT_VCN; adev->external_rev_id = adev->rev_id + 0x50; adev->cg_flags = AMD_CG_SUPPORT_GFX_CGCG | AMD_CG_SUPPORT_GFX_CGLS; -- 2.44.0
[PATCH] drm/amdgpu: Fix physical address mask
From: David Belanger
Mask should be 44-bit.
Signed-off-by: David Belanger
Reviewed-by: Harish Kasiviswanathan
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
index 3e6676fdc1875..2b7b67916c1dd 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
@@ -763,7 +763,7 @@ static int gmc_v12_0_sw_init(void *handle)
*/
adev->gmc.mc_mask = 0xULL; /* 48 bit MC */
- r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(48));
+ r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(44));
if (r) {
printk(KERN_WARNING "amdgpu: No suitable DMA available.\n");
return r;
--
2.44.0
Re: [PATCH v2] drm/amd/display: re-indent dc_power_down_on_boot()
On 2024-04-25 07:21, Dan Carpenter wrote:
> These lines are indented too far. Clean the whitespace.
>
Thanks.
Reviewed-by: Harry Wentland
In the process of merging it into amd-staging-drm-next.
Harry
> Signed-off-by: Dan Carpenter
> ---
> v2: Delete another blank line (checkpatch.pl --strict).
>
> drivers/gpu/drm/amd/display/dc/core/dc.c | 8 +++-
> 1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
> b/drivers/gpu/drm/amd/display/dc/core/dc.c
> index 3e16041bf4f9..5a0835f884a8 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
> @@ -5192,11 +5192,9 @@ void dc_interrupt_ack(struct dc *dc, enum
> dc_irq_source src)
> void dc_power_down_on_boot(struct dc *dc)
> {
> if (dc->ctx->dce_environment != DCE_ENV_VIRTUAL_HW &&
> - dc->hwss.power_down_on_boot) {
> -
> - if (dc->caps.ips_support)
> - dc_exit_ips_for_hw_access(dc);
> -
> + dc->hwss.power_down_on_boot) {
> + if (dc->caps.ips_support)
> + dc_exit_ips_for_hw_access(dc);
> dc->hwss.power_down_on_boot(dc);
> }
> }
Re: [PATCH][next] drm/amd/display: Fix spelling various spelling mistakes
On 2024-04-24 12:28, Colin Ian King wrote:
> There are various spelling mistakes in dml2_printf messages, fix them.
>
Thanks.
Reviewed-by: Harry Wentland
In the process of merging it into amd-staging-drm-next.
Harry
> Signed-off-by: Colin Ian King
> ---
> .../dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c | 6 +++---
> .../display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c | 6 +++---
> 2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git
> a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
>
> b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
> index 846b0ae48596..2dea5965d02f 100644
> ---
> a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
> +++
> b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
> @@ -5566,7 +5566,7 @@ static bool CalculatePrefetchSchedule(struct
> dml2_core_internal_scratch *scratch
> dml2_printf("DML: Tvm: %fus - time to fetch vm\n",
> s->TimeForFetchingVM);
> dml2_printf("DML: Tr0: %fus - time to fetch first row of data
> pagetables\n", s->TimeForFetchingRowInVBlank);
> dml2_printf("DML: Tsw: %fus = time to fetch enough pixel data
> and cursor data to feed the scalers init position and detile\n",
> (double)s->LinesToRequestPrefetchPixelData * s->LineTime);
> - dml2_printf("DML: To: %fus - time for propogation from scaler
> to optc\n", (*p->DSTYAfterScaler + ((double)(*p->DSTXAfterScaler) /
> (double)p->myPipe->HTotal)) * s->LineTime);
> + dml2_printf("DML: To: %fus - time for propagation from scaler
> to optc\n", (*p->DSTYAfterScaler + ((double)(*p->DSTXAfterScaler) /
> (double)p->myPipe->HTotal)) * s->LineTime);
> dml2_printf("DML: Tvstartup - TSetup - Tcalc - TWait - Tpre -
> To > 0\n");
> dml2_printf("DML: Tslack(pre): %fus - time left over in
> schedule\n", p->VStartup * s->LineTime - s->TimeForFetchingVM - 2 *
> s->TimeForFetchingRowInVBlank - (*p->DSTYAfterScaler +
> ((double)(*p->DSTXAfterScaler) / (double)p->myPipe->HTotal)) * s->LineTime -
> p->TWait - p->TCalc - *p->TSetup);
> dml2_printf("DML: row_bytes = dpte_row_bytes (per_pipe) =
> PixelPTEBytesPerRow = : %u\n", p->PixelPTEBytesPerRow);
> @@ -7825,7 +7825,7 @@ static bool dml_core_mode_support(struct
> dml2_core_calcs_mode_support_ex *in_out
> dml2_printf("DML::%s: mode_lib->ms.FabricClock = %f\n", __func__,
> mode_lib->ms.FabricClock);
> dml2_printf("DML::%s: mode_lib->ms.uclk_freq_mhz = %f\n", __func__,
> mode_lib->ms.uclk_freq_mhz);
> dml2_printf("DML::%s: max_urgent_latency_us = %f\n", __func__,
> mode_lib->ms.support.max_urgent_latency_us);
> - dml2_printf("DML::%s: urgent latency tolarance = %f\n", __func__,
> ((mode_lib->ip.rob_buffer_size_kbytes - mode_lib->ip.pixel_chunk_size_kbytes)
> * 1024 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes)));
> + dml2_printf("DML::%s: urgent latency tolerance = %f\n", __func__,
> ((mode_lib->ip.rob_buffer_size_kbytes - mode_lib->ip.pixel_chunk_size_kbytes)
> * 1024 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes)));
> dml2_printf("DML::%s: ROBSupport = %u\n", __func__,
> mode_lib->ms.support.ROBSupport);
> #endif
>
> @@ -10603,7 +10603,7 @@ static bool dml_core_mode_programming(struct
> dml2_core_calcs_mode_programming_ex
> if
> (display_cfg->plane_descriptors[k].immediate_flip &&
> mode_lib->mp.ImmediateFlipSupportedForPipe[k] == false) {
> mode_lib->mp.ImmediateFlipSupported =
> false;
> #ifdef __DML_VBA_DEBUG__
> - dml2_printf("DML::%s: Pipe %0d not
> supporing iflip!\n", __func__, k);
> + dml2_printf("DML::%s: Pipe %0d not
> supporting iflip!\n", __func__, k);
> #endif
> }
> }
> diff --git
> a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c
> b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c
> index 0ef77a89d984..d1d4fe062d4e 100644
> ---
> a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c
> +++
> b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c
> @@ -2023,7 +2023,7 @@ bool dml2_core_shared_mode_support(struct
> dml2_core_calcs_mode_support_ex *in_ou
> dml2_printf("DML::%s: mode_lib->ms.FabricClock = %f\n", __func__,
> mode_lib->ms.FabricClock);
> dml2_printf("DML::%s: mode_lib->ms.uclk_freq_mhz = %f\n", __func__,
> mode_lib->ms.uclk_freq_mhz);
> dml2_printf("DML::%s: max_urgent_latency_us = %f\n", __func__,
> mode_lib->ms.support.max_urgent_latency_us);
> - dml2_printf("DML::%s: urgent latency tolarance = %f\n", __func__,
> ((mode_lib->ip.rob_buffer_size_kbytes -
Re: [PATCH] drm/amd/display: Avoid -Wenum-float-conversion in add_margin_and_round_to_dfs_grainularity()
On 2024-04-24 12:14, Nathan Chancellor wrote:
> When building with clang 19 or newer (which strengthened some of the
> enum conversion warnings for C), there is a warning (or error with
> CONFIG_WERROR=y) around doing arithmetic with an enumerated type and a
> floating point expression.
>
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c:181:58:
> error: arithmetic between enumeration type 'enum dentist_divider_range' and
> floating-point type 'double' [-Werror,-Wenum-float-conversion]
> 181 | divider = (unsigned int)(DFS_DIVIDER_RANGE_SCALE_FACTOR *
> (vco_freq_khz / clock_khz));
> | ~~ ^
> ~~
> 1 error generated.
>
> This conversion is expected due to the nature of the enumerated value
> and definition, so silence the warning by casting the enumeration to an
> integer explicitly to make it clear to the compiler.
>
> Fixes: 3df48ddedee4 ("drm/amd/display: Add new DCN401 sources")
Thanks.
Reviewed-by: Harry Wentland
In the process of merging it into amd-staging-drm-next.
Harry
> Signed-off-by: Nathan Chancellor
> ---
> Alternatively, perhaps the potential truncation could happen before the
> multiplication?
>
> divider = DFS_DIVIDER_RANGE_SCALE_FACTOR * (unsigned int)(vco_freq_khz /
> clock_khz);
>
> I suspect the result of the division is probably not very large
> (certainly not within UINT_MAX / 4), so I would not expect the
> multiplication to overflow, but I was not sure so I decided to take the
> safer, NFC change. I am happy to respin as necessary.
> ---
> .../gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c| 2
> +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
> a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c
> b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c
> index e6698ee65843..65eb0187e965 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c
> @@ -178,7 +178,7 @@ static bool
> add_margin_and_round_to_dfs_grainularity(double clock_khz, double ma
>
> clock_khz *= 1.0 + margin;
>
> - divider = (unsigned int)(DFS_DIVIDER_RANGE_SCALE_FACTOR * (vco_freq_khz
> / clock_khz));
> + divider = (unsigned int)((int)DFS_DIVIDER_RANGE_SCALE_FACTOR *
> (vco_freq_khz / clock_khz));
>
> /* we want to floor here to get higher clock than required rather than
> lower */
> if (divider < DFS_DIVIDER_RANGE_2_START) {
>
> ---
> base-commit: d60dc4dd72412d5d9566fdf391e4202b05f88912
> change-id: 20240424-amdgpu-display-dcn401-enum-float-conversion-c09cc1826ea2
>
> Best regards,
Re: [RFC 0/5] Add capacity key to fdinfo
On Tue, Apr 30, 2024 at 1:27 PM Tvrtko Ursulin wrote: > > From: Tvrtko Ursulin > > I have noticed AMD GPUs can have more than one "engine" (ring?) of the same > type > but amdgpu is not reporting that in fdinfo using the capacity engine tag. > > This series is therefore an attempt to improve that, but only an RFC since it > is > quite likely I got stuff wrong on the first attempt. Or if not wrong it may > not > be very beneficial in AMDs case. > > So I tried to figure out how to count and store the number of instances of an > "engine" type and spotted that could perhaps be used in more than one place in > the driver. I was more than a little bit confused by the ip_instance and uapi > rings, then how rings are selected to context entities internally. Anyway.. > hopefully it is a simple enough series to easily spot any such large misses. > > End result should be that, assuming two "engine" instances, one fully loaded > and > one idle will only report client using 50% of that engine type. That would only be true if there are multiple instantiations of the IP on the chip which in most cases is not true. In most cases there is one instance of the IP that can be fed from multiple rings. E.g. for graphics and compute, all of the rings ultimately feed into the same compute units on the chip. So if you have a gfx ring and a compute rings, you can schedule work to them asynchronously, but ultimately whether they execute serially or in parallel depends on the actual shader code in the command buffers and the extent to which it can utilize the available compute units in the shader cores. As for the UAPI portion of this, we generally expose a limited number of rings to user space and then we use the GPU scheduler to load balance between all of the available rings of a type to try and extract as much parallelism as we can. Alex > > Tvrtko Ursulin (5): > drm/amdgpu: Cache number of rings per hw ip type > drm/amdgpu: Use cached number of rings from the AMDGPU_INFO_HW_IP_INFO > ioctl > drm/amdgpu: Skip not present rings in amdgpu_ctx_mgr_usage > drm/amdgpu: Show engine capacity in fdinfo > drm/amdgpu: Only show VRAM in fdinfo if it exists > > drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c| 3 ++ > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 14 + > drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 39 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 62 +++--- > 5 files changed, 49 insertions(+), 70 deletions(-) > > -- > 2.44.0
RE: [PATCH 4/4] drm/amdgpu: Move ras resume into SRIOV function
[AMD Official Use Only - General]
Reviewed-by: Zhigang Luo
-Original Message-
From: amd-gfx On Behalf Of Yunxiang Li
Sent: Thursday, April 25, 2024 11:58 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Lazar, Lijo ; Kuehling, Felix
; Deng, Emily ; Li, Yunxiang
(Teddy)
Subject: [PATCH 4/4] drm/amdgpu: Move ras resume into SRIOV function
This is part of the reset, move it into the reset function.
Signed-off-by: Yunxiang Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 3c4755f3c116..8f2c1f71ed9a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -5119,6 +5119,11 @@ static int amdgpu_device_reset_sriov(struct
amdgpu_device *adev,
amdgpu_amdkfd_post_reset(adev);
amdgpu_virt_release_full_gpu(adev, true);
+ /* Aldebaran and gfx_11_0_3 support ras in SRIOV, so need resume ras
during reset */
+ if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 2) ||
+ amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) ||
+ amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(11, 0, 3))
+ amdgpu_ras_resume(adev);
return 0;
}
@@ -5823,13 +5828,6 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
goto retry;
if (r)
adev->asic_reset_res = r;
-
- /* Aldebaran and gfx_11_0_3 support ras in SRIOV, so need
resume ras during reset */
- if (amdgpu_ip_version(adev, GC_HWIP, 0) ==
- IP_VERSION(9, 4, 2) ||
- amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3)
||
- amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(11, 0, 3))
- amdgpu_ras_resume(adev);
} else {
r = amdgpu_do_asic_reset(device_list_handle, reset_context);
if (r && r == -EAGAIN)
--
2.34.1
RE: [PATCH v4 2/4] drm/amdgpu: Add reset_context flag for host FLR
[AMD Official Use Only - General]
Reviewed-by: Zhigang Luo
-Original Message-
From: amd-gfx On Behalf Of Yunxiang Li
Sent: Friday, April 26, 2024 2:27 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Lazar, Lijo ; Kuehling, Felix
; Deng, Emily ; Li, Yunxiang
(Teddy)
Subject: [PATCH v4 2/4] drm/amdgpu: Add reset_context flag for host FLR
There are other reset sources that pass NULL as the job pointer, such as
amdgpu_amdkfd_reset_work. Therefore, using the job pointer to check if the FLR
comes from the host does not work.
Add a flag in reset_context to explicitly mark host triggered reset, and set
this flag when we receive host reset notification.
Signed-off-by: Yunxiang Li
---
v2: fix typo
v3: pass reset_context directly
v4: clear the flag in case we retry
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 13 -
drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h | 1 +
drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 1 +
drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c | 1 +
drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c | 1 +
5 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 8befd10bf007..33c889c027a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -5055,13 +5055,13 @@ static int amdgpu_device_recover_vram(struct
amdgpu_device *adev)
* amdgpu_device_reset_sriov - reset ASIC for SR-IOV vf
*
* @adev: amdgpu_device pointer
- * @from_hypervisor: request from hypervisor
+ * @reset_context: amdgpu reset context pointer
*
* do VF FLR and reinitialize Asic
* return 0 means succeeded otherwise failed
*/
static int amdgpu_device_reset_sriov(struct amdgpu_device *adev,
-bool from_hypervisor)
+struct amdgpu_reset_context *reset_context)
{
int r;
struct amdgpu_hive_info *hive = NULL;
@@ -5070,12 +5070,15 @@ static int amdgpu_device_reset_sriov(struct
amdgpu_device *adev,
retry:
amdgpu_amdkfd_pre_reset(adev);
- if (from_hypervisor)
+ if (test_bit(AMDGPU_HOST_FLR, _context->flags)) {
+ clear_bit(AMDGPU_HOST_FLR, _context->flags);
r = amdgpu_virt_request_full_gpu(adev, true);
- else
+ } else {
r = amdgpu_virt_reset_gpu(adev);
+ }
if (r)
return r;
+
amdgpu_ras_set_fed(adev, false);
amdgpu_irq_gpu_reset_resume_helper(adev);
@@ -5826,7 +5829,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
/* Actual ASIC resets if needed.*/
/* Host driver will handle XGMI hive reset for SRIOV */
if (amdgpu_sriov_vf(adev)) {
- r = amdgpu_device_reset_sriov(adev, job ? false : true);
+ r = amdgpu_device_reset_sriov(adev, reset_context);
if (r)
adev->asic_reset_res = r;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h
index b11d190ece53..5a9cc043b858 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h
@@ -33,6 +33,7 @@ enum AMDGPU_RESET_FLAGS {
AMDGPU_NEED_FULL_RESET = 0,
AMDGPU_SKIP_HW_RESET = 1,
AMDGPU_SKIP_COREDUMP = 2,
+ AMDGPU_HOST_FLR = 3,
};
struct amdgpu_reset_context {
diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
index c5ba9c4757a8..f4c47492e0cd 100644
--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
@@ -292,6 +292,7 @@ static void xgpu_ai_mailbox_flr_work(struct work_struct
*work)
reset_context.method = AMD_RESET_METHOD_NONE;
reset_context.reset_req_dev = adev;
clear_bit(AMDGPU_NEED_FULL_RESET, _context.flags);
+ set_bit(AMDGPU_HOST_FLR, _context.flags);
amdgpu_device_gpu_recover(adev, NULL, _context);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
index fa9d1b02f391..14cc7910e5cf 100644
--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
@@ -328,6 +328,7 @@ static void xgpu_nv_mailbox_flr_work(struct work_struct
*work)
reset_context.method = AMD_RESET_METHOD_NONE;
reset_context.reset_req_dev = adev;
clear_bit(AMDGPU_NEED_FULL_RESET, _context.flags);
+ set_bit(AMDGPU_HOST_FLR, _context.flags);
amdgpu_device_gpu_recover(adev, NULL, _context);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c
b/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c
index 14a065516ae4..78cd07744ebe 100644
--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c
@@ -529,6 +529,7 @@ static void
RE: [PATCH v2 3/4] drm/amdgpu: Fix amdgpu_device_reset_sriov retry logic
[AMD Official Use Only - General]
Reviewed-by: Zhigang Luo
-Original Message-
From: amd-gfx On Behalf Of Yunxiang Li
Sent: Friday, April 26, 2024 2:29 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Lazar, Lijo ; Kuehling, Felix
; Deng, Emily ; Li, Yunxiang
(Teddy)
Subject: [PATCH v2 3/4] drm/amdgpu: Fix amdgpu_device_reset_sriov retry logic
The retry loop for SRIOV reset have refcount and memory leak issue.
Depending on which function call fails it can potentially call
amdgpu_amdkfd_pre/post_reset different number of times and causes kfd_locked
count to be wrong. This will block all future attempts at opening /dev/kfd. The
retry loop also leakes resources by calling amdgpu_virt_init_data_exchange
multiple times without calling the corresponding fini function.
Align with the bare-metal reset path which doesn't have these issues.
This means taking the amdgpu_amdkfd_pre/post_reset functions out of the reset
loop and calling amdgpu_device_pre_asic_reset each retry which properly free
the resources from previous try by calling amdgpu_virt_fini_data_exchange.
Signed-off-by: Yunxiang Li
---
v2: put back release full access and the missed return
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 47 ++
1 file changed, 22 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 33c889c027a5..b23645f23a2e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -5065,10 +5065,6 @@ static int amdgpu_device_reset_sriov(struct
amdgpu_device *adev, {
int r;
struct amdgpu_hive_info *hive = NULL;
- int retry_limit = 0;
-
-retry:
- amdgpu_amdkfd_pre_reset(adev);
if (test_bit(AMDGPU_HOST_FLR, _context->flags)) {
clear_bit(AMDGPU_HOST_FLR, _context->flags); @@ -5088,7
+5084,7 @@ static int amdgpu_device_reset_sriov(struct amdgpu_device *adev,
/* Resume IP prior to SMC */
r = amdgpu_device_ip_reinit_early_sriov(adev);
if (r)
- goto error;
+ return r;
amdgpu_virt_init_data_exchange(adev);
@@ -5099,38 +5095,35 @@ static int amdgpu_device_reset_sriov(struct
amdgpu_device *adev,
/* now we are okay to resume SMC/CP/SDMA */
r = amdgpu_device_ip_reinit_late_sriov(adev);
if (r)
- goto error;
+ return r;
hive = amdgpu_get_xgmi_hive(adev);
/* Update PSP FW topology after reset */
if (hive && adev->gmc.xgmi.num_physical_nodes > 1)
r = amdgpu_xgmi_update_topology(hive, adev);
-
if (hive)
amdgpu_put_xgmi_hive(hive);
+ if (r)
+ return r;
- if (!r) {
- r = amdgpu_ib_ring_tests(adev);
-
- amdgpu_amdkfd_post_reset(adev);
- }
+ r = amdgpu_ib_ring_tests(adev);
+ if (r)
+ return r;
-error:
- if (!r && adev->virt.gim_feature & AMDGIM_FEATURE_GIM_FLR_VRAMLOST) {
+ if (adev->virt.gim_feature & AMDGIM_FEATURE_GIM_FLR_VRAMLOST) {
amdgpu_inc_vram_lost(adev);
r = amdgpu_device_recover_vram(adev);
}
- amdgpu_virt_release_full_gpu(adev, true);
+ if (r)
+ return r;
- if (AMDGPU_RETRY_SRIOV_RESET(r)) {
- if (retry_limit < AMDGPU_MAX_RETRY_LIMIT) {
- retry_limit++;
- goto retry;
- } else
- DRM_ERROR("GPU reset retry is beyond the retry
limit\n");
- }
+ /* need to be called during full access so we can't do it later like
+* bare-metal does.
+*/
+ amdgpu_amdkfd_post_reset(adev);
+ amdgpu_virt_release_full_gpu(adev, true);
- return r;
+ return 0;
}
/**
@@ -5689,6 +5682,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
int i, r = 0;
bool need_emergency_restart = false;
bool audio_suspended = false;
+ int retry_limit = AMDGPU_MAX_RETRY_LIMIT;
/*
* Special case: RAS triggered and full reset isn't supported @@
-5770,8 +5764,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
cancel_delayed_work_sync(_adev->delayed_init_work);
- if (!amdgpu_sriov_vf(tmp_adev))
- amdgpu_amdkfd_pre_reset(tmp_adev);
+ amdgpu_amdkfd_pre_reset(tmp_adev);
/*
* Mark these ASICs to be reseted as untracked first @@ -5830,6
+5823,10 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
/* Host driver will handle XGMI hive reset for SRIOV */
if (amdgpu_sriov_vf(adev)) {
r = amdgpu_device_reset_sriov(adev, reset_context);
+ if (AMDGPU_RETRY_SRIOV_RESET(r) && (retry_limit--) > 0) {
+
Re: [PATCH v4 13/15] drm/amd/display: Use ARCH_HAS_KERNEL_FPU_SUPPORT
On 2024-03-29 03:18, Samuel Holland wrote:
> Now that all previously-supported architectures select
> ARCH_HAS_KERNEL_FPU_SUPPORT, this code can depend on that symbol instead
> of the existing list of architectures. It can also take advantage of the
> common kernel-mode FPU API and method of adjusting CFLAGS.
>
> Acked-by: Alex Deucher
> Reviewed-by: Christoph Hellwig
Really nice set of changes.
Acked-by: Harry Wentland
Harry
> Signed-off-by: Samuel Holland
> ---
>
> (no changes since v2)
>
> Changes in v2:
> - Split altivec removal to a separate patch
> - Use linux/fpu.h instead of asm/fpu.h in consumers
>
> drivers/gpu/drm/amd/display/Kconfig | 2 +-
> .../gpu/drm/amd/display/amdgpu_dm/dc_fpu.c| 27 ++
> drivers/gpu/drm/amd/display/dc/dml/Makefile | 36 ++-
> drivers/gpu/drm/amd/display/dc/dml2/Makefile | 36 ++-
> 4 files changed, 7 insertions(+), 94 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/Kconfig
> b/drivers/gpu/drm/amd/display/Kconfig
> index 901d1961b739..5fcd4f778dc3 100644
> --- a/drivers/gpu/drm/amd/display/Kconfig
> +++ b/drivers/gpu/drm/amd/display/Kconfig
> @@ -8,7 +8,7 @@ config DRM_AMD_DC
> depends on BROKEN || !CC_IS_CLANG || ARM64 || RISCV || SPARC64 || X86_64
> select SND_HDA_COMPONENT if SND_HDA_CORE
> # !CC_IS_CLANG: https://github.com/ClangBuiltLinux/linux/issues/1752
> - select DRM_AMD_DC_FP if (X86 || LOONGARCH || (PPC64 && ALTIVEC) ||
> (ARM64 && KERNEL_MODE_NEON && !CC_IS_CLANG))
> + select DRM_AMD_DC_FP if ARCH_HAS_KERNEL_FPU_SUPPORT && (!ARM64 ||
> !CC_IS_CLANG)
> help
> Choose this option if you want to use the new display engine
> support for AMDGPU. This adds required support for Vega and
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
> index 0de16796466b..e46f8ce41d87 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
> @@ -26,16 +26,7 @@
>
> #include "dc_trace.h"
>
> -#if defined(CONFIG_X86)
> -#include
> -#elif defined(CONFIG_PPC64)
> -#include
> -#include
> -#elif defined(CONFIG_ARM64)
> -#include
> -#elif defined(CONFIG_LOONGARCH)
> -#include
> -#endif
> +#include
>
> /**
> * DOC: DC FPU manipulation overview
> @@ -87,16 +78,9 @@ void dc_fpu_begin(const char *function_name, const int
> line)
> WARN_ON_ONCE(!in_task());
> preempt_disable();
> depth = __this_cpu_inc_return(fpu_recursion_depth);
> -
> if (depth == 1) {
> -#if defined(CONFIG_X86) || defined(CONFIG_LOONGARCH)
> + BUG_ON(!kernel_fpu_available());
> kernel_fpu_begin();
> -#elif defined(CONFIG_PPC64)
> - if (!cpu_has_feature(CPU_FTR_FPU_UNAVAILABLE))
> - enable_kernel_fp();
> -#elif defined(CONFIG_ARM64)
> - kernel_neon_begin();
> -#endif
> }
>
> TRACE_DCN_FPU(true, function_name, line, depth);
> @@ -118,14 +102,7 @@ void dc_fpu_end(const char *function_name, const int
> line)
>
> depth = __this_cpu_dec_return(fpu_recursion_depth);
> if (depth == 0) {
> -#if defined(CONFIG_X86) || defined(CONFIG_LOONGARCH)
> kernel_fpu_end();
> -#elif defined(CONFIG_PPC64)
> - if (!cpu_has_feature(CPU_FTR_FPU_UNAVAILABLE))
> - disable_kernel_fp();
> -#elif defined(CONFIG_ARM64)
> - kernel_neon_end();
> -#endif
> } else {
> WARN_ON_ONCE(depth < 0);
> }
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/Makefile
> b/drivers/gpu/drm/amd/display/dc/dml/Makefile
> index 59d3972341d2..a94b6d546cd1 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/Makefile
> +++ b/drivers/gpu/drm/amd/display/dc/dml/Makefile
> @@ -25,40 +25,8 @@
> # It provides the general basic services required by other DAL
> # subcomponents.
>
> -ifdef CONFIG_X86
> -dml_ccflags-$(CONFIG_CC_IS_GCC) := -mhard-float
> -dml_ccflags := $(dml_ccflags-y) -msse
> -endif
> -
> -ifdef CONFIG_PPC64
> -dml_ccflags := -mhard-float
> -endif
> -
> -ifdef CONFIG_ARM64
> -dml_rcflags := -mgeneral-regs-only
> -endif
> -
> -ifdef CONFIG_LOONGARCH
> -dml_ccflags := -mfpu=64
> -dml_rcflags := -msoft-float
> -endif
> -
> -ifdef CONFIG_CC_IS_GCC
> -ifneq ($(call gcc-min-version, 70100),y)
> -IS_OLD_GCC = 1
> -endif
> -endif
> -
> -ifdef CONFIG_X86
> -ifdef IS_OLD_GCC
> -# Stack alignment mismatch, proceed with caution.
> -# GCC < 7.1 cannot compile code using `double` and
> -mpreferred-stack-boundary=3
> -# (8B stack alignment).
> -dml_ccflags += -mpreferred-stack-boundary=4
> -else
> -dml_ccflags += -msse2
> -endif
> -endif
> +dml_ccflags := $(CC_FLAGS_FPU)
> +dml_rcflags := $(CC_FLAGS_NO_FPU)
>
> ifneq ($(CONFIG_FRAME_WARN),0)
> ifeq ($(filter y,$(CONFIG_KASAN)$(CONFIG_KCSAN)),y)
> diff --git a/drivers/gpu/drm/amd/display/dc/dml2/Makefile
>
Re: [PATCH v4 12/15] drm/amd/display: Only use hard-float, not altivec on powerpc
On 2024-03-29 03:18, Samuel Holland wrote: > From: Michael Ellerman > > The compiler flags enable altivec, but that is not required; hard-float > is sufficient for the code to build and function. > > Drop altivec from the compiler flags and adjust the enable/disable code > to only enable FPU use. > > Signed-off-by: Michael Ellerman > Acked-by: Alex Deucher > Signed-off-by: Samuel Holland Acked-by: Harry Wentland Harry > --- > > (no changes since v2) > > Changes in v2: > - New patch for v2 > > drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c | 12 ++-- > drivers/gpu/drm/amd/display/dc/dml/Makefile| 2 +- > drivers/gpu/drm/amd/display/dc/dml2/Makefile | 2 +- > 3 files changed, 4 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c > b/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c > index 4ae4720535a5..0de16796466b 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c > @@ -92,11 +92,7 @@ void dc_fpu_begin(const char *function_name, const int > line) > #if defined(CONFIG_X86) || defined(CONFIG_LOONGARCH) > kernel_fpu_begin(); > #elif defined(CONFIG_PPC64) > - if (cpu_has_feature(CPU_FTR_VSX_COMP)) > - enable_kernel_vsx(); > - else if (cpu_has_feature(CPU_FTR_ALTIVEC_COMP)) > - enable_kernel_altivec(); > - else if (!cpu_has_feature(CPU_FTR_FPU_UNAVAILABLE)) > + if (!cpu_has_feature(CPU_FTR_FPU_UNAVAILABLE)) > enable_kernel_fp(); > #elif defined(CONFIG_ARM64) > kernel_neon_begin(); > @@ -125,11 +121,7 @@ void dc_fpu_end(const char *function_name, const int > line) > #if defined(CONFIG_X86) || defined(CONFIG_LOONGARCH) > kernel_fpu_end(); > #elif defined(CONFIG_PPC64) > - if (cpu_has_feature(CPU_FTR_VSX_COMP)) > - disable_kernel_vsx(); > - else if (cpu_has_feature(CPU_FTR_ALTIVEC_COMP)) > - disable_kernel_altivec(); > - else if (!cpu_has_feature(CPU_FTR_FPU_UNAVAILABLE)) > + if (!cpu_has_feature(CPU_FTR_FPU_UNAVAILABLE)) > disable_kernel_fp(); > #elif defined(CONFIG_ARM64) > kernel_neon_end(); > diff --git a/drivers/gpu/drm/amd/display/dc/dml/Makefile > b/drivers/gpu/drm/amd/display/dc/dml/Makefile > index c4a5efd2dda5..59d3972341d2 100644 > --- a/drivers/gpu/drm/amd/display/dc/dml/Makefile > +++ b/drivers/gpu/drm/amd/display/dc/dml/Makefile > @@ -31,7 +31,7 @@ dml_ccflags := $(dml_ccflags-y) -msse > endif > > ifdef CONFIG_PPC64 > -dml_ccflags := -mhard-float -maltivec > +dml_ccflags := -mhard-float > endif > > ifdef CONFIG_ARM64 > diff --git a/drivers/gpu/drm/amd/display/dc/dml2/Makefile > b/drivers/gpu/drm/amd/display/dc/dml2/Makefile > index acff3449b8d7..7b51364084b5 100644 > --- a/drivers/gpu/drm/amd/display/dc/dml2/Makefile > +++ b/drivers/gpu/drm/amd/display/dc/dml2/Makefile > @@ -30,7 +30,7 @@ dml2_ccflags := $(dml2_ccflags-y) -msse > endif > > ifdef CONFIG_PPC64 > -dml2_ccflags := -mhard-float -maltivec > +dml2_ccflags := -mhard-float > endif > > ifdef CONFIG_ARM64
[RFC 3/5] drm/amdgpu: Skip not present rings in amdgpu_ctx_mgr_usage
From: Tvrtko Ursulin
Avoids a tiny bit of arithmetic and more importantly walking those empty
arrays up to amdgpu_sched_jobs slots and amdgpu_ctx_num_entities, both
which are pointless if there are no rings of the respective type.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 5cb33ac99f70..b409395f6e0c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -979,6 +979,9 @@ void amdgpu_ctx_mgr_usage(struct amdgpu_ctx_mgr *mgr,
idr_for_each_entry(>ctx_handles, ctx, id) {
for (hw_ip = 0; hw_ip < AMDGPU_HW_IP_NUM; ++hw_ip) {
+ if (!mgr->adev->num_ip_rings[hw_ip])
+ continue;
+
for (i = 0; i < amdgpu_ctx_num_entities[hw_ip]; ++i) {
struct amdgpu_ctx_entity *centity;
ktime_t spend;
--
2.44.0
[RFC 5/5] drm/amdgpu: Only show VRAM in fdinfo if it exists
From: Tvrtko Ursulin
Do not emit the key-value pairs if the VRAM does not exist ie. VRAM
placement is not valid and accessible.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 29 +-
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
index a09944104c41..603a5c010f5d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
@@ -83,25 +83,30 @@ void amdgpu_show_fdinfo(struct drm_printer *p, struct
drm_file *file)
*/
drm_printf(p, "pasid:\t%u\n", fpriv->vm.pasid);
- drm_printf(p, "drm-memory-vram:\t%llu KiB\n", stats.vram/1024UL);
drm_printf(p, "drm-memory-gtt: \t%llu KiB\n", stats.gtt/1024UL);
drm_printf(p, "drm-memory-cpu: \t%llu KiB\n", stats.cpu/1024UL);
- drm_printf(p, "amd-memory-visible-vram:\t%llu KiB\n",
- stats.visible_vram/1024UL);
- drm_printf(p, "amd-evicted-vram:\t%llu KiB\n",
- stats.evicted_vram/1024UL);
- drm_printf(p, "amd-evicted-visible-vram:\t%llu KiB\n",
- stats.evicted_visible_vram/1024UL);
- drm_printf(p, "amd-requested-vram:\t%llu KiB\n",
- stats.requested_vram/1024UL);
- drm_printf(p, "amd-requested-visible-vram:\t%llu KiB\n",
- stats.requested_visible_vram/1024UL);
drm_printf(p, "amd-requested-gtt:\t%llu KiB\n",
stats.requested_gtt/1024UL);
- drm_printf(p, "drm-shared-vram:\t%llu KiB\n", stats.vram_shared/1024UL);
drm_printf(p, "drm-shared-gtt:\t%llu KiB\n", stats.gtt_shared/1024UL);
drm_printf(p, "drm-shared-cpu:\t%llu KiB\n", stats.cpu_shared/1024UL);
+ if (!adev->gmc.is_app_apu) {
+ drm_printf(p, "drm-memory-vram:\t%llu KiB\n",
+ stats.vram/1024UL);
+ drm_printf(p, "amd-memory-visible-vram:\t%llu KiB\n",
+ stats.visible_vram/1024UL);
+ drm_printf(p, "amd-evicted-vram:\t%llu KiB\n",
+ stats.evicted_vram/1024UL);
+ drm_printf(p, "amd-evicted-visible-vram:\t%llu KiB\n",
+ stats.evicted_visible_vram/1024UL);
+ drm_printf(p, "amd-requested-vram:\t%llu KiB\n",
+ stats.requested_vram/1024UL);
+ drm_printf(p, "amd-requested-visible-vram:\t%llu KiB\n",
+ stats.requested_visible_vram/1024UL);
+ drm_printf(p, "drm-shared-vram:\t%llu KiB\n",
+ stats.vram_shared/1024UL);
+ }
+
for (hw_ip = 0; hw_ip < AMDGPU_HW_IP_NUM; ++hw_ip) {
if (!usage[hw_ip])
continue;
--
2.44.0
[RFC 4/5] drm/amdgpu: Show engine capacity in fdinfo
From: Tvrtko Ursulin
In cases where there is more than one user visible engine of the same type
DRM fdinfo spec allows the capacity tag to be emitted.
Start doing that so that gputop can adapt and show, for example, 50% if
only one of the two engine instances is fully loaded, while the other is
idle.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
index c7df7fa3459f..a09944104c41 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
@@ -57,6 +57,7 @@ static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = {
void amdgpu_show_fdinfo(struct drm_printer *p, struct drm_file *file)
{
struct amdgpu_fpriv *fpriv = file->driver_priv;
+ struct amdgpu_device *adev = fpriv->ctx_mgr.adev;
struct amdgpu_vm *vm = >vm;
struct amdgpu_mem_stats stats;
@@ -105,7 +106,12 @@ void amdgpu_show_fdinfo(struct drm_printer *p, struct
drm_file *file)
if (!usage[hw_ip])
continue;
- drm_printf(p, "drm-engine-%s:\t%lld ns\n",
amdgpu_ip_name[hw_ip],
- ktime_to_ns(usage[hw_ip]));
+ drm_printf(p, "drm-engine-%s:\t%lld ns\n",
+ amdgpu_ip_name[hw_ip], ktime_to_ns(usage[hw_ip]));
+
+ if (adev->num_ip_rings[hw_ip] > 1)
+ drm_printf(p, "drm-engine-capacity-%s:\t%u\n",
+ amdgpu_ip_name[hw_ip],
+ adev->num_ip_rings[hw_ip]);
}
}
--
2.44.0
[RFC 2/5] drm/amdgpu: Use cached number of rings from the AMDGPU_INFO_HW_IP_INFO ioctl
From: Tvrtko Ursulin
Now that we keep a cached value it is no longer required to walk the
arrays and check the fuses.
Open however is whether at runtime this query is supposed to report if a
ring has disappeared due for example amdgpu_ib_ring_tests() turning it
off.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 62 +++--
1 file changed, 6 insertions(+), 56 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index a0ea6fe8d060..b6f411c0801a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -376,114 +376,64 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,
uint32_t ib_start_alignment = 0;
uint32_t ib_size_alignment = 0;
enum amd_ip_block_type type;
- unsigned int num_rings = 0;
- unsigned int i, j;
+ unsigned int num_rings;
+ unsigned int i;
if (info->query_hw_ip.ip_instance >= AMDGPU_HW_IP_INSTANCE_MAX_COUNT)
return -EINVAL;
+ if (info->query_hw_ip.type >= ARRAY_SIZE(adev->num_ip_rings))
+ return -EINVAL;
+
switch (info->query_hw_ip.type) {
case AMDGPU_HW_IP_GFX:
type = AMD_IP_BLOCK_TYPE_GFX;
- for (i = 0; i < adev->gfx.num_gfx_rings; i++)
- if (adev->gfx.gfx_ring[i].sched.ready)
- ++num_rings;
ib_start_alignment = 32;
ib_size_alignment = 32;
break;
case AMDGPU_HW_IP_COMPUTE:
type = AMD_IP_BLOCK_TYPE_GFX;
- for (i = 0; i < adev->gfx.num_compute_rings; i++)
- if (adev->gfx.compute_ring[i].sched.ready)
- ++num_rings;
ib_start_alignment = 32;
ib_size_alignment = 32;
break;
case AMDGPU_HW_IP_DMA:
type = AMD_IP_BLOCK_TYPE_SDMA;
- for (i = 0; i < adev->sdma.num_instances; i++)
- if (adev->sdma.instance[i].ring.sched.ready)
- ++num_rings;
ib_start_alignment = 256;
ib_size_alignment = 4;
break;
case AMDGPU_HW_IP_UVD:
type = AMD_IP_BLOCK_TYPE_UVD;
- for (i = 0; i < adev->uvd.num_uvd_inst; i++) {
- if (adev->uvd.harvest_config & (1 << i))
- continue;
-
- if (adev->uvd.inst[i].ring.sched.ready)
- ++num_rings;
- }
ib_start_alignment = 256;
ib_size_alignment = 64;
break;
case AMDGPU_HW_IP_VCE:
type = AMD_IP_BLOCK_TYPE_VCE;
- for (i = 0; i < adev->vce.num_rings; i++)
- if (adev->vce.ring[i].sched.ready)
- ++num_rings;
ib_start_alignment = 256;
ib_size_alignment = 4;
break;
case AMDGPU_HW_IP_UVD_ENC:
type = AMD_IP_BLOCK_TYPE_UVD;
- for (i = 0; i < adev->uvd.num_uvd_inst; i++) {
- if (adev->uvd.harvest_config & (1 << i))
- continue;
-
- for (j = 0; j < adev->uvd.num_enc_rings; j++)
- if (adev->uvd.inst[i].ring_enc[j].sched.ready)
- ++num_rings;
- }
ib_start_alignment = 256;
ib_size_alignment = 4;
break;
case AMDGPU_HW_IP_VCN_DEC:
type = AMD_IP_BLOCK_TYPE_VCN;
- for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
- if (adev->vcn.harvest_config & (1 << i))
- continue;
-
- if (adev->vcn.inst[i].ring_dec.sched.ready)
- ++num_rings;
- }
ib_start_alignment = 256;
ib_size_alignment = 64;
break;
case AMDGPU_HW_IP_VCN_ENC:
type = AMD_IP_BLOCK_TYPE_VCN;
- for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
- if (adev->vcn.harvest_config & (1 << i))
- continue;
-
- for (j = 0; j < adev->vcn.num_enc_rings; j++)
- if (adev->vcn.inst[i].ring_enc[j].sched.ready)
- ++num_rings;
- }
ib_start_alignment = 256;
ib_size_alignment = 4;
break;
case AMDGPU_HW_IP_VCN_JPEG:
type = (amdgpu_device_ip_get_ip_block(adev,
AMD_IP_BLOCK_TYPE_JPEG)) ?
AMD_IP_BLOCK_TYPE_JPEG : AMD_IP_BLOCK_TYPE_VCN;
-
- for (i =
[RFC 1/5] drm/amdgpu: Cache number of rings per hw ip type
From: Tvrtko Ursulin
With the end goal being using the number of rings for exposing capacity in
fdinfo, and the observation that the number could be used elsewhere in the
driver, lets cache it during the driver init phase.
We count the number of created scheduler instances for user visible hw ip
block types, which correspond with the number of user visible rings.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 14 ++
2 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f87d53e183c3..4f394602bbd8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -964,6 +964,7 @@ struct amdgpu_device {
/* rings */
u64 fence_context;
unsignednum_rings;
+ unsignednum_ip_rings[AMDGPU_HW_IP_NUM];
struct amdgpu_ring *rings[AMDGPU_MAX_RINGS];
struct dma_fence __rcu *gang_submit;
boolib_pool_ready;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 861ccff78af9..e421f352d77e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2756,6 +2756,20 @@ static int amdgpu_device_init_schedulers(struct
amdgpu_device *adev)
ring->name);
return r;
}
+
+ BUILD_BUG_ON(AMDGPU_RING_TYPE_GFX != AMDGPU_HW_IP_GFX);
+ BUILD_BUG_ON(AMDGPU_RING_TYPE_COMPUTE !=
AMDGPU_HW_IP_COMPUTE);
+ BUILD_BUG_ON(AMDGPU_RING_TYPE_SDMA != AMDGPU_HW_IP_DMA);
+ BUILD_BUG_ON(AMDGPU_RING_TYPE_UVD != AMDGPU_HW_IP_UVD);
+ BUILD_BUG_ON(AMDGPU_RING_TYPE_VCE != AMDGPU_HW_IP_VCE);
+ BUILD_BUG_ON(AMDGPU_RING_TYPE_UVD_ENC !=
AMDGPU_HW_IP_UVD_ENC);
+ BUILD_BUG_ON(AMDGPU_RING_TYPE_VCN_DEC !=
AMDGPU_HW_IP_VCN_DEC);
+ BUILD_BUG_ON(AMDGPU_RING_TYPE_VCN_ENC !=
AMDGPU_HW_IP_VCN_ENC);
+ BUILD_BUG_ON(AMDGPU_RING_TYPE_VCN_JPEG !=
AMDGPU_HW_IP_VCN_JPEG);
+ BUILD_BUG_ON(AMDGPU_RING_TYPE_VPE != AMDGPU_HW_IP_VPE);
+
+ if (ring->funcs->type < ARRAY_SIZE(adev->num_ip_rings))
+ adev->num_ip_rings[ring->funcs->type]++;
}
amdgpu_xcp_update_partition_sched_list(adev);
--
2.44.0
[RFC 0/5] Add capacity key to fdinfo
From: Tvrtko Ursulin I have noticed AMD GPUs can have more than one "engine" (ring?) of the same type but amdgpu is not reporting that in fdinfo using the capacity engine tag. This series is therefore an attempt to improve that, but only an RFC since it is quite likely I got stuff wrong on the first attempt. Or if not wrong it may not be very beneficial in AMDs case. So I tried to figure out how to count and store the number of instances of an "engine" type and spotted that could perhaps be used in more than one place in the driver. I was more than a little bit confused by the ip_instance and uapi rings, then how rings are selected to context entities internally. Anyway.. hopefully it is a simple enough series to easily spot any such large misses. End result should be that, assuming two "engine" instances, one fully loaded and one idle will only report client using 50% of that engine type. Tvrtko Ursulin (5): drm/amdgpu: Cache number of rings per hw ip type drm/amdgpu: Use cached number of rings from the AMDGPU_INFO_HW_IP_INFO ioctl drm/amdgpu: Skip not present rings in amdgpu_ctx_mgr_usage drm/amdgpu: Show engine capacity in fdinfo drm/amdgpu: Only show VRAM in fdinfo if it exists drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c| 3 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 14 + drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 39 +- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 62 +++--- 5 files changed, 49 insertions(+), 70 deletions(-) -- 2.44.0
[PATCH v3 2/3] drm/amdgpu: Reduce mem_type to domain double indirection
From: Tvrtko Ursulin
All apart from AMDGPU_GEM_DOMAIN_GTT memory domains map 1:1 to TTM
placements. And the former be either AMDGPU_PL_PREEMPT or TTM_PL_TT,
depending on AMDGPU_GEM_CREATE_PREEMPTIBLE.
Simplify a few places in the code which convert the TTM placement into
a domain by checking against the current placement directly.
In the conversion AMDGPU_PL_PREEMPT either does not have to be handled
because amdgpu_mem_type_to_domain() cannot return that value anyway.
v2:
* Remove AMDGPU_PL_PREEMPT handling.
v3:
* Rebase.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Christian König # v1
Reviewed-by: Felix Kuehling # v2
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 3 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 29 +
2 files changed, 13 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
index 055ba2ea4c12..0b3b10d21952 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
@@ -165,8 +165,7 @@ static struct sg_table *amdgpu_dma_buf_map(struct
dma_buf_attachment *attach,
if (r)
return ERR_PTR(r);
- } else if (!(amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type) &
-AMDGPU_GEM_DOMAIN_GTT)) {
+ } else if (bo->tbo.resource->mem_type != TTM_PL_TT) {
return ERR_PTR(-EBUSY);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index b2a83c802bbd..c581e4952cbd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -983,12 +983,11 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32
domain,
ttm_bo_pin(>tbo);
- domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type);
- if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
+ if (bo->tbo.resource->mem_type == TTM_PL_VRAM) {
atomic64_add(amdgpu_bo_size(bo), >vram_pin_size);
atomic64_add(amdgpu_vram_mgr_bo_visible_size(bo),
>visible_pin_size);
- } else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
+ } else if (bo->tbo.resource->mem_type == TTM_PL_TT) {
atomic64_add(amdgpu_bo_size(bo), >gart_pin_size);
}
@@ -1289,7 +1288,6 @@ void amdgpu_bo_get_memory(struct amdgpu_bo *bo,
struct ttm_resource *res = bo->tbo.resource;
uint64_t size = amdgpu_bo_size(bo);
struct drm_gem_object *obj;
- unsigned int domain;
bool shared;
/* Abort if the BO doesn't currently have a backing store */
@@ -1299,21 +1297,20 @@ void amdgpu_bo_get_memory(struct amdgpu_bo *bo,
obj = >tbo.base;
shared = drm_gem_object_is_shared_for_memory_stats(obj);
- domain = amdgpu_mem_type_to_domain(res->mem_type);
- switch (domain) {
- case AMDGPU_GEM_DOMAIN_VRAM:
+ switch (res->mem_type) {
+ case TTM_PL_VRAM:
stats->vram += size;
- if (amdgpu_res_cpu_visible(adev, bo->tbo.resource))
+ if (amdgpu_res_cpu_visible(adev, res))
stats->visible_vram += size;
if (shared)
stats->vram_shared += size;
break;
- case AMDGPU_GEM_DOMAIN_GTT:
+ case TTM_PL_TT:
stats->gtt += size;
if (shared)
stats->gtt_shared += size;
break;
- case AMDGPU_GEM_DOMAIN_CPU:
+ case TTM_PL_SYSTEM:
default:
stats->cpu += size;
if (shared)
@@ -1326,7 +1323,7 @@ void amdgpu_bo_get_memory(struct amdgpu_bo *bo,
if (bo->flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED)
stats->requested_visible_vram += size;
- if (domain != AMDGPU_GEM_DOMAIN_VRAM) {
+ if (res->mem_type != TTM_PL_VRAM) {
stats->evicted_vram += size;
if (bo->flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED)
stats->evicted_visible_vram += size;
@@ -1600,20 +1597,18 @@ u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo,
struct seq_file *m)
u64 size;
if (dma_resv_trylock(bo->tbo.base.resv)) {
- unsigned int domain;
- domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type);
- switch (domain) {
- case AMDGPU_GEM_DOMAIN_VRAM:
+ switch (bo->tbo.resource->mem_type) {
+ case TTM_PL_VRAM:
if (amdgpu_res_cpu_visible(adev, bo->tbo.resource))
placement = "VRAM VISIBLE";
else
placement = "VRAM";
break;
- case AMDGPU_GEM_DOMAIN_GTT:
+ case
Re: [PATCH] drm/amd/display: Remove redundant NULL check in dce110_set_input_transfer_func
Reviewed-by: Aurabindo Pillai
On 4/23/24 9:29 PM, Srinivasan Shanmugam wrote:
This commit removes a redundant NULL check in the
`dce110_set_input_transfer_func` function in the `dce110_hwseq.c` file.
The variable `tf` is assigned the address of
`plane_state->in_transfer_func` unconditionally, so it can never be
`NULL`. Therefore, the check `if (tf == NULL)` is unnecessary and has
been removed.
Fixes the below smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dce110/dce110_hwseq.c:301
dce110_set_input_transfer_func() warn: address of
'plane_state->in_transfer_func' is non-NULL
Fixes: 285a7054bf81 ("drm/amd/display: Remove plane and stream pointers from dc
scratch")
Cc: Wenjing Liu
Cc: Tom Chung
Cc: Alvin Lee
Cc: Rodrigo Siqueira
Cc: Roman Li
Cc: Hersen Wu
Cc: Alex Hung
Cc: Aurabindo Pillai
Cc: Harry Wentland
Suggested-by: Dan Carpenter
Signed-off-by: Srinivasan Shanmugam
---
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
index 5920d1825a4c..8e50a5432d33 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
@@ -298,10 +298,7 @@ dce110_set_input_transfer_func(struct dc *dc, struct
pipe_ctx *pipe_ctx,
dce_use_lut(plane_state->format))
ipp->funcs->ipp_program_input_lut(ipp,
_state->gamma_correction);
- if (tf == NULL) {
- /* Default case if no input transfer function specified */
- ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_sRGB);
- } else if (tf->type == TF_TYPE_PREDEFINED) {
+ if (tf->type == TF_TYPE_PREDEFINED) {
switch (tf->tf) {
case TRANSFER_FUNCTION_SRGB:
ipp->funcs->ipp_set_degamma(ipp,
IPP_DEGAMMA_MODE_HW_sRGB);
--
--
Thanks & Regards,
Aurabindo Pillai
Re: [PATCH] drm/amd/display: fix documentation warnings for mpc.h
Hi Marcelo,
First of all, thanks a lot for your patch! Please check some of my
inline comments.
On 4/27/24 10:05 AM, Marcelo Mendes Spessoto Junior wrote:
Fix most of the display documentation compile warnings by
documenting struct mpc_funcs functions in dc/inc/hw/mpc.h file.
Could you add the warnings that you fixed in the commit message?
I think some of your changes in this patch address some of the issues
reported by Stephan Rothwell:
https://lore.kernel.org/all/20240130134954.04fcf...@canb.auug.org.au/
Please include Stephan in the new version of this patch.
Also, use the Fixes tags pointing to:
b8c1c3a82e75 ("Documentation/gpu: Add kernel doc entry for MPC")
Signed-off-by: Marcelo Mendes Spessoto Junior
---
drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h | 372 +++-
1 file changed, 369 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
b/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
index 34a398f23..388b96c32 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
@@ -1,4 +1,5 @@
-/* Copyright 2012-15 Advanced Micro Devices, Inc.
+/*
+ * Copyright 2012-15 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -282,6 +283,21 @@ struct mpcc_state {
* struct mpc_funcs - funcs
*/
struct mpc_funcs {
+ /**
+ * @read_mpcc_state:
+ *
+ * Read register content from given MPCC physical instance.
It looks like your text editor left some extra spaces at the end of the
string in many parts of this patch. Remove this extra space at the end
of some of the strings in this patch for the next version. If you use
git log -p after applying your patch, you can visually see where the
extra space is at the end of each line.
+ *
+ * Parameters:
+ *
+ * - [in/out] mpc - MPC context
+ * - [in] mpcc_instance - MPC context instance
+ * - [in] mpcc_state - MPC context state
+ *
+ * Return:
+ *
+ * void
+ */
Use the same indentation as the field/functions that you are documenting.
Finally, ensure you are using the latest amd-staging-drm-next to base
your patch. I believe you have some merge conflicts since mpc.h has some
changes.
Thanks
Siqueira
void (*read_mpcc_state)(
struct mpc *mpc,
int mpcc_inst,
@@ -346,12 +362,22 @@ struct mpc_funcs {
* Parameters:
*
* - [in/out] mpc - MPC context.
-*
+*
* Return:
*
* void
*/
void (*mpc_init)(struct mpc *mpc);
+
+ /**
+ * @mpc_init_single_inst:
+ *
+ * Initialize given MPCC physical instance.
+ *
+ * Parameters:
+ * - [in/out] mpc - MPC context.
+ * - [in] mpcc_id - The MPCC physical instance to be initialized.
+ */
void (*mpc_init_single_inst)(
struct mpc *mpc,
unsigned int mpcc_id);
@@ -449,62 +475,282 @@ struct mpc_funcs {
struct mpc_tree *tree,
struct mpcc *mpcc);
+ /**
+ * @get_mpcc_for_dpp_from_secondary:
+ *
+ * Find, if it exists, a MPCC from a given 'secondary' MPC tree that
+ * is associated with specified plane.
+ *
+ * Parameters:
+ * - [in/out] tree - MPC tree structure to search for plane.
+ * - [in] dpp_id - DPP to be searched.
+ *
+ * Return:
+ *
+ * struct mpcc* - pointer to plane or NULL if no plane found.
+ */
struct mpcc* (*get_mpcc_for_dpp_from_secondary)(
struct mpc_tree *tree,
int dpp_id);
+ /**
+ * @get_mpcc_for_dpp:
+ *
+ * Find, if it exists, a MPCC from a given MPC tree that
+ * is associated with specified plane.
+ *
+ * Parameters:
+ * - [in/out] tree - MPC tree structure to search for plane.
+ * - [in] dpp_id - DPP to be searched.
+ *
+ * Return:
+ *
+ * struct mpcc* - pointer to plane or NULL if no plane found.
+ */
struct mpcc* (*get_mpcc_for_dpp)(
struct mpc_tree *tree,
int dpp_id);
+ /**
+ * @wait_for_idle:
+ *
+ * Wait for a MPCC in MPC context to enter idle state.
+ *
+ * Parameters:
+ * - [in/out] mpc - MPC Context.
+ * - [in] id - MPCC to wait for idle state.
+ *
+ * Return:
+ *
+ * void
+ */
void (*wait_for_idle)(struct mpc *mpc, int id);
+ /**
+ * @assert_mpcc_idle_before_connect:
+ *
+ * Assert if MPCC in MPC context is in idle state.
+ *
+ * Parameters:
+ * - [in/out] mpc - MPC context.
+ * - [in] id - MPCC to assert idle state.
+ *
+ * Return:
+ *
+ * void
+ */
void (*assert_mpcc_idle_before_connect)(struct mpc *mpc, int mpcc_id);
+ /**
+ * @init_mpcc_list_from_hw:
+ *
+ * Iterate through the MPCC array from a given MPC context
[PATCH] drm/amdgpu: add gfx eviction fence helpers
This patch adds basic eviction fence framework for the gfx buffers.
The idea is to:
- One eviction fence is created per gfx process, at kms_open.
- This same fence is attached to all the gem buffers created
by this process.
This framework will be further used for usermode queues.
Cc: Christian Koenig
Cc: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/Makefile | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 15 +++
.../drm/amd/amdgpu/amdgpu_eviction_fence.c| 96 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 10 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h| 2 +
6 files changed, 127 insertions(+), 3 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index 4536c8ad0e11..ba00789eb4ef 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -80,7 +80,8 @@ amdgpu-y += amdgpu_device.o amdgpu_doorbell_mgr.o
amdgpu_kms.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
amdgpu_fw_attestation.o amdgpu_securedisplay.o \
amdgpu_eeprom.o amdgpu_mca.o amdgpu_psp_ta.o amdgpu_lsdma.o \
- amdgpu_ring_mux.o amdgpu_xcp.o amdgpu_seq64.o amdgpu_aca.o
+ amdgpu_ring_mux.o amdgpu_xcp.o amdgpu_seq64.o amdgpu_aca.o \
+ amdgpu_eviction_fence.o
amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 9c62552bec34..4a4b2680eb9b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -463,6 +463,13 @@ struct amdgpu_flip_work {
boolasync;
};
+struct amdgpu_eviction_fence {
+ u64 fence_ctx;
+ atomic_t seq;
+ spinlock_t lock;
+ struct dma_fence base;
+ char timeline_name[TASK_COMM_LEN];
+};
/*
* file private structure
@@ -476,6 +483,7 @@ struct amdgpu_fpriv {
struct mutexbo_list_lock;
struct idr bo_list_handles;
struct amdgpu_ctx_mgr ctx_mgr;
+ struct amdgpu_eviction_fence eviction_fence;
/** GPU partition selection */
uint32_txcp_id;
};
@@ -1474,6 +1482,13 @@ void amdgpu_disable_vblank_kms(struct drm_crtc *crtc);
int amdgpu_info_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp);
+/* Eviction fence */
+void amdgpu_eviction_fence_create(struct amdgpu_fpriv *fpriv);
+int amdgpu_eviction_fence_attach(struct amdgpu_fpriv *fpriv,
+struct amdgpu_bo *bo);
+void amdgpu_eviction_fence_detach(struct amdgpu_fpriv *fpriv);
+void amdgpu_eviction_fence_signal(struct amdgpu_fpriv *fpriv);
+
/*
* functions used by amdgpu_encoder.c
*/
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c
new file mode 100644
index ..36009d89be03
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright 2024 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+#include
+#include "amdgpu.h"
+
+static const char *
+amdgpu_ev_fence_get_driver_name(struct dma_fence *fence)
+{
+ return "amdgpu";
+}
+
+static const char *
+amdgpu_ev_fence_get_timeline_name(struct dma_fence *f)
+{
+ struct amdgpu_eviction_fence *ef;
+
+ ef = container_of(f, struct amdgpu_eviction_fence, base);
+ return ef->timeline_name;
+}
+
+static const struct dma_fence_ops amdgpu_eviction_fence_ops = {
+ .use_64bit_seqno = true,
+ .get_driver_name = amdgpu_ev_fence_get_driver_name,
+
Re: [PATCH] drm/amd/display: Disable panel replay by default for now
On 2024-04-30 11:12, Mario Limonciello wrote:
> Panel replay was enabled by default in commit 5950efe25ee0
> ("drm/amd/display: Enable Panel Replay for static screen use case"), but
> it isn't working properly at least on some BOE and AUO panels. Instead
> of being static the screen is solid black when active. As it's a new
> feature that was just introduced that regressed VRR disable it for now
> so that problem can be properly root caused.
>
> Cc: Tom Chung
> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3344
> Fixes: 5950efe25ee0 ("drm/amd/display: Enable Panel Replay for static screen
> use case")
> Signed-off-by: Mario Limonciello
Acked-by: Harry Wentland
Harry
> ---
> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 21 +++
> 1 file changed, 12 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 8245cc63712f..b5e5cbbe5e49 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -4581,15 +4581,18 @@ static int amdgpu_dm_initialize_drm_device(struct
> amdgpu_device *adev)
> /* Determine whether to enable Replay support by default. */
> if (!(amdgpu_dc_debug_mask & DC_DISABLE_REPLAY)) {
> switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) {
> - case IP_VERSION(3, 1, 4):
> - case IP_VERSION(3, 1, 5):
> - case IP_VERSION(3, 1, 6):
> - case IP_VERSION(3, 2, 0):
> - case IP_VERSION(3, 2, 1):
> - case IP_VERSION(3, 5, 0):
> - case IP_VERSION(3, 5, 1):
> - replay_feature_enabled = true;
> - break;
> +/*
> + * Disabled by default due to
> https://gitlab.freedesktop.org/drm/amd/-/issues/3344
> + * case IP_VERSION(3, 1, 4):
> + * case IP_VERSION(3, 1, 5):
> + * case IP_VERSION(3, 1, 6):
> + * case IP_VERSION(3, 2, 0):
> + * case IP_VERSION(3, 2, 1):
> + * case IP_VERSION(3, 5, 0):
> + * case IP_VERSION(3, 5, 1):
> + * replay_feature_enabled = true;
> + * break;
> + */
> default:
> replay_feature_enabled = amdgpu_dc_feature_mask &
> DC_REPLAY_MASK;
> break;
Re: [PATCH v2] drm/amd/display: Remove redundant NULL check in dcn10_set_input_transfer_func
[AMD Official Use Only - General]
Reviewed-by: Aurabindo Pillai
--
Regards,
Jay
From: SHANMUGAM, SRINIVASAN
Sent: Tuesday, April 23, 2024 9:34 PM
To: Siqueira, Rodrigo ; Pillai, Aurabindo
Cc: amd-gfx@lists.freedesktop.org ; SHANMUGAM,
SRINIVASAN ; Liu, Wenjing ;
Chung, ChiaHsuan (Tom) ; Lee, Alvin
; Li, Roman ; Wu, Hersen
; Hung, Alex ; Wentland, Harry
; Dan Carpenter
Subject: [PATCH v2] drm/amd/display: Remove redundant NULL check in
dcn10_set_input_transfer_func
This commit removes an unnecessary NULL check in the
`dcn10_set_input_transfer_func` function in the `dcn10_hwseq.c` file.
The variable `tf` is assigned the address of
`plane_state->in_transfer_func` unconditionally, so it can never be
`NULL`. Therefore, the check `if (tf == NULL)` is unnecessary and has
been removed.
Fixes the below smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn10/dcn10_hwseq.c:1839
dcn10_set_input_transfer_func() warn: address of
'plane_state->in_transfer_func' is non-NULL
Fixes: 285a7054bf81 ("drm/amd/display: Remove plane and stream pointers from dc
scratch")
Cc: Wenjing Liu
Cc: Tom Chung
Cc: Alvin Lee
Cc: Rodrigo Siqueira
Cc: Roman Li
Cc: Hersen Wu
Cc: Alex Hung
Cc: Aurabindo Pillai
Cc: Harry Wentland
Suggested-by: Dan Carpenter
Signed-off-by: Srinivasan Shanmugam
---
v2:
- s/dcn20/dcn10 in commit title
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
index 32a07ab74c51..f258914a4838 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
@@ -1837,9 +1837,7 @@ bool dcn10_set_input_transfer_func(struct dc *dc, struct
pipe_ctx *pipe_ctx,
&& dce_use_lut(plane_state->format))
dpp_base->funcs->dpp_program_input_lut(dpp_base,
_state->gamma_correction);
- if (tf == NULL)
- dpp_base->funcs->dpp_set_degamma(dpp_base,
IPP_DEGAMMA_MODE_BYPASS);
- else if (tf->type == TF_TYPE_PREDEFINED) {
+ if (tf->type == TF_TYPE_PREDEFINED) {
switch (tf->tf) {
case TRANSFER_FUNCTION_SRGB:
dpp_base->funcs->dpp_set_degamma(dpp_base,
IPP_DEGAMMA_MODE_HW_sRGB);
--
2.34.1
[PATCH] drm/amd/display: Disable panel replay by default for now
Panel replay was enabled by default in commit 5950efe25ee0
("drm/amd/display: Enable Panel Replay for static screen use case"), but
it isn't working properly at least on some BOE and AUO panels. Instead
of being static the screen is solid black when active. As it's a new
feature that was just introduced that regressed VRR disable it for now
so that problem can be properly root caused.
Cc: Tom Chung
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3344
Fixes: 5950efe25ee0 ("drm/amd/display: Enable Panel Replay for static screen
use case")
Signed-off-by: Mario Limonciello
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 21 +++
1 file changed, 12 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 8245cc63712f..b5e5cbbe5e49 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4581,15 +4581,18 @@ static int amdgpu_dm_initialize_drm_device(struct
amdgpu_device *adev)
/* Determine whether to enable Replay support by default. */
if (!(amdgpu_dc_debug_mask & DC_DISABLE_REPLAY)) {
switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) {
- case IP_VERSION(3, 1, 4):
- case IP_VERSION(3, 1, 5):
- case IP_VERSION(3, 1, 6):
- case IP_VERSION(3, 2, 0):
- case IP_VERSION(3, 2, 1):
- case IP_VERSION(3, 5, 0):
- case IP_VERSION(3, 5, 1):
- replay_feature_enabled = true;
- break;
+/*
+ * Disabled by default due to
https://gitlab.freedesktop.org/drm/amd/-/issues/3344
+ * case IP_VERSION(3, 1, 4):
+ * case IP_VERSION(3, 1, 5):
+ * case IP_VERSION(3, 1, 6):
+ * case IP_VERSION(3, 2, 0):
+ * case IP_VERSION(3, 2, 1):
+ * case IP_VERSION(3, 5, 0):
+ * case IP_VERSION(3, 5, 1):
+ * replay_feature_enabled = true;
+ * break;
+ */
default:
replay_feature_enabled = amdgpu_dc_feature_mask &
DC_REPLAY_MASK;
break;
--
2.34.1
Re: [PATCH v2 2/2] drm/amd/display: Override DCN410 IP version
On 2024-04-30 10:48, Harry Wentland wrote: On 2024-04-30 09:43, Aurabindo Pillai wrote: Override DCN IP version to 4.0.1 from 4.1.0 temporarily until change is made in DC codebase to use 4.1.0 Signed-off-by: Aurabindo Pillai Series is Reviewed-by: Harry Wentland Harry --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c index d7f948e84e4f..87a2f15c8a64 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c @@ -1966,6 +1966,10 @@ static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev) case IP_VERSION(3, 5, 0): case IP_VERSION(3, 5, 1): case IP_VERSION(4, 1, 0): + /* TODO: Fix IP version. DC code expects version 4.0.1 */ + if (adev->ip_versions[DCE_HWIP][0] == IP_VERSION(4, 1, 0)) + adev->ip_versions[DCE_HWIP][0] = IP_VERSION(4, 0, 1); This test will be called for all IP versions - most of them are not needed. I can suggest to move "case IP_VERSION(4, 1, 0) to the top and then fall through to the rest. Of course it works without this but it will waste some instructions unnecessarily. David + if (amdgpu_sriov_vf(adev)) amdgpu_discovery_set_sriov_display(adev); else
Re: [PATCH] drm/amdgpu: avoid reading vf2pf info size from FB
On 4/30/2024 7:53 PM, Zhigang Luo wrote: > VF can't access FB when host is doing mode1 reset. Using sizeof to get > vf2pf info size, instead of reading it from vf2pf header stored in FB. > > Signed-off-by: Zhigang Luo > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c > index 54ab51a4ada7..c84d2217005e 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c > @@ -583,7 +583,7 @@ static int amdgpu_virt_write_vf2pf_data(struct > amdgpu_device *adev) > } > vf2pf_info->checksum = > amd_sriov_msg_checksum( > - vf2pf_info, vf2pf_info->header.size, 0, 0); > + vf2pf_info, sizeof(struct amd_sriov_msg_vf2pf_info), 0, 0); You may change to sizeof(*vf2pf_info). Reviewed-by: Lijo Lazar Thanks, Lijo > > return 0; > }
Re: [PATCH v2 2/2] drm/amd/display: Override DCN410 IP version
On 2024-04-30 09:43, Aurabindo Pillai wrote: > Override DCN IP version to 4.0.1 from 4.1.0 temporarily until change is > made in DC codebase to use 4.1.0 > > Signed-off-by: Aurabindo Pillai Series is Reviewed-by: Harry Wentland Harry > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 4 > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > index d7f948e84e4f..87a2f15c8a64 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > @@ -1966,6 +1966,10 @@ static int > amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev) > case IP_VERSION(3, 5, 0): > case IP_VERSION(3, 5, 1): > case IP_VERSION(4, 1, 0): > + /* TODO: Fix IP version. DC code expects version 4.0.1 > */ > + if (adev->ip_versions[DCE_HWIP][0] == IP_VERSION(4, 1, > 0)) > + adev->ip_versions[DCE_HWIP][0] = > IP_VERSION(4, 0, 1); > + > if (amdgpu_sriov_vf(adev)) > amdgpu_discovery_set_sriov_display(adev); > else
RE: [PATCH] drm/amdgpu: update vf to pf message retry from 2 to 5
[AMD Official Use Only - General]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Luo, Zhigang
Sent: Tuesday, April 30, 2024 22:23
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Saye, Sashank
; Chan, Hing Pong ; Lazar, Lijo
; Luo, Zhigang
Subject: [PATCH] drm/amdgpu: update vf to pf message retry from 2 to 5
increase retry times to wait host has enough time to complete reset.
Signed-off-by: Zhigang Luo
---
drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
index 89992c1c9a62..8b0ab075b728 100644
--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
@@ -181,7 +181,7 @@ static int xgpu_nv_send_access_requests_with_param(struct
amdgpu_device *adev,
if (event != -1) {
r = xgpu_nv_poll_msg(adev, event);
if (r) {
- if (retry++ < 2)
+ if (retry++ < 5)
goto send_request;
if (req != IDH_REQ_GPU_INIT_DATA) {
--
2.25.1
RE: [PATCH] drm/amdgpu: avoid reading vf2pf info size from FB
[AMD Official Use Only - General] Reviewed-by: Hawking Zhang Regards, Hawking -Original Message- From: Luo, Zhigang Sent: Tuesday, April 30, 2024 22:24 To: amd-gfx@lists.freedesktop.org Cc: Zhang, Hawking ; Saye, Sashank ; Chan, Hing Pong ; Lazar, Lijo ; Luo, Zhigang Subject: [PATCH] drm/amdgpu: avoid reading vf2pf info size from FB VF can't access FB when host is doing mode1 reset. Using sizeof to get vf2pf info size, instead of reading it from vf2pf header stored in FB. Signed-off-by: Zhigang Luo --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c index 54ab51a4ada7..c84d2217005e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c @@ -583,7 +583,7 @@ static int amdgpu_virt_write_vf2pf_data(struct amdgpu_device *adev) } vf2pf_info->checksum = amd_sriov_msg_checksum( - vf2pf_info, vf2pf_info->header.size, 0, 0); + vf2pf_info, sizeof(struct amd_sriov_msg_vf2pf_info), 0, 0); return 0; } -- 2.25.1
Re: [PATCH v1 5/5] drm/ci: update xfails for the new testlist
On 30/04/2024 06:11, Vignesh Raman wrote: Now the testlist is used from IGT build, so update xfails with the new testlist. Signed-off-by: Vignesh Raman --- .../gpu/drm/ci/xfails/amdgpu-stoney-fails.txt | 47 +++ .../drm/ci/xfails/amdgpu-stoney-flakes.txt| 8 +- .../gpu/drm/ci/xfails/amdgpu-stoney-skips.txt | 15 drivers/gpu/drm/ci/xfails/i915-amly-fails.txt | 22 - .../gpu/drm/ci/xfails/i915-amly-flakes.txt| 8 ++ drivers/gpu/drm/ci/xfails/i915-amly-skips.txt | 8 ++ drivers/gpu/drm/ci/xfails/i915-apl-fails.txt | 45 +- drivers/gpu/drm/ci/xfails/i915-apl-flakes.txt | 5 ++ drivers/gpu/drm/ci/xfails/i915-apl-skips.txt | 12 +++ drivers/gpu/drm/ci/xfails/i915-cml-fails.txt | 26 +- drivers/gpu/drm/ci/xfails/i915-cml-flakes.txt | 6 ++ drivers/gpu/drm/ci/xfails/i915-cml-skips.txt | 8 ++ drivers/gpu/drm/ci/xfails/i915-glk-fails.txt | 28 +-- drivers/gpu/drm/ci/xfails/i915-glk-skips.txt | 12 +++ drivers/gpu/drm/ci/xfails/i915-kbl-fails.txt | 39 - drivers/gpu/drm/ci/xfails/i915-kbl-flakes.txt | 10 ++- drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt | 21 + drivers/gpu/drm/ci/xfails/i915-tgl-fails.txt | 75 + drivers/gpu/drm/ci/xfails/i915-tgl-skips.txt | 13 +++ drivers/gpu/drm/ci/xfails/i915-whl-fails.txt | 46 +-- drivers/gpu/drm/ci/xfails/i915-whl-skips.txt | 8 ++ .../drm/ci/xfails/mediatek-mt8173-fails.txt | 47 +++ .../drm/ci/xfails/mediatek-mt8183-fails.txt | 17 +--- .../drm/ci/xfails/mediatek-mt8183-flakes.txt | 5 ++ .../gpu/drm/ci/xfails/meson-g12b-fails.txt| 20 + .../gpu/drm/ci/xfails/meson-g12b-flakes.txt | 5 ++ .../gpu/drm/ci/xfails/msm-apq8016-fails.txt | 26 ++ .../gpu/drm/ci/xfails/msm-apq8016-flakes.txt | 5 ++ .../gpu/drm/ci/xfails/msm-apq8096-fails.txt | 5 +- .../gpu/drm/ci/xfails/msm-apq8096-flakes.txt | 5 ++ .../gpu/drm/ci/xfails/msm-apq8096-skips.txt | 67 +++ .../msm-sc7180-trogdor-kingoftown-fails.txt | 34 .../msm-sc7180-trogdor-kingoftown-flakes.txt | 5 ++ ...sm-sc7180-trogdor-lazor-limozeen-fails.txt | 34 ...m-sc7180-trogdor-lazor-limozeen-flakes.txt | 5 ++ .../gpu/drm/ci/xfails/msm-sdm845-fails.txt| 75 - .../gpu/drm/ci/xfails/msm-sdm845-flakes.txt | 26 ++ .../drm/ci/xfails/rockchip-rk3288-fails.txt | 54 .../drm/ci/xfails/rockchip-rk3399-fails.txt | 80 ++ .../drm/ci/xfails/rockchip-rk3399-flakes.txt | 7 -- .../drm/ci/xfails/virtio_gpu-none-fails.txt | 82 +-- .../drm/ci/xfails/virtio_gpu-none-skips.txt | 3 + 42 files changed, 574 insertions(+), 495 deletions(-) create mode 100644 drivers/gpu/drm/ci/xfails/i915-amly-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/i915-apl-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/i915-cml-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/mediatek-mt8183-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/meson-g12b-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/msm-apq8016-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/msm-apq8096-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/msm-sc7180-trogdor-kingoftown-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/msm-sc7180-trogdor-lazor-limozeen-flakes.txt delete mode 100644 drivers/gpu/drm/ci/xfails/rockchip-rk3288-fails.txt delete mode 100644 drivers/gpu/drm/ci/xfails/rockchip-rk3399-flakes.txt diff --git a/drivers/gpu/drm/ci/xfails/amdgpu-stoney-fails.txt b/drivers/gpu/drm/ci/xfails/amdgpu-stoney-fails.txt index ea87dc46bc2b..a48df7880ec5 100644 --- a/drivers/gpu/drm/ci/xfails/amdgpu-stoney-fails.txt +++ b/drivers/gpu/drm/ci/xfails/amdgpu-stoney-fails.txt @@ -1,27 +1,46 @@ -kms_addfb_basic@bad-pitch-65536,Fail +amdgpu/amd_assr@assr-links,Fail +amdgpu/amd_assr@assr-links-dpms,Fail +amdgpu/amd_deadlock@amdgpu-deadlock-compute,Timeout +amdgpu/amd_ilr@ilr-policy,Fail +amdgpu/amd_mall@static-screen,Crash +amdgpu/amd_mode_switch@mode-switch-first-last-pipe-2,Crash +amdgpu/amd_pci_unplug@amdgpu_hotunplug_simple,Fail +amdgpu/amd_pci_unplug@amdgpu_hotunplug_with_cs,Fail +amdgpu/amd_pci_unplug@amdgpu_hotunplug_with_exported_bo,Fail +amdgpu/amd_plane@mpo-pan-nv12,Fail +amdgpu/amd_plane@mpo-pan-p010,Fail +amdgpu/amd_plane@mpo-pan-rgb,Crash +amdgpu/amd_plane@mpo-scale-nv12,Fail +amdgpu/amd_plane@mpo-scale-p010,Fail +amdgpu/amd_plane@mpo-scale-rgb,Crash +amdgpu/amd_plane@mpo-swizzle-toggle,Fail +amdgpu/amd_uvd_dec@amdgpu_uvd_decode,Fail +amdgpu/amd_vce_dec@amdgpu_cs_vce_destroy,Fail +amdgpu/amd_vce_dec@amdgpu_cs_vce_encode,Fail +amdgpu/amd_vm@amdgpu-vm-unaligned-map,Fail +amdgpu/amd_vrr_range@freesync-parsing,Timeout +device_reset@unbind-cold-reset-rebind,Fail +dumb_buffer@invalid-bpp,Fail kms_addfb_basic@bo-too-small,Fail kms_addfb_basic@too-high,Fail kms_async_flips@async-flip-with-page-flip-events,Fail
Re: [PATCH] drm/amd/amdxcp: Use unique name for partition dev
On 2024-04-30 07:36, Lijo Lazar wrote:
amdxcp is a platform driver for creating partition devices. libdrm
library identifies a platform device based on 'OF_FULLNAME' or
'MODALIAS'. If two or more devices have the same platform name, drm
library only picks the first device. Platform driver core uses name of
the device to populate 'MODALIAS'. When 'amdxcp' is used as the base
name, only first partition device gets identified. Assign unique name so
that drm library identifies partition devices separately.
amdxcp doesn't support probe of partitions, it doesn't bother about
modaliases.
Signed-off-by: Lijo Lazar
Acked-by:JamesZhu
---
drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
b/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
index 90ddd8371176..b4131053b31b 100644
--- a/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
+++ b/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
@@ -50,12 +50,14 @@ int amdgpu_xcp_drm_dev_alloc(struct drm_device **ddev)
{
struct platform_device *pdev;
struct xcp_device *pxcp_dev;
+ char dev_name[20];
int ret;
if (pdev_num >= MAX_XCP_PLATFORM_DEVICE)
return -ENODEV;
- pdev = platform_device_register_simple("amdgpu_xcp", pdev_num, NULL, 0);
+ snprintf(dev_name, sizeof(dev_name), "amdgpu_xcp_%d", pdev_num);
+ pdev = platform_device_register_simple(dev_name, -1, NULL, 0);
if (IS_ERR(pdev))
return PTR_ERR(pdev);
Re: [PATCH v1 4/5] drm/ci: skip driver specific tests
On 30/04/2024 06:11, Vignesh Raman wrote: Skip driver specific tests and skip kms tests for panfrost driver since it is not a kms driver. Signed-off-by: Vignesh Raman --- .../gpu/drm/ci/xfails/amdgpu-stoney-skips.txt | 14 +- drivers/gpu/drm/ci/xfails/i915-amly-skips.txt | 14 +- drivers/gpu/drm/ci/xfails/i915-apl-skips.txt| 14 +- drivers/gpu/drm/ci/xfails/i915-cml-skips.txt| 12 drivers/gpu/drm/ci/xfails/i915-glk-skips.txt| 14 +- drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt| 14 +- drivers/gpu/drm/ci/xfails/i915-tgl-skips.txt| 14 +- drivers/gpu/drm/ci/xfails/i915-whl-skips.txt| 14 +- .../gpu/drm/ci/xfails/mediatek-mt8173-skips.txt | 12 .../gpu/drm/ci/xfails/mediatek-mt8183-skips.txt | 14 ++ drivers/gpu/drm/ci/xfails/meson-g12b-skips.txt | 14 ++ drivers/gpu/drm/ci/xfails/msm-apq8016-skips.txt | 14 ++ drivers/gpu/drm/ci/xfails/msm-apq8096-skips.txt | 14 +- .../msm-sc7180-trogdor-kingoftown-skips.txt | 15 +++ .../msm-sc7180-trogdor-lazor-limozeen-skips.txt | 15 +++ drivers/gpu/drm/ci/xfails/msm-sdm845-skips.txt | 15 +++ .../gpu/drm/ci/xfails/rockchip-rk3288-skips.txt | 17 - .../gpu/drm/ci/xfails/rockchip-rk3399-skips.txt | 15 +++ .../gpu/drm/ci/xfails/virtio_gpu-none-skips.txt | 15 ++- 19 files changed, 260 insertions(+), 10 deletions(-) create mode 100644 drivers/gpu/drm/ci/xfails/mediatek-mt8173-skips.txt create mode 100644 drivers/gpu/drm/ci/xfails/mediatek-mt8183-skips.txt create mode 100644 drivers/gpu/drm/ci/xfails/meson-g12b-skips.txt create mode 100644 drivers/gpu/drm/ci/xfails/msm-apq8016-skips.txt diff --git a/drivers/gpu/drm/ci/xfails/amdgpu-stoney-skips.txt b/drivers/gpu/drm/ci/xfails/amdgpu-stoney-skips.txt index e2c538a0f954..70e2f925d06f 100644 --- a/drivers/gpu/drm/ci/xfails/amdgpu-stoney-skips.txt +++ b/drivers/gpu/drm/ci/xfails/amdgpu-stoney-skips.txt @@ -1,2 +1,14 @@ # Suspend to RAM seems to be broken on this machine -.*suspend.* \ No newline at end of file +.*suspend.* + +# Skip driver specific tests +msm_.* +nouveau_.* +panfrost_.* +^v3d.* +^vc4.* +^vmwgfx* + +# Skip intel specific tests +gem_.* +i915_.* diff --git a/drivers/gpu/drm/ci/xfails/i915-amly-skips.txt b/drivers/gpu/drm/ci/xfails/i915-amly-skips.txt index fe55540a3f9a..59f8acfaa5ba 100644 --- a/drivers/gpu/drm/ci/xfails/i915-amly-skips.txt +++ b/drivers/gpu/drm/ci/xfails/i915-amly-skips.txt @@ -1,4 +1,16 @@ # Suspend to RAM seems to be broken on this machine .*suspend.* # This is generating kernel oops with divide error -kms_plane_scaling@invalid-parameters \ No newline at end of file +kms_plane_scaling@invalid-parameters + +# Skip driver specific tests +^amdgpu.* +msm_.* +nouveau_.* +panfrost_.* +^v3d.* +^vc4.* +^vmwgfx* + +# GEM tests takes ~1000 hours, so skip it +gem_.* diff --git a/drivers/gpu/drm/ci/xfails/i915-apl-skips.txt b/drivers/gpu/drm/ci/xfails/i915-apl-skips.txt index 3430b215c06e..d97bc038b63a 100644 --- a/drivers/gpu/drm/ci/xfails/i915-apl-skips.txt +++ b/drivers/gpu/drm/ci/xfails/i915-apl-skips.txt @@ -3,4 +3,16 @@ # This is generating kernel oops with divide error kms_plane_scaling@invalid-parameters # This is cascading issues -kms_3d \ No newline at end of file +kms_3d + +# Skip driver specific tests +^amdgpu.* +msm_.* +nouveau_.* +panfrost_.* +^v3d.* +^vc4.* +^vmwgfx* + +# GEM tests takes ~1000 hours, so skip it +gem_.* diff --git a/drivers/gpu/drm/ci/xfails/i915-cml-skips.txt b/drivers/gpu/drm/ci/xfails/i915-cml-skips.txt index 6d3d7ddc377f..92c0ffee8283 100644 --- a/drivers/gpu/drm/ci/xfails/i915-cml-skips.txt +++ b/drivers/gpu/drm/ci/xfails/i915-cml-skips.txt @@ -1,2 +1,14 @@ # This is generating kernel oops with divide error kms_plane_scaling@invalid-parameters + +# Skip driver specific tests +^amdgpu.* +msm_.* +nouveau_.* +panfrost_.* +^v3d.* +^vc4.* +^vmwgfx* + +# GEM tests takes ~1000 hours, so skip it +gem_.* diff --git a/drivers/gpu/drm/ci/xfails/i915-glk-skips.txt b/drivers/gpu/drm/ci/xfails/i915-glk-skips.txt index 4c7d00ce14bc..a168722caf13 100644 --- a/drivers/gpu/drm/ci/xfails/i915-glk-skips.txt +++ b/drivers/gpu/drm/ci/xfails/i915-glk-skips.txt @@ -2,4 +2,16 @@ .*suspend.* # This is generating kernel oops with divide error -kms_plane_scaling@invalid-parameters \ No newline at end of file +kms_plane_scaling@invalid-parameters + +# Skip driver specific tests +^amdgpu.* +msm_.* +nouveau_.* +panfrost_.* +^v3d.* +^vc4.* +^vmwgfx* + +# GEM tests takes ~1000 hours, so skip it +gem_.* diff --git a/drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt b/drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt index 4c7d00ce14bc..a168722caf13 100644 --- a/drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt +++ b/drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt @@ -2,4 +2,16 @@
Re: [PATCH v1 3/5] drm/ci: build virtual GPU driver as module
On 30/04/2024 06:11, Vignesh Raman wrote:
With latest IGT, the tests tries to load the module and it
fails. So build the virtual GPU driver for virtio as module.
Signed-off-by: Vignesh Raman
Acked-by: Helen Koike
---
drivers/gpu/drm/ci/build.sh | 1 -
drivers/gpu/drm/ci/igt_runner.sh | 6 +++---
drivers/gpu/drm/ci/image-tags.yml | 4 ++--
drivers/gpu/drm/ci/test.yml | 1 +
drivers/gpu/drm/ci/x86_64.config | 2 +-
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/ci/build.sh b/drivers/gpu/drm/ci/build.sh
index 8a3baa003904..95493df9cdc2 100644
--- a/drivers/gpu/drm/ci/build.sh
+++ b/drivers/gpu/drm/ci/build.sh
@@ -156,7 +156,6 @@ fi
mkdir -p artifacts/install/lib
mv install/* artifacts/install/.
-rm -rf artifacts/install/modules
ln -s common artifacts/install/ci-common
cp .config artifacts/${CI_JOB_NAME}_config
diff --git a/drivers/gpu/drm/ci/igt_runner.sh b/drivers/gpu/drm/ci/igt_runner.sh
index 20026612a9bd..55532f79fbdc 100755
--- a/drivers/gpu/drm/ci/igt_runner.sh
+++ b/drivers/gpu/drm/ci/igt_runner.sh
@@ -30,10 +30,10 @@ case "$DRIVER_NAME" in
export IGT_FORCE_DRIVER="panfrost"
fi
;;
-amdgpu)
+amdgpu|virtio_gpu)
# Cannot use HWCI_KERNEL_MODULES as at that point we don't have the
module in /lib
-mv /install/modules/lib/modules/* /lib/modules/.
-modprobe amdgpu
+mv /install/modules/lib/modules/* /lib/modules/. || true
+modprobe --first-time $DRIVER_NAME
;;
esac
diff --git a/drivers/gpu/drm/ci/image-tags.yml b/drivers/gpu/drm/ci/image-tags.yml
index d8f72b82c938..fd1cb6061166 100644
--- a/drivers/gpu/drm/ci/image-tags.yml
+++ b/drivers/gpu/drm/ci/image-tags.yml
@@ -4,9 +4,9 @@ variables:
DEBIAN_BASE_TAG: "${CONTAINER_TAG}"
DEBIAN_X86_64_BUILD_IMAGE_PATH: "debian/x86_64_build"
- DEBIAN_BUILD_TAG: "2023-10-08-config"
+ DEBIAN_BUILD_TAG: "2024-04-22-virtio"
- KERNEL_ROOTFS_TAG: "2023-10-06-amd"
+ KERNEL_ROOTFS_TAG: "2024-04-22-virtio"
PKG_REPO_REV: "3cc12a2a"
DEBIAN_X86_64_TEST_BASE_IMAGE: "debian/x86_64_test-base"
diff --git a/drivers/gpu/drm/ci/test.yml b/drivers/gpu/drm/ci/test.yml
index 612c9ede3507..864ac3809d84 100644
--- a/drivers/gpu/drm/ci/test.yml
+++ b/drivers/gpu/drm/ci/test.yml
@@ -350,6 +350,7 @@ virtio_gpu:none:
script:
- ln -sf $CI_PROJECT_DIR/install /install
- mv install/bzImage /lava-files/bzImage
+- mkdir -p /lib/modules
- mkdir -p $CI_PROJECT_DIR/results
- ln -sf $CI_PROJECT_DIR/results /results
- install/crosvm-runner.sh install/igt_runner.sh
diff --git a/drivers/gpu/drm/ci/x86_64.config b/drivers/gpu/drm/ci/x86_64.config
index 1cbd49a5b23a..78479f063e8e 100644
--- a/drivers/gpu/drm/ci/x86_64.config
+++ b/drivers/gpu/drm/ci/x86_64.config
@@ -91,7 +91,7 @@ CONFIG_KVM=y
CONFIG_KVM_GUEST=y
CONFIG_VIRT_DRIVERS=y
CONFIG_VIRTIO_FS=y
-CONFIG_DRM_VIRTIO_GPU=y
+CONFIG_DRM_VIRTIO_GPU=m
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_VIRTIO_NET=y
CONFIG_VIRTIO_CONSOLE=y
Re: [PATCH v1 1/5] drm/ci: uprev mesa version
On 30/04/2024 06:11, Vignesh Raman wrote:
zlib.net is not allowing tarball download anymore and results
in below error in kernel+rootfs_arm32 container build,
urllib.error.HTTPError: HTTP Error 403: Forbidden
urllib.error.HTTPError: HTTP Error 415: Unsupported Media Type
Uprev mesa to latest version which includes a fix for this issue.
https://gitlab.freedesktop.org/mesa/mesa/-/commit/908f444e
Also copy helper scripts to install, so that the ci jobs can
use these scripts for logging.
Signed-off-by: Vignesh Raman
Acked-by: Helen Koike
---
drivers/gpu/drm/ci/build.sh | 1 +
drivers/gpu/drm/ci/container.yml | 12
drivers/gpu/drm/ci/gitlab-ci.yml | 11 ---
drivers/gpu/drm/ci/image-tags.yml | 3 ++-
drivers/gpu/drm/ci/test.yml | 2 ++
5 files changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/ci/build.sh b/drivers/gpu/drm/ci/build.sh
index 106f2d40d222..8a3baa003904 100644
--- a/drivers/gpu/drm/ci/build.sh
+++ b/drivers/gpu/drm/ci/build.sh
@@ -128,6 +128,7 @@ fi
# Pass needed files to the test stage
mkdir -p install
cp -rfv .gitlab-ci/* install/.
+cp -rfv ci/* install/.
cp -rfv install/common install/ci-common
cp -rfv drivers/gpu/drm/ci/* install/.
diff --git a/drivers/gpu/drm/ci/container.yml b/drivers/gpu/drm/ci/container.yml
index 9764e7921a4f..d6edf3635b23 100644
--- a/drivers/gpu/drm/ci/container.yml
+++ b/drivers/gpu/drm/ci/container.yml
@@ -36,15 +36,15 @@ debian/android_build:
rules:
- when: never
-debian/x86_64_test-android:
+.debian/x86_64_test-android:
rules:
- when: never
-windows_build_vs2019:
+windows_build_msvc:
rules:
- when: never
-windows_test_vs2019:
+windows_test_msvc:
rules:
- when: never
@@ -56,10 +56,6 @@ rustfmt:
rules:
- when: never
-windows_vs2019:
- rules:
-- when: never
-
-clang-format:
+windows_msvc:
rules:
- when: never
\ No newline at end of file
diff --git a/drivers/gpu/drm/ci/gitlab-ci.yml b/drivers/gpu/drm/ci/gitlab-ci.yml
index 084e3ff8e3f4..9bf5190604a7 100644
--- a/drivers/gpu/drm/ci/gitlab-ci.yml
+++ b/drivers/gpu/drm/ci/gitlab-ci.yml
@@ -1,6 +1,6 @@
variables:
DRM_CI_PROJECT_PATH: mesa/mesa
- DRM_CI_COMMIT_SHA:
9d162de9a05155e1c4041857a5848842749164cf
+ DRM_CI_COMMIT_SHA:
e5f133ccc426a197c48a4e88f5377f943f078180
UPSTREAM_REPO: git://anongit.freedesktop.org/drm/drm
TARGET_BRANCH: drm-next
@@ -26,10 +26,13 @@ variables:
JOB_ARTIFACTS_BASE: ${PIPELINE_ARTIFACTS_BASE}/${CI_JOB_ID}
# default kernel for rootfs before injecting the current kernel tree
KERNEL_REPO: "gfx-ci/linux"
- KERNEL_TAG: "v6.6.4-for-mesa-ci-e4f4c500f7fb"
+ KERNEL_TAG: "v6.6.21-mesa-19fc"
KERNEL_IMAGE_BASE: https://${S3_HOST}/mesa-lava/${KERNEL_REPO}/${KERNEL_TAG}
LAVA_TAGS: subset-1-gfx
LAVA_JOB_PRIORITY: 30
+ ARTIFACTS_BASE_URL:
https://${CI_PROJECT_ROOT_NAMESPACE}.${CI_PAGES_DOMAIN}/-/${CI_PROJECT_NAME}/-/jobs/${CI_JOB_ID}/artifacts
+ # Python scripts for structured logger
+ PYTHONPATH: "$PYTHONPATH:$CI_PROJECT_DIR/install"
default:
before_script:
@@ -46,6 +49,7 @@ default:
- cd $CI_PROJECT_DIR
- curl --output -
$DRM_CI_PROJECT_URL/-/archive/$DRM_CI_COMMIT_SHA/mesa-$DRM_CI_COMMIT_SHA.tar.gz
| tar -xz
- mv mesa-$DRM_CI_COMMIT_SHA/.gitlab-ci* .
+- mv mesa-$DRM_CI_COMMIT_SHA/bin/ci .
- rm -rf mesa-$DRM_CI_COMMIT_SHA/
- echo -e "\e[0Ksection_end:$(date +%s):drm_ci_download_section\r\e[0K"
@@ -98,6 +102,7 @@ include:
stages:
- sanity
- container
+ - code-validation
- git-archive
- build
- amdgpu
@@ -107,7 +112,6 @@ stages:
- msm
- rockchip
- virtio-gpu
- - lint
# YAML anchors for rule conditions
#
@@ -218,6 +222,7 @@ make git archive:
script:
# Remove drm-ci files we just added
- rm -rf .gitlab-ci.*
+- rm -rf ci
# Compactify the .git directory
- git gc --aggressive
diff --git a/drivers/gpu/drm/ci/image-tags.yml
b/drivers/gpu/drm/ci/image-tags.yml
index 7ab4f2514da8..d8f72b82c938 100644
--- a/drivers/gpu/drm/ci/image-tags.yml
+++ b/drivers/gpu/drm/ci/image-tags.yml
@@ -1,5 +1,5 @@
variables:
- CONTAINER_TAG: "2023-10-11-mesa-uprev"
+ CONTAINER_TAG: "2024-04-22-mesa-uprev"
DEBIAN_X86_64_BUILD_BASE_IMAGE: "debian/x86_64_build-base"
DEBIAN_BASE_TAG: "${CONTAINER_TAG}"
@@ -7,6 +7,7 @@ variables:
DEBIAN_BUILD_TAG: "2023-10-08-config"
KERNEL_ROOTFS_TAG: "2023-10-06-amd"
+ PKG_REPO_REV: "3cc12a2a"
DEBIAN_X86_64_TEST_BASE_IMAGE: "debian/x86_64_test-base"
DEBIAN_X86_64_TEST_IMAGE_GL_PATH: "debian/x86_64_test-gl"
diff --git a/drivers/gpu/drm/ci/test.yml b/drivers/gpu/drm/ci/test.yml
index 8bc63912fddb..612c9ede3507 100644
--- a/drivers/gpu/drm/ci/test.yml
+++ b/drivers/gpu/drm/ci/test.yml
@@ -150,6 +150,8 @@ msm:sdm845:
BM_KERNEL:
[PATCH] drm/amdgpu: avoid reading vf2pf info size from FB
VF can't access FB when host is doing mode1 reset. Using sizeof to get vf2pf info size, instead of reading it from vf2pf header stored in FB. Signed-off-by: Zhigang Luo --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c index 54ab51a4ada7..c84d2217005e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c @@ -583,7 +583,7 @@ static int amdgpu_virt_write_vf2pf_data(struct amdgpu_device *adev) } vf2pf_info->checksum = amd_sriov_msg_checksum( - vf2pf_info, vf2pf_info->header.size, 0, 0); + vf2pf_info, sizeof(struct amd_sriov_msg_vf2pf_info), 0, 0); return 0; } -- 2.25.1
[PATCH] drm/amdgpu: update vf to pf message retry from 2 to 5
increase retry times to wait host has enough time to complete reset.
Signed-off-by: Zhigang Luo
---
drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
index 89992c1c9a62..8b0ab075b728 100644
--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
@@ -181,7 +181,7 @@ static int xgpu_nv_send_access_requests_with_param(struct
amdgpu_device *adev,
if (event != -1) {
r = xgpu_nv_poll_msg(adev, event);
if (r) {
- if (retry++ < 2)
+ if (retry++ < 5)
goto send_request;
if (req != IDH_REQ_GPU_INIT_DATA) {
--
2.25.1
Re: [PATCH] drm/amdgpu/mes11: fix kiq ring ready flag
On Tue, Apr 30, 2024 at 2:42 AM Jack Xiao wrote:
>
> kiq ring test has overwitten ready flag,
> need disable after gfx hw init.
>
> Signed-off-by: Jack Xiao
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> index d98f6d282ae7..8263b97c4466 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> @@ -1326,7 +1326,7 @@ static int mes_v11_0_hw_init(void *handle)
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> if (adev->mes.ring.sched.ready)
> - return 0;
> + goto out;
>
> if (!adev->enable_mes_kiq) {
> if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) {
> @@ -1363,6 +1363,7 @@ static int mes_v11_0_hw_init(void *handle)
> goto failure;
> }
>
> +out:
> /*
> * Disable KIQ ring usage from the driver once MES is enabled.
> * MES uses KIQ ring exclusively so driver cannot access KIQ ring
> --
> 2.41.0
>
Re: [PATCH] drm/amd/amdxcp: Use unique name for partition dev
Am 30.04.24 um 13:36 schrieb Lijo Lazar:
amdxcp is a platform driver for creating partition devices. libdrm
library identifies a platform device based on 'OF_FULLNAME' or
'MODALIAS'. If two or more devices have the same platform name, drm
library only picks the first device. Platform driver core uses name of
the device to populate 'MODALIAS'. When 'amdxcp' is used as the base
name, only first partition device gets identified. Assign unique name so
that drm library identifies partition devices separately.
amdxcp doesn't support probe of partitions, it doesn't bother about
modaliases.
Signed-off-by: Lijo Lazar
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
b/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
index 90ddd8371176..b4131053b31b 100644
--- a/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
+++ b/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
@@ -50,12 +50,14 @@ int amdgpu_xcp_drm_dev_alloc(struct drm_device **ddev)
{
struct platform_device *pdev;
struct xcp_device *pxcp_dev;
+ char dev_name[20];
int ret;
if (pdev_num >= MAX_XCP_PLATFORM_DEVICE)
return -ENODEV;
- pdev = platform_device_register_simple("amdgpu_xcp", pdev_num, NULL, 0);
+ snprintf(dev_name, sizeof(dev_name), "amdgpu_xcp_%d", pdev_num);
+ pdev = platform_device_register_simple(dev_name, -1, NULL, 0);
if (IS_ERR(pdev))
return PTR_ERR(pdev);
Re: [PATCH] drm/amd/display: Override DCN410 IP version
[AMD Official Use Only - General] Thanks for the review! Just sent a v2 From: Wentland, Harry Sent: Tuesday, April 30, 2024 9:36 AM To: Pillai, Aurabindo ; amd-gfx@lists.freedesktop.org Cc: Siqueira, Rodrigo ; Deucher, Alexander Subject: Re: [PATCH] drm/amd/display: Override DCN410 IP version On 2024-04-30 09:23, Aurabindo Pillai wrote: > Override DCN IP version to 4.0.1 from 4.1.0 temporarily until change is > made in DC codebase to use 4.1.0 > > Signed-off-by: Aurabindo Pillai > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > index 2aad1ba0ab9d..87a2f15c8a64 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > @@ -1965,6 +1965,11 @@ static int > amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev) >case IP_VERSION(3, 2, 1): >case IP_VERSION(3, 5, 0): >case IP_VERSION(3, 5, 1): > + case IP_VERSION(4, 1, 0): Doesn't this do more than override? Doesn't this enable IP creation for DCN 4.1.0 in the first place? It might make sense to split this into a separate patch as it sounds like we'll want to revert the override at some point in the future but not the IP creation. Harry > + /* TODO: Fix IP version. DC code expects version 4.0.1 > */ > + if (adev->ip_versions[DCE_HWIP][0] == IP_VERSION(4, 1, > 0)) > + adev->ip_versions[DCE_HWIP][0] = > IP_VERSION(4, 0, 1); > + >if (amdgpu_sriov_vf(adev)) >amdgpu_discovery_set_sriov_display(adev); >else
[PATCH v2 1/2] drm/amd/display: Enable DCN410 init
Enable initializing Display Manager for DCN410 IP Signed-off-by: Aurabindo Pillai --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c index 2aad1ba0ab9d..d7f948e84e4f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c @@ -1965,6 +1965,7 @@ static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev) case IP_VERSION(3, 2, 1): case IP_VERSION(3, 5, 0): case IP_VERSION(3, 5, 1): + case IP_VERSION(4, 1, 0): if (amdgpu_sriov_vf(adev)) amdgpu_discovery_set_sriov_display(adev); else -- 2.44.0
[PATCH v2 2/2] drm/amd/display: Override DCN410 IP version
Override DCN IP version to 4.0.1 from 4.1.0 temporarily until change is made in DC codebase to use 4.1.0 Signed-off-by: Aurabindo Pillai --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c index d7f948e84e4f..87a2f15c8a64 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c @@ -1966,6 +1966,10 @@ static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev) case IP_VERSION(3, 5, 0): case IP_VERSION(3, 5, 1): case IP_VERSION(4, 1, 0): + /* TODO: Fix IP version. DC code expects version 4.0.1 */ + if (adev->ip_versions[DCE_HWIP][0] == IP_VERSION(4, 1, 0)) + adev->ip_versions[DCE_HWIP][0] = IP_VERSION(4, 0, 1); + if (amdgpu_sriov_vf(adev)) amdgpu_discovery_set_sriov_display(adev); else -- 2.44.0
Re: [PATCH] drm/amd/display: Override DCN410 IP version
On 2024-04-30 09:23, Aurabindo Pillai wrote: > Override DCN IP version to 4.0.1 from 4.1.0 temporarily until change is > made in DC codebase to use 4.1.0 > > Signed-off-by: Aurabindo Pillai > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > index 2aad1ba0ab9d..87a2f15c8a64 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > @@ -1965,6 +1965,11 @@ static int > amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev) > case IP_VERSION(3, 2, 1): > case IP_VERSION(3, 5, 0): > case IP_VERSION(3, 5, 1): > + case IP_VERSION(4, 1, 0): Doesn't this do more than override? Doesn't this enable IP creation for DCN 4.1.0 in the first place? It might make sense to split this into a separate patch as it sounds like we'll want to revert the override at some point in the future but not the IP creation. Harry > + /* TODO: Fix IP version. DC code expects version 4.0.1 > */ > + if (adev->ip_versions[DCE_HWIP][0] == IP_VERSION(4, 1, > 0)) > + adev->ip_versions[DCE_HWIP][0] = > IP_VERSION(4, 0, 1); > + > if (amdgpu_sriov_vf(adev)) > amdgpu_discovery_set_sriov_display(adev); > else
RE: [PATCH] drm/amd/amdxcp: Use unique name for partition dev
[AMD Official Use Only - General]
Reviewed-by: Asad Kamal
Thanks & Regards
Asad
-Original Message-
From: amd-gfx On Behalf Of Lijo Lazar
Sent: Tuesday, April 30, 2024 5:06 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
; Koenig, Christian ; Zhu,
James
Subject: [PATCH] drm/amd/amdxcp: Use unique name for partition dev
amdxcp is a platform driver for creating partition devices. libdrm library
identifies a platform device based on 'OF_FULLNAME' or 'MODALIAS'. If two or
more devices have the same platform name, drm library only picks the first
device. Platform driver core uses name of the device to populate 'MODALIAS'.
When 'amdxcp' is used as the base name, only first partition device gets
identified. Assign unique name so that drm library identifies partition devices
separately.
amdxcp doesn't support probe of partitions, it doesn't bother about modaliases.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
b/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
index 90ddd8371176..b4131053b31b 100644
--- a/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
+++ b/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
@@ -50,12 +50,14 @@ int amdgpu_xcp_drm_dev_alloc(struct drm_device **ddev) {
struct platform_device *pdev;
struct xcp_device *pxcp_dev;
+ char dev_name[20];
int ret;
if (pdev_num >= MAX_XCP_PLATFORM_DEVICE)
return -ENODEV;
- pdev = platform_device_register_simple("amdgpu_xcp", pdev_num, NULL, 0);
+ snprintf(dev_name, sizeof(dev_name), "amdgpu_xcp_%d", pdev_num);
+ pdev = platform_device_register_simple(dev_name, -1, NULL, 0);
if (IS_ERR(pdev))
return PTR_ERR(pdev);
--
2.25.1
[PATCH] drm/amd/display: Override DCN410 IP version
Override DCN IP version to 4.0.1 from 4.1.0 temporarily until change is made in DC codebase to use 4.1.0 Signed-off-by: Aurabindo Pillai --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c index 2aad1ba0ab9d..87a2f15c8a64 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c @@ -1965,6 +1965,11 @@ static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev) case IP_VERSION(3, 2, 1): case IP_VERSION(3, 5, 0): case IP_VERSION(3, 5, 1): + case IP_VERSION(4, 1, 0): + /* TODO: Fix IP version. DC code expects version 4.0.1 */ + if (adev->ip_versions[DCE_HWIP][0] == IP_VERSION(4, 1, 0)) + adev->ip_versions[DCE_HWIP][0] = IP_VERSION(4, 0, 1); + if (amdgpu_sriov_vf(adev)) amdgpu_discovery_set_sriov_display(adev); else -- 2.44.0
Re: [PATCH] drm/amd/amdxcp: Use unique name for partition dev
On Tue, Apr 30, 2024 at 8:32 AM Lijo Lazar wrote:
>
> amdxcp is a platform driver for creating partition devices. libdrm
> library identifies a platform device based on 'OF_FULLNAME' or
> 'MODALIAS'. If two or more devices have the same platform name, drm
> library only picks the first device. Platform driver core uses name of
> the device to populate 'MODALIAS'. When 'amdxcp' is used as the base
> name, only first partition device gets identified. Assign unique name so
> that drm library identifies partition devices separately.
>
> amdxcp doesn't support probe of partitions, it doesn't bother about
> modaliases.
>
> Signed-off-by: Lijo Lazar
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
> b/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
> index 90ddd8371176..b4131053b31b 100644
> --- a/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
> +++ b/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
> @@ -50,12 +50,14 @@ int amdgpu_xcp_drm_dev_alloc(struct drm_device **ddev)
> {
> struct platform_device *pdev;
> struct xcp_device *pxcp_dev;
> + char dev_name[20];
> int ret;
>
> if (pdev_num >= MAX_XCP_PLATFORM_DEVICE)
> return -ENODEV;
>
> - pdev = platform_device_register_simple("amdgpu_xcp", pdev_num, NULL,
> 0);
> + snprintf(dev_name, sizeof(dev_name), "amdgpu_xcp_%d", pdev_num);
> + pdev = platform_device_register_simple(dev_name, -1, NULL, 0);
> if (IS_ERR(pdev))
> return PTR_ERR(pdev);
>
> --
> 2.25.1
>
RE: [PATCH 2/2] drm/amdgpu/pm: Fix uninitialized variable warning
[AMD Official Use Only - General]
Series is
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: Ma, Jun
Sent: Sunday, April 28, 2024 5:55 PM
To: amd-gfx@lists.freedesktop.org
Cc: Feng, Kenneth ; Deucher, Alexander
; Wang, Yang(Kevin) ;
Koenig, Christian ; Ma, Jun
Subject: [PATCH 2/2] drm/amdgpu/pm: Fix uninitialized variable warning
Check return value of smum_send_msg_to_smc to fix uninitialized variable varning
Signed-off-by: Ma Jun
---
.../drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c | 21 ++-
.../drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 8 +--
.../drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c | 6 --
.../drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c | 6 --
4 files changed, 30 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
index 0b181bc8931c..f62381b189ad 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
@@ -1554,7 +1554,10 @@ static int smu10_set_fine_grain_clk_vol(struct pp_hwmgr
*hwmgr,
}
if (input[0] == 0) {
- smum_send_msg_to_smc(hwmgr,
PPSMC_MSG_GetMinGfxclkFrequency, _freq);
+ ret = smum_send_msg_to_smc(hwmgr,
PPSMC_MSG_GetMinGfxclkFrequency, _freq);
+ if (ret)
+ return ret;
+
if (input[1] < min_freq) {
pr_err("Fine grain setting minimum sclk (%ld)
MHz is less than the minimum allowed (%d) MHz\n",
input[1], min_freq);
@@ -1562,7 +1565,10 @@ static int smu10_set_fine_grain_clk_vol(struct pp_hwmgr
*hwmgr,
}
smu10_data->gfx_actual_soft_min_freq = input[1];
} else if (input[0] == 1) {
- smum_send_msg_to_smc(hwmgr,
PPSMC_MSG_GetMaxGfxclkFrequency, _freq);
+ ret = smum_send_msg_to_smc(hwmgr,
PPSMC_MSG_GetMaxGfxclkFrequency, _freq);
+ if (ret)
+ return ret;
+
if (input[1] > max_freq) {
pr_err("Fine grain setting maximum sclk (%ld)
MHz is greater than the maximum allowed (%d) MHz\n",
input[1], max_freq);
@@ -1577,10 +1583,15 @@ static int smu10_set_fine_grain_clk_vol(struct pp_hwmgr
*hwmgr,
pr_err("Input parameter number not correct\n");
return -EINVAL;
}
- smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency,
_freq);
- smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxGfxclkFrequency,
_freq);
-
+ ret = smum_send_msg_to_smc(hwmgr,
PPSMC_MSG_GetMinGfxclkFrequency, _freq);
+ if (ret)
+ return ret;
smu10_data->gfx_actual_soft_min_freq = min_freq;
+
+ ret = smum_send_msg_to_smc(hwmgr,
PPSMC_MSG_GetMaxGfxclkFrequency, _freq);
+ if (ret)
+ return ret;
+
smu10_data->gfx_actual_soft_max_freq = max_freq;
} else if (type == PP_OD_COMMIT_DPM_TABLE) {
if (size != 0) {
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
index 74a33b9ace6c..c60666f64601 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
@@ -2486,9 +2486,13 @@ static int
vega10_populate_and_upload_avfs_fuse_override(struct pp_hwmgr *hwmgr)
struct vega10_hwmgr *data = hwmgr->backend;
AvfsFuseOverride_t *avfs_fuse_table =
&(data->smc_state_table.avfs_fuse_override_table);
- smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, );
+ result = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32,
);
+ if (result)
+ return result;
- smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, );
+ result = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32,
);
+ if (result)
+ return result;
serial_number = ((uint64_t)bottom32 << 32) | top32;
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c
index c223e3a6bfca..9dd407134770 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c
@@ -364,8 +364,10 @@ static void vega12_init_dpm_defaults(struct pp_hwmgr
*hwmgr)
}
/* Get the SN to turn into a Unique ID */
- smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, );
- smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, );
+ if
[PATCH] drm/amd/amdxcp: Use unique name for partition dev
amdxcp is a platform driver for creating partition devices. libdrm
library identifies a platform device based on 'OF_FULLNAME' or
'MODALIAS'. If two or more devices have the same platform name, drm
library only picks the first device. Platform driver core uses name of
the device to populate 'MODALIAS'. When 'amdxcp' is used as the base
name, only first partition device gets identified. Assign unique name so
that drm library identifies partition devices separately.
amdxcp doesn't support probe of partitions, it doesn't bother about
modaliases.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
b/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
index 90ddd8371176..b4131053b31b 100644
--- a/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
+++ b/drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.c
@@ -50,12 +50,14 @@ int amdgpu_xcp_drm_dev_alloc(struct drm_device **ddev)
{
struct platform_device *pdev;
struct xcp_device *pxcp_dev;
+ char dev_name[20];
int ret;
if (pdev_num >= MAX_XCP_PLATFORM_DEVICE)
return -ENODEV;
- pdev = platform_device_register_simple("amdgpu_xcp", pdev_num, NULL, 0);
+ snprintf(dev_name, sizeof(dev_name), "amdgpu_xcp_%d", pdev_num);
+ pdev = platform_device_register_simple(dev_name, -1, NULL, 0);
if (IS_ERR(pdev))
return PTR_ERR(pdev);
--
2.25.1
Re: [PATCH v9 03/14] drm/amdgpu: add new IOCTL for usermode queue
Am 26.04.24 um 15:47 schrieb Shashank Sharma:
This patch adds:
- A new IOCTL function to create and destroy
- A new structure to keep all the user queue data in one place.
- A function to generate unique index for the queue.
V1: Worked on review comments from RFC patch series:
- Alex: Keep a list of queues, instead of single queue per process.
- Christian: Use the queue manager instead of global ptrs,
Don't keep the queue structure in amdgpu_ctx
V2: Worked on review comments:
- Christian:
- Formatting of text
- There is no need for queuing of userqueues, with idr in place
- Alex:
- Remove use_doorbell, its unnecessary
- Reuse amdgpu_mqd_props for saving mqd fields
- Code formatting and re-arrangement
V3:
- Integration with doorbell manager
V4:
- Accommodate MQD union related changes in UAPI (Alex)
- Do not set the queue size twice (Bas)
V5:
- Remove wrapper functions for queue indexing (Christian)
- Do not save the queue id/idr in queue itself (Christian)
- Move the idr allocation in the IP independent generic space
(Christian)
V6:
- Check the validity of input IP type (Christian)
V7:
- Move uq_func from uq_mgr to adev (Alex)
- Add missing free(queue) for error cases (Yifan)
V9:
- Rebase
Cc: Alex Deucher
Cc: Christian Koenig
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 121 ++
.../gpu/drm/amd/include/amdgpu_userqueue.h| 2 +
3 files changed, 124 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 374970984a61..acee1c279abb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -2916,6 +2916,7 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_VA, amdgpu_gem_va_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_OP, amdgpu_gem_op_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_USERPTR, amdgpu_gem_userptr_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(AMDGPU_USERQ, amdgpu_userq_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
};
static const struct drm_driver amdgpu_kms_driver = {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
index effc0c7c02cf..df97b856f891 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
@@ -23,6 +23,127 @@
*/
#include "amdgpu.h"
+#include "amdgpu_vm.h"
+#include "amdgpu_userqueue.h"
+
+static struct amdgpu_usermode_queue *
+amdgpu_userqueue_find(struct amdgpu_userq_mgr *uq_mgr, int qid)
+{
+ return idr_find(_mgr->userq_idr, qid);
+}
+
+static int
+amdgpu_userqueue_destroy(struct drm_file *filp, int queue_id)
+{
+ struct amdgpu_fpriv *fpriv = filp->driver_priv;
+ struct amdgpu_userq_mgr *uq_mgr = >userq_mgr;
+ struct amdgpu_device *adev = uq_mgr->adev;
+ const struct amdgpu_userq_funcs *uq_funcs;
+ struct amdgpu_usermode_queue *queue;
+
+ mutex_lock(_mgr->userq_mutex);
+
+ queue = amdgpu_userqueue_find(uq_mgr, queue_id);
+ if (!queue) {
+ DRM_DEBUG_DRIVER("Invalid queue id to destroy\n");
+ mutex_unlock(_mgr->userq_mutex);
+ return -EINVAL;
+ }
+
+ uq_funcs = adev->userq_funcs[queue->queue_type];
+ uq_funcs->mqd_destroy(uq_mgr, queue);
+ idr_remove(_mgr->userq_idr, queue_id);
+ kfree(queue);
+
+ mutex_unlock(_mgr->userq_mutex);
+ return 0;
+}
+
+static int
+amdgpu_userqueue_create(struct drm_file *filp, union drm_amdgpu_userq *args)
+{
+ struct amdgpu_fpriv *fpriv = filp->driver_priv;
+ struct amdgpu_userq_mgr *uq_mgr = >userq_mgr;
+ struct amdgpu_device *adev = uq_mgr->adev;
+ const struct amdgpu_userq_funcs *uq_funcs;
+ struct amdgpu_usermode_queue *queue;
+ int qid, r = 0;
+
+ /* Usermode queues are only supported for GFX/SDMA engines as of now */
+ if (args->in.ip_type != AMDGPU_HW_IP_GFX) {
+ DRM_ERROR("Usermode queue doesn't support IP type %u\n",
args->in.ip_type);
+ return -EINVAL;
+ }
+
+ mutex_lock(_mgr->userq_mutex);
+
+ uq_funcs = adev->userq_funcs[args->in.ip_type];
+ if (!uq_funcs) {
+ DRM_ERROR("Usermode queue is not supported for this IP (%u)\n",
args->in.ip_type);
+ r = -EINVAL;
+ goto unlock;
+ }
+
+ queue = kzalloc(sizeof(struct amdgpu_usermode_queue), GFP_KERNEL);
+ if (!queue) {
+ DRM_ERROR("Failed to allocate memory for queue\n");
+ r = -ENOMEM;
+ goto unlock;
+ }
+ queue->doorbell_handle = args->in.doorbell_handle;
+ queue->doorbell_index = args->in.doorbell_offset;
+
Re: [PATCH v1 2/5] drm/ci: generate testlist from build
On Tue, Apr 30, 2024 at 02:41:18PM +0530, Vignesh Raman wrote:
> Stop vendoring the testlist into the kernel. Instead, use the
> testlist from the IGT build to ensure we do not miss renamed
> or newly added tests.
>
> Signed-off-by: Vignesh Raman
> ---
> drivers/gpu/drm/ci/build-igt.sh | 23 +
> drivers/gpu/drm/ci/igt_runner.sh |9 +-
> drivers/gpu/drm/ci/testlist.txt | 2761 --
> 3 files changed, 28 insertions(+), 2765 deletions(-)
> delete mode 100644 drivers/gpu/drm/ci/testlist.txt
>
> diff --git a/drivers/gpu/drm/ci/build-igt.sh b/drivers/gpu/drm/ci/build-igt.sh
> index 500fa4f5c30a..cedc62baba1e 100644
> --- a/drivers/gpu/drm/ci/build-igt.sh
> +++ b/drivers/gpu/drm/ci/build-igt.sh
> @@ -26,6 +26,29 @@ meson build $MESON_OPTIONS $EXTRA_MESON_ARGS
> ninja -C build -j${FDO_CI_CONCURRENT:-4} || ninja -C build -j 1
> ninja -C build install
>
> +set +ex
> +export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/igt/lib64
> +while read -r line; do
> +if [ "$line" = "TESTLIST" ] || [ "$line" = "END TESTLIST" ]; then
> +continue
> +fi
> +
> +tests=$(echo "$line" | tr ' ' '\n')
> +
> +for test in $tests; do
> +output=$(/igt/libexec/igt-gpu-tools/"$test" --list-subtests)
> +
> +if [ -z "$output" ]; then
> +echo "$test"
> +else
> +echo "$output" | while read -r subtest; do
> +echo "$test@$subtest"
> +done
> +fi
> +done
> +done < /igt/libexec/igt-gpu-tools/test-list.txt >
> /igt/libexec/igt-gpu-tools/testlist.txt
> +set -ex
Is the list in sync between x86 and arm/arm64 IGT builds? Is there a
chance of having a safety net here?
> +
> mkdir -p artifacts/
> tar -cf artifacts/igt.tar /igt
>
> diff --git a/drivers/gpu/drm/ci/igt_runner.sh
> b/drivers/gpu/drm/ci/igt_runner.sh
> index f1a08b9b146f..20026612a9bd 100755
> --- a/drivers/gpu/drm/ci/igt_runner.sh
> +++ b/drivers/gpu/drm/ci/igt_runner.sh
> @@ -59,25 +59,26 @@ fi
>
> curl -L --retry 4 -f --retry-all-errors --retry-delay 60 -s
> ${FDO_HTTP_CACHE_URI:-}$PIPELINE_ARTIFACTS_BASE/$ARCH/igt.tar.gz | tar --zstd
> -v -x -C /
>
> +TESTLIST="/igt/libexec/igt-gpu-tools/testlist.txt"
>
> # If the job is parallel at the gitab job level, take the corresponding
> fraction
> # of the caselist.
> if [ -n "$CI_NODE_INDEX" ]; then
> -sed -ni $CI_NODE_INDEX~$CI_NODE_TOTAL"p" /install/testlist.txt
> +sed -ni $CI_NODE_INDEX~$CI_NODE_TOTAL"p" $TESTLIST
> fi
>
> # core_getversion checks if the driver is loaded and probed correctly
> # so run it in all shards
> -if ! grep -q "core_getversion" /install/testlist.txt; then
> +if ! grep -q "core_getversion" $TESTLIST; then
> # Add the line to the file
> -echo "core_getversion" >> /install/testlist.txt
> +echo "core_getversion" >> $TESTLIST
> fi
>
> set +e
> igt-runner \
> run \
> --igt-folder /igt/libexec/igt-gpu-tools \
> ---caselist /install/testlist.txt \
> +--caselist $TESTLIST \
> --output /results \
> $IGT_SKIPS \
> $IGT_FLAKES \
--
With best wishes
Dmitry
Re: [PATCH v1 5/5] drm/ci: update xfails for the new testlist
On Tue, Apr 30, 2024 at 02:41:21PM +0530, Vignesh Raman wrote: > Now the testlist is used from IGT build, so update > xfails with the new testlist. > > Signed-off-by: Vignesh Raman > --- > .../gpu/drm/ci/xfails/amdgpu-stoney-fails.txt | 47 +++ > .../drm/ci/xfails/amdgpu-stoney-flakes.txt| 8 +- > .../gpu/drm/ci/xfails/amdgpu-stoney-skips.txt | 15 > drivers/gpu/drm/ci/xfails/i915-amly-fails.txt | 22 - > .../gpu/drm/ci/xfails/i915-amly-flakes.txt| 8 ++ > drivers/gpu/drm/ci/xfails/i915-amly-skips.txt | 8 ++ > drivers/gpu/drm/ci/xfails/i915-apl-fails.txt | 45 +- > drivers/gpu/drm/ci/xfails/i915-apl-flakes.txt | 5 ++ > drivers/gpu/drm/ci/xfails/i915-apl-skips.txt | 12 +++ > drivers/gpu/drm/ci/xfails/i915-cml-fails.txt | 26 +- > drivers/gpu/drm/ci/xfails/i915-cml-flakes.txt | 6 ++ > drivers/gpu/drm/ci/xfails/i915-cml-skips.txt | 8 ++ > drivers/gpu/drm/ci/xfails/i915-glk-fails.txt | 28 +-- > drivers/gpu/drm/ci/xfails/i915-glk-skips.txt | 12 +++ > drivers/gpu/drm/ci/xfails/i915-kbl-fails.txt | 39 - > drivers/gpu/drm/ci/xfails/i915-kbl-flakes.txt | 10 ++- > drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt | 21 + > drivers/gpu/drm/ci/xfails/i915-tgl-fails.txt | 75 + > drivers/gpu/drm/ci/xfails/i915-tgl-skips.txt | 13 +++ > drivers/gpu/drm/ci/xfails/i915-whl-fails.txt | 46 +-- > drivers/gpu/drm/ci/xfails/i915-whl-skips.txt | 8 ++ > .../drm/ci/xfails/mediatek-mt8173-fails.txt | 47 +++ > .../drm/ci/xfails/mediatek-mt8183-fails.txt | 17 +--- > .../drm/ci/xfails/mediatek-mt8183-flakes.txt | 5 ++ > .../gpu/drm/ci/xfails/meson-g12b-fails.txt| 20 + > .../gpu/drm/ci/xfails/meson-g12b-flakes.txt | 5 ++ > .../gpu/drm/ci/xfails/msm-apq8016-fails.txt | 26 ++ > .../gpu/drm/ci/xfails/msm-apq8016-flakes.txt | 5 ++ > .../gpu/drm/ci/xfails/msm-apq8096-fails.txt | 5 +- > .../gpu/drm/ci/xfails/msm-apq8096-flakes.txt | 5 ++ > .../gpu/drm/ci/xfails/msm-apq8096-skips.txt | 67 +++ > .../msm-sc7180-trogdor-kingoftown-fails.txt | 34 > .../msm-sc7180-trogdor-kingoftown-flakes.txt | 5 ++ > ...sm-sc7180-trogdor-lazor-limozeen-fails.txt | 34 > ...m-sc7180-trogdor-lazor-limozeen-flakes.txt | 5 ++ > .../gpu/drm/ci/xfails/msm-sdm845-fails.txt| 75 - > .../gpu/drm/ci/xfails/msm-sdm845-flakes.txt | 26 ++ > .../drm/ci/xfails/rockchip-rk3288-fails.txt | 54 > .../drm/ci/xfails/rockchip-rk3399-fails.txt | 80 ++ > .../drm/ci/xfails/rockchip-rk3399-flakes.txt | 7 -- > .../drm/ci/xfails/virtio_gpu-none-fails.txt | 82 +-- > .../drm/ci/xfails/virtio_gpu-none-skips.txt | 3 + > 42 files changed, 574 insertions(+), 495 deletions(-) > create mode 100644 drivers/gpu/drm/ci/xfails/i915-amly-flakes.txt > create mode 100644 drivers/gpu/drm/ci/xfails/i915-apl-flakes.txt > create mode 100644 drivers/gpu/drm/ci/xfails/i915-cml-flakes.txt > create mode 100644 drivers/gpu/drm/ci/xfails/mediatek-mt8183-flakes.txt > create mode 100644 drivers/gpu/drm/ci/xfails/meson-g12b-flakes.txt > create mode 100644 drivers/gpu/drm/ci/xfails/msm-apq8016-flakes.txt > create mode 100644 drivers/gpu/drm/ci/xfails/msm-apq8096-flakes.txt > create mode 100644 > drivers/gpu/drm/ci/xfails/msm-sc7180-trogdor-kingoftown-flakes.txt > create mode 100644 > drivers/gpu/drm/ci/xfails/msm-sc7180-trogdor-lazor-limozeen-flakes.txt > delete mode 100644 drivers/gpu/drm/ci/xfails/rockchip-rk3288-fails.txt > delete mode 100644 drivers/gpu/drm/ci/xfails/rockchip-rk3399-flakes.txt > [skipped] > diff --git a/drivers/gpu/drm/ci/xfails/msm-apq8016-fails.txt > b/drivers/gpu/drm/ci/xfails/msm-apq8016-fails.txt > index 44a5c62dedad..96e9faf0e607 100644 > --- a/drivers/gpu/drm/ci/xfails/msm-apq8016-fails.txt > +++ b/drivers/gpu/drm/ci/xfails/msm-apq8016-fails.txt > @@ -1,19 +1,9 @@ > +core_setmaster_vs_auth,Fail > +device_reset,Fail > +dumb_buffer,Fail This doesn't look correct, core tests should be passing. > kms_3d,Fail > -kms_addfb_basic@addfb25-bad-modifier,Fail > -kms_cursor_legacy@all-pipes-forked-bo,Fail > -kms_cursor_legacy@all-pipes-forked-move,Fail > -kms_cursor_legacy@all-pipes-single-bo,Fail > -kms_cursor_legacy@all-pipes-single-move,Fail > -kms_cursor_legacy@all-pipes-torture-bo,Fail > -kms_cursor_legacy@all-pipes-torture-move,Fail > -kms_cursor_legacy@pipe-A-forked-bo,Fail > -kms_cursor_legacy@pipe-A-forked-move,Fail > -kms_cursor_legacy@pipe-A-single-bo,Fail > -kms_cursor_legacy@pipe-A-single-move,Fail > -kms_cursor_legacy@pipe-A-torture-bo,Fail > -kms_cursor_legacy@pipe-A-torture-move,Fail > -kms_force_connector_basic@force-edid,Fail > -kms_hdmi_inject@inject-4k,Fail > -kms_selftest@drm_format,Timeout > -kms_selftest@drm_format_helper,Timeout Fine, kms_cursor_legacy tests were migrated to -flakes. But what happened with the rest of the failures? > -msm_mapping@ring,Fail >
Re: [PATCH v1 4/5] drm/ci: skip driver specific tests
On Tue, Apr 30, 2024 at 02:41:20PM +0530, Vignesh Raman wrote: > Skip driver specific tests and skip kms tests for > panfrost driver since it is not a kms driver. > > Signed-off-by: Vignesh Raman > --- > .../gpu/drm/ci/xfails/amdgpu-stoney-skips.txt | 14 +- > drivers/gpu/drm/ci/xfails/i915-amly-skips.txt | 14 +- > drivers/gpu/drm/ci/xfails/i915-apl-skips.txt| 14 +- > drivers/gpu/drm/ci/xfails/i915-cml-skips.txt| 12 > drivers/gpu/drm/ci/xfails/i915-glk-skips.txt| 14 +- > drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt| 14 +- > drivers/gpu/drm/ci/xfails/i915-tgl-skips.txt| 14 +- > drivers/gpu/drm/ci/xfails/i915-whl-skips.txt| 14 +- > .../gpu/drm/ci/xfails/mediatek-mt8173-skips.txt | 12 > .../gpu/drm/ci/xfails/mediatek-mt8183-skips.txt | 14 ++ > drivers/gpu/drm/ci/xfails/meson-g12b-skips.txt | 14 ++ > drivers/gpu/drm/ci/xfails/msm-apq8016-skips.txt | 14 ++ > drivers/gpu/drm/ci/xfails/msm-apq8096-skips.txt | 14 +- Reviewed-by: Dmitry Baryshkov # msm skips > .../msm-sc7180-trogdor-kingoftown-skips.txt | 15 +++ > .../msm-sc7180-trogdor-lazor-limozeen-skips.txt | 15 +++ > drivers/gpu/drm/ci/xfails/msm-sdm845-skips.txt | 15 +++ > .../gpu/drm/ci/xfails/rockchip-rk3288-skips.txt | 17 - > .../gpu/drm/ci/xfails/rockchip-rk3399-skips.txt | 15 +++ > .../gpu/drm/ci/xfails/virtio_gpu-none-skips.txt | 15 ++- > 19 files changed, 260 insertions(+), 10 deletions(-) > create mode 100644 drivers/gpu/drm/ci/xfails/mediatek-mt8173-skips.txt > create mode 100644 drivers/gpu/drm/ci/xfails/mediatek-mt8183-skips.txt > create mode 100644 drivers/gpu/drm/ci/xfails/meson-g12b-skips.txt > create mode 100644 drivers/gpu/drm/ci/xfails/msm-apq8016-skips.txt > -- With best wishes Dmitry
[PATCH v2] drm/amdkfd: Let VRAM allocations go to GTT domain on small APUs
Small APUs(i.e., consumer, embedded products) usually have a small
carveout device memory which can't satisfy most compute workloads
memory allocation requirements.
We can't even run a Basic MNIST Example with a default 512MB carveout.
https://github.com/pytorch/examples/tree/main/mnist.
Error Log when running mnist:
"torch.cuda.OutOfMemoryError: HIP out of memory. Tried to allocate
84.00 MiB. GPU 0 has a total capacity of 512.00 MiB of which 0 bytes
is free. Of the allocated memory 103.83 MiB is allocated by PyTorch,
and 22.17 MiB is reserved by PyTorch but unallocated"
Though we can change BIOS settings to enlarge carveout size,
which is inflexible and may bring complaint. On the other hand,
the memory resource can't be effectively used between host and device.
The solution is MI300A approach, i.e., let VRAM allocations go to GTT.
Then device and host can effectively share system memory.
v2: Report local_mem_size_private as 0. (Felix)
Signed-off-by: Lang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c| 5 +
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 20 ++-
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 6 --
drivers/gpu/drm/amd/amdkfd/kfd_svm.h | 3 ++-
5 files changed, 23 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index 7ba05f030dd1..e3738d417245 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -455,6 +455,9 @@ void amdgpu_amdkfd_get_local_mem_info(struct amdgpu_device
*adev,
else
mem_info->local_mem_size_private =
KFD_XCP_MEMORY_SIZE(adev, xcp->id);
+ } else if (adev->flags & AMD_IS_APU) {
+ mem_info->local_mem_size_public = (ttm_tt_pages_limit() <<
PAGE_SHIFT);
+ mem_info->local_mem_size_private = 0;
} else {
mem_info->local_mem_size_public = adev->gmc.visible_vram_size;
mem_info->local_mem_size_private = adev->gmc.real_vram_size -
@@ -824,6 +827,8 @@ u64 amdgpu_amdkfd_xcp_memory_size(struct amdgpu_device
*adev, int xcp_id)
}
do_div(tmp, adev->xcp_mgr->num_xcp_per_mem_partition);
return ALIGN_DOWN(tmp, PAGE_SIZE);
+ } else if (adev->flags & AMD_IS_APU) {
+ return (ttm_tt_pages_limit() << PAGE_SHIFT);
} else {
return adev->gmc.real_vram_size;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index 4bdf59213384..5843c3d35cb9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -196,7 +196,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device
*adev,
return -EINVAL;
vram_size = KFD_XCP_MEMORY_SIZE(adev, xcp_id);
- if (adev->gmc.is_app_apu) {
+ if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
system_mem_needed = size;
ttm_mem_needed = size;
}
@@ -232,7 +232,8 @@ int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device
*adev,
"adev reference can't be null when vram is used");
if (adev && xcp_id >= 0) {
adev->kfd.vram_used[xcp_id] += vram_needed;
- adev->kfd.vram_used_aligned[xcp_id] += adev->gmc.is_app_apu ?
+ adev->kfd.vram_used_aligned[xcp_id] +=
+ (adev->gmc.is_app_apu || adev->flags &
AMD_IS_APU) ?
vram_needed :
ALIGN(vram_needed, VRAM_AVAILABLITY_ALIGN);
}
@@ -260,7 +261,7 @@ void amdgpu_amdkfd_unreserve_mem_limit(struct amdgpu_device
*adev,
if (adev) {
adev->kfd.vram_used[xcp_id] -= size;
- if (adev->gmc.is_app_apu) {
+ if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {
adev->kfd.vram_used_aligned[xcp_id] -= size;
kfd_mem_limit.system_mem_used -= size;
kfd_mem_limit.ttm_mem_used -= size;
@@ -889,7 +890,7 @@ static int kfd_mem_attach(struct amdgpu_device *adev,
struct kgd_mem *mem,
* if peer device has large BAR. In contrast, access over xGMI is
* allowed for both small and large BAR configurations of peer device
*/
- if ((adev != bo_adev && !adev->gmc.is_app_apu) &&
+ if ((adev != bo_adev && !(adev->gmc.is_app_apu || adev->flags &
AMD_IS_APU)) &&
((mem->domain == AMDGPU_GEM_DOMAIN_VRAM) ||
(mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) ||
(mem->alloc_flags &
RE: [PATCH] drm/amdgpu/vpe: fix vpe dpm clk ratio setup failed
[Public]
Reviewed-by: Lang Yu
>-Original Message-
>From: Lee, Peyton
>Sent: Monday, April 29, 2024 2:53 PM
>To: amd-gfx@lists.freedesktop.org
>Cc: Deucher, Alexander ; Yu, Lang
>; Liu, HaoPing (Alan) ; Lee, Peyton
>
>Subject: [PATCH] drm/amdgpu/vpe: fix vpe dpm clk ratio setup failed
>
>Some version of BIOS does not enable all clock levels, resulting in high level
>clock
>frequency of 0.
>The number of valid CLKs must be confirmed in advance.
>
>Signed-off-by: Peyton Lee
>---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c | 13 +++--
> 1 file changed, 11 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
>b/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
>index c23d97d34b7e..49881073ff58 100644
>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
>@@ -128,6 +128,7 @@ int amdgpu_vpe_configure_dpm(struct amdgpu_vpe *vpe)
> struct dpm_clock *VPEClks;
> struct dpm_clock *SOCClks;
> uint32_t idx;
>+ uint32_t vpeclk_enalbled_num = 0;
> uint32_t pratio_vmax_vnorm = 0, pratio_vnorm_vmid = 0,
>pratio_vmid_vmin = 0;
> uint16_t pratio_vmin_freq = 0, pratio_vmid_freq = 0,
>pratio_vnorm_freq = 0, pratio_vmax_freq = 0;
>
>@@ -144,6 +145,14 @@ int amdgpu_vpe_configure_dpm(struct amdgpu_vpe
>*vpe)
> SOCClks = clock_table.SocClocks;
> VPEClks = clock_table.VPEClocks;
>
>+ /* Comfirm enabled vpe clk num
>+ * Enabled VPE clocks are ordered from low to high in VPEClks
>+ * The highest valid clock index+1 is the number of VPEClks
>+ */
>+ for (idx = PP_SMU_NUM_VPECLK_DPM_LEVELS; idx
>&& !vpeclk_enalbled_num; idx--)
>+ if (VPEClks[idx-1].Freq)
>+ vpeclk_enalbled_num = idx;
>+
> /* vpe dpm only cares 4 levels. */
> for (idx = 0; idx < VPE_MAX_DPM_LEVEL; idx++) {
> uint32_t soc_dpm_level;
>@@ -155,8 +164,8 @@ int amdgpu_vpe_configure_dpm(struct amdgpu_vpe *vpe)
> soc_dpm_level = (idx * 2) + 1;
>
> /* clamp the max level */
>- if (soc_dpm_level >
>PP_SMU_NUM_VPECLK_DPM_LEVELS - 1)
>- soc_dpm_level =
>PP_SMU_NUM_VPECLK_DPM_LEVELS - 1;
>+ if (soc_dpm_level > vpeclk_enalbled_num - 1)
>+ soc_dpm_level = vpeclk_enalbled_num - 1;
>
> min_freq = (SOCClks[soc_dpm_level].Freq <
>VPEClks[soc_dpm_level].Freq) ?
> SOCClks[soc_dpm_level].Freq :
>VPEClks[soc_dpm_level].Freq;
>--
>2.34.1
[PATCH v1 5/5] drm/ci: update xfails for the new testlist
Now the testlist is used from IGT build, so update xfails with the new testlist. Signed-off-by: Vignesh Raman --- .../gpu/drm/ci/xfails/amdgpu-stoney-fails.txt | 47 +++ .../drm/ci/xfails/amdgpu-stoney-flakes.txt| 8 +- .../gpu/drm/ci/xfails/amdgpu-stoney-skips.txt | 15 drivers/gpu/drm/ci/xfails/i915-amly-fails.txt | 22 - .../gpu/drm/ci/xfails/i915-amly-flakes.txt| 8 ++ drivers/gpu/drm/ci/xfails/i915-amly-skips.txt | 8 ++ drivers/gpu/drm/ci/xfails/i915-apl-fails.txt | 45 +- drivers/gpu/drm/ci/xfails/i915-apl-flakes.txt | 5 ++ drivers/gpu/drm/ci/xfails/i915-apl-skips.txt | 12 +++ drivers/gpu/drm/ci/xfails/i915-cml-fails.txt | 26 +- drivers/gpu/drm/ci/xfails/i915-cml-flakes.txt | 6 ++ drivers/gpu/drm/ci/xfails/i915-cml-skips.txt | 8 ++ drivers/gpu/drm/ci/xfails/i915-glk-fails.txt | 28 +-- drivers/gpu/drm/ci/xfails/i915-glk-skips.txt | 12 +++ drivers/gpu/drm/ci/xfails/i915-kbl-fails.txt | 39 - drivers/gpu/drm/ci/xfails/i915-kbl-flakes.txt | 10 ++- drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt | 21 + drivers/gpu/drm/ci/xfails/i915-tgl-fails.txt | 75 + drivers/gpu/drm/ci/xfails/i915-tgl-skips.txt | 13 +++ drivers/gpu/drm/ci/xfails/i915-whl-fails.txt | 46 +-- drivers/gpu/drm/ci/xfails/i915-whl-skips.txt | 8 ++ .../drm/ci/xfails/mediatek-mt8173-fails.txt | 47 +++ .../drm/ci/xfails/mediatek-mt8183-fails.txt | 17 +--- .../drm/ci/xfails/mediatek-mt8183-flakes.txt | 5 ++ .../gpu/drm/ci/xfails/meson-g12b-fails.txt| 20 + .../gpu/drm/ci/xfails/meson-g12b-flakes.txt | 5 ++ .../gpu/drm/ci/xfails/msm-apq8016-fails.txt | 26 ++ .../gpu/drm/ci/xfails/msm-apq8016-flakes.txt | 5 ++ .../gpu/drm/ci/xfails/msm-apq8096-fails.txt | 5 +- .../gpu/drm/ci/xfails/msm-apq8096-flakes.txt | 5 ++ .../gpu/drm/ci/xfails/msm-apq8096-skips.txt | 67 +++ .../msm-sc7180-trogdor-kingoftown-fails.txt | 34 .../msm-sc7180-trogdor-kingoftown-flakes.txt | 5 ++ ...sm-sc7180-trogdor-lazor-limozeen-fails.txt | 34 ...m-sc7180-trogdor-lazor-limozeen-flakes.txt | 5 ++ .../gpu/drm/ci/xfails/msm-sdm845-fails.txt| 75 - .../gpu/drm/ci/xfails/msm-sdm845-flakes.txt | 26 ++ .../drm/ci/xfails/rockchip-rk3288-fails.txt | 54 .../drm/ci/xfails/rockchip-rk3399-fails.txt | 80 ++ .../drm/ci/xfails/rockchip-rk3399-flakes.txt | 7 -- .../drm/ci/xfails/virtio_gpu-none-fails.txt | 82 +-- .../drm/ci/xfails/virtio_gpu-none-skips.txt | 3 + 42 files changed, 574 insertions(+), 495 deletions(-) create mode 100644 drivers/gpu/drm/ci/xfails/i915-amly-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/i915-apl-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/i915-cml-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/mediatek-mt8183-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/meson-g12b-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/msm-apq8016-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/msm-apq8096-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/msm-sc7180-trogdor-kingoftown-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/msm-sc7180-trogdor-lazor-limozeen-flakes.txt delete mode 100644 drivers/gpu/drm/ci/xfails/rockchip-rk3288-fails.txt delete mode 100644 drivers/gpu/drm/ci/xfails/rockchip-rk3399-flakes.txt diff --git a/drivers/gpu/drm/ci/xfails/amdgpu-stoney-fails.txt b/drivers/gpu/drm/ci/xfails/amdgpu-stoney-fails.txt index ea87dc46bc2b..a48df7880ec5 100644 --- a/drivers/gpu/drm/ci/xfails/amdgpu-stoney-fails.txt +++ b/drivers/gpu/drm/ci/xfails/amdgpu-stoney-fails.txt @@ -1,27 +1,46 @@ -kms_addfb_basic@bad-pitch-65536,Fail +amdgpu/amd_assr@assr-links,Fail +amdgpu/amd_assr@assr-links-dpms,Fail +amdgpu/amd_deadlock@amdgpu-deadlock-compute,Timeout +amdgpu/amd_ilr@ilr-policy,Fail +amdgpu/amd_mall@static-screen,Crash +amdgpu/amd_mode_switch@mode-switch-first-last-pipe-2,Crash +amdgpu/amd_pci_unplug@amdgpu_hotunplug_simple,Fail +amdgpu/amd_pci_unplug@amdgpu_hotunplug_with_cs,Fail +amdgpu/amd_pci_unplug@amdgpu_hotunplug_with_exported_bo,Fail +amdgpu/amd_plane@mpo-pan-nv12,Fail +amdgpu/amd_plane@mpo-pan-p010,Fail +amdgpu/amd_plane@mpo-pan-rgb,Crash +amdgpu/amd_plane@mpo-scale-nv12,Fail +amdgpu/amd_plane@mpo-scale-p010,Fail +amdgpu/amd_plane@mpo-scale-rgb,Crash +amdgpu/amd_plane@mpo-swizzle-toggle,Fail +amdgpu/amd_uvd_dec@amdgpu_uvd_decode,Fail +amdgpu/amd_vce_dec@amdgpu_cs_vce_destroy,Fail +amdgpu/amd_vce_dec@amdgpu_cs_vce_encode,Fail +amdgpu/amd_vm@amdgpu-vm-unaligned-map,Fail +amdgpu/amd_vrr_range@freesync-parsing,Timeout +device_reset@unbind-cold-reset-rebind,Fail +dumb_buffer@invalid-bpp,Fail kms_addfb_basic@bo-too-small,Fail kms_addfb_basic@too-high,Fail kms_async_flips@async-flip-with-page-flip-events,Fail -kms_async_flips@crc,Fail -kms_async_flips@invalid-async-flip,Fail
[PATCH v1 4/5] drm/ci: skip driver specific tests
Skip driver specific tests and skip kms tests for panfrost driver since it is not a kms driver. Signed-off-by: Vignesh Raman --- .../gpu/drm/ci/xfails/amdgpu-stoney-skips.txt | 14 +- drivers/gpu/drm/ci/xfails/i915-amly-skips.txt | 14 +- drivers/gpu/drm/ci/xfails/i915-apl-skips.txt| 14 +- drivers/gpu/drm/ci/xfails/i915-cml-skips.txt| 12 drivers/gpu/drm/ci/xfails/i915-glk-skips.txt| 14 +- drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt| 14 +- drivers/gpu/drm/ci/xfails/i915-tgl-skips.txt| 14 +- drivers/gpu/drm/ci/xfails/i915-whl-skips.txt| 14 +- .../gpu/drm/ci/xfails/mediatek-mt8173-skips.txt | 12 .../gpu/drm/ci/xfails/mediatek-mt8183-skips.txt | 14 ++ drivers/gpu/drm/ci/xfails/meson-g12b-skips.txt | 14 ++ drivers/gpu/drm/ci/xfails/msm-apq8016-skips.txt | 14 ++ drivers/gpu/drm/ci/xfails/msm-apq8096-skips.txt | 14 +- .../msm-sc7180-trogdor-kingoftown-skips.txt | 15 +++ .../msm-sc7180-trogdor-lazor-limozeen-skips.txt | 15 +++ drivers/gpu/drm/ci/xfails/msm-sdm845-skips.txt | 15 +++ .../gpu/drm/ci/xfails/rockchip-rk3288-skips.txt | 17 - .../gpu/drm/ci/xfails/rockchip-rk3399-skips.txt | 15 +++ .../gpu/drm/ci/xfails/virtio_gpu-none-skips.txt | 15 ++- 19 files changed, 260 insertions(+), 10 deletions(-) create mode 100644 drivers/gpu/drm/ci/xfails/mediatek-mt8173-skips.txt create mode 100644 drivers/gpu/drm/ci/xfails/mediatek-mt8183-skips.txt create mode 100644 drivers/gpu/drm/ci/xfails/meson-g12b-skips.txt create mode 100644 drivers/gpu/drm/ci/xfails/msm-apq8016-skips.txt diff --git a/drivers/gpu/drm/ci/xfails/amdgpu-stoney-skips.txt b/drivers/gpu/drm/ci/xfails/amdgpu-stoney-skips.txt index e2c538a0f954..70e2f925d06f 100644 --- a/drivers/gpu/drm/ci/xfails/amdgpu-stoney-skips.txt +++ b/drivers/gpu/drm/ci/xfails/amdgpu-stoney-skips.txt @@ -1,2 +1,14 @@ # Suspend to RAM seems to be broken on this machine -.*suspend.* \ No newline at end of file +.*suspend.* + +# Skip driver specific tests +msm_.* +nouveau_.* +panfrost_.* +^v3d.* +^vc4.* +^vmwgfx* + +# Skip intel specific tests +gem_.* +i915_.* diff --git a/drivers/gpu/drm/ci/xfails/i915-amly-skips.txt b/drivers/gpu/drm/ci/xfails/i915-amly-skips.txt index fe55540a3f9a..59f8acfaa5ba 100644 --- a/drivers/gpu/drm/ci/xfails/i915-amly-skips.txt +++ b/drivers/gpu/drm/ci/xfails/i915-amly-skips.txt @@ -1,4 +1,16 @@ # Suspend to RAM seems to be broken on this machine .*suspend.* # This is generating kernel oops with divide error -kms_plane_scaling@invalid-parameters \ No newline at end of file +kms_plane_scaling@invalid-parameters + +# Skip driver specific tests +^amdgpu.* +msm_.* +nouveau_.* +panfrost_.* +^v3d.* +^vc4.* +^vmwgfx* + +# GEM tests takes ~1000 hours, so skip it +gem_.* diff --git a/drivers/gpu/drm/ci/xfails/i915-apl-skips.txt b/drivers/gpu/drm/ci/xfails/i915-apl-skips.txt index 3430b215c06e..d97bc038b63a 100644 --- a/drivers/gpu/drm/ci/xfails/i915-apl-skips.txt +++ b/drivers/gpu/drm/ci/xfails/i915-apl-skips.txt @@ -3,4 +3,16 @@ # This is generating kernel oops with divide error kms_plane_scaling@invalid-parameters # This is cascading issues -kms_3d \ No newline at end of file +kms_3d + +# Skip driver specific tests +^amdgpu.* +msm_.* +nouveau_.* +panfrost_.* +^v3d.* +^vc4.* +^vmwgfx* + +# GEM tests takes ~1000 hours, so skip it +gem_.* diff --git a/drivers/gpu/drm/ci/xfails/i915-cml-skips.txt b/drivers/gpu/drm/ci/xfails/i915-cml-skips.txt index 6d3d7ddc377f..92c0ffee8283 100644 --- a/drivers/gpu/drm/ci/xfails/i915-cml-skips.txt +++ b/drivers/gpu/drm/ci/xfails/i915-cml-skips.txt @@ -1,2 +1,14 @@ # This is generating kernel oops with divide error kms_plane_scaling@invalid-parameters + +# Skip driver specific tests +^amdgpu.* +msm_.* +nouveau_.* +panfrost_.* +^v3d.* +^vc4.* +^vmwgfx* + +# GEM tests takes ~1000 hours, so skip it +gem_.* diff --git a/drivers/gpu/drm/ci/xfails/i915-glk-skips.txt b/drivers/gpu/drm/ci/xfails/i915-glk-skips.txt index 4c7d00ce14bc..a168722caf13 100644 --- a/drivers/gpu/drm/ci/xfails/i915-glk-skips.txt +++ b/drivers/gpu/drm/ci/xfails/i915-glk-skips.txt @@ -2,4 +2,16 @@ .*suspend.* # This is generating kernel oops with divide error -kms_plane_scaling@invalid-parameters \ No newline at end of file +kms_plane_scaling@invalid-parameters + +# Skip driver specific tests +^amdgpu.* +msm_.* +nouveau_.* +panfrost_.* +^v3d.* +^vc4.* +^vmwgfx* + +# GEM tests takes ~1000 hours, so skip it +gem_.* diff --git a/drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt b/drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt index 4c7d00ce14bc..a168722caf13 100644 --- a/drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt +++ b/drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt @@ -2,4 +2,16 @@ .*suspend.* # This is generating kernel oops with divide error
[PATCH v1 3/5] drm/ci: build virtual GPU driver as module
With latest IGT, the tests tries to load the module and it
fails. So build the virtual GPU driver for virtio as module.
Signed-off-by: Vignesh Raman
---
drivers/gpu/drm/ci/build.sh | 1 -
drivers/gpu/drm/ci/igt_runner.sh | 6 +++---
drivers/gpu/drm/ci/image-tags.yml | 4 ++--
drivers/gpu/drm/ci/test.yml | 1 +
drivers/gpu/drm/ci/x86_64.config | 2 +-
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/ci/build.sh b/drivers/gpu/drm/ci/build.sh
index 8a3baa003904..95493df9cdc2 100644
--- a/drivers/gpu/drm/ci/build.sh
+++ b/drivers/gpu/drm/ci/build.sh
@@ -156,7 +156,6 @@ fi
mkdir -p artifacts/install/lib
mv install/* artifacts/install/.
-rm -rf artifacts/install/modules
ln -s common artifacts/install/ci-common
cp .config artifacts/${CI_JOB_NAME}_config
diff --git a/drivers/gpu/drm/ci/igt_runner.sh b/drivers/gpu/drm/ci/igt_runner.sh
index 20026612a9bd..55532f79fbdc 100755
--- a/drivers/gpu/drm/ci/igt_runner.sh
+++ b/drivers/gpu/drm/ci/igt_runner.sh
@@ -30,10 +30,10 @@ case "$DRIVER_NAME" in
export IGT_FORCE_DRIVER="panfrost"
fi
;;
-amdgpu)
+amdgpu|virtio_gpu)
# Cannot use HWCI_KERNEL_MODULES as at that point we don't have the
module in /lib
-mv /install/modules/lib/modules/* /lib/modules/.
-modprobe amdgpu
+mv /install/modules/lib/modules/* /lib/modules/. || true
+modprobe --first-time $DRIVER_NAME
;;
esac
diff --git a/drivers/gpu/drm/ci/image-tags.yml
b/drivers/gpu/drm/ci/image-tags.yml
index d8f72b82c938..fd1cb6061166 100644
--- a/drivers/gpu/drm/ci/image-tags.yml
+++ b/drivers/gpu/drm/ci/image-tags.yml
@@ -4,9 +4,9 @@ variables:
DEBIAN_BASE_TAG: "${CONTAINER_TAG}"
DEBIAN_X86_64_BUILD_IMAGE_PATH: "debian/x86_64_build"
- DEBIAN_BUILD_TAG: "2023-10-08-config"
+ DEBIAN_BUILD_TAG: "2024-04-22-virtio"
- KERNEL_ROOTFS_TAG: "2023-10-06-amd"
+ KERNEL_ROOTFS_TAG: "2024-04-22-virtio"
PKG_REPO_REV: "3cc12a2a"
DEBIAN_X86_64_TEST_BASE_IMAGE: "debian/x86_64_test-base"
diff --git a/drivers/gpu/drm/ci/test.yml b/drivers/gpu/drm/ci/test.yml
index 612c9ede3507..864ac3809d84 100644
--- a/drivers/gpu/drm/ci/test.yml
+++ b/drivers/gpu/drm/ci/test.yml
@@ -350,6 +350,7 @@ virtio_gpu:none:
script:
- ln -sf $CI_PROJECT_DIR/install /install
- mv install/bzImage /lava-files/bzImage
+- mkdir -p /lib/modules
- mkdir -p $CI_PROJECT_DIR/results
- ln -sf $CI_PROJECT_DIR/results /results
- install/crosvm-runner.sh install/igt_runner.sh
diff --git a/drivers/gpu/drm/ci/x86_64.config b/drivers/gpu/drm/ci/x86_64.config
index 1cbd49a5b23a..78479f063e8e 100644
--- a/drivers/gpu/drm/ci/x86_64.config
+++ b/drivers/gpu/drm/ci/x86_64.config
@@ -91,7 +91,7 @@ CONFIG_KVM=y
CONFIG_KVM_GUEST=y
CONFIG_VIRT_DRIVERS=y
CONFIG_VIRTIO_FS=y
-CONFIG_DRM_VIRTIO_GPU=y
+CONFIG_DRM_VIRTIO_GPU=m
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_VIRTIO_NET=y
CONFIG_VIRTIO_CONSOLE=y
--
2.40.1
[PATCH v1 2/5] drm/ci: generate testlist from build
Stop vendoring the testlist into the kernel. Instead, use the
testlist from the IGT build to ensure we do not miss renamed
or newly added tests.
Signed-off-by: Vignesh Raman
---
drivers/gpu/drm/ci/build-igt.sh | 23 +
drivers/gpu/drm/ci/igt_runner.sh |9 +-
drivers/gpu/drm/ci/testlist.txt | 2761 --
3 files changed, 28 insertions(+), 2765 deletions(-)
delete mode 100644 drivers/gpu/drm/ci/testlist.txt
diff --git a/drivers/gpu/drm/ci/build-igt.sh b/drivers/gpu/drm/ci/build-igt.sh
index 500fa4f5c30a..cedc62baba1e 100644
--- a/drivers/gpu/drm/ci/build-igt.sh
+++ b/drivers/gpu/drm/ci/build-igt.sh
@@ -26,6 +26,29 @@ meson build $MESON_OPTIONS $EXTRA_MESON_ARGS
ninja -C build -j${FDO_CI_CONCURRENT:-4} || ninja -C build -j 1
ninja -C build install
+set +ex
+export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/igt/lib64
+while read -r line; do
+if [ "$line" = "TESTLIST" ] || [ "$line" = "END TESTLIST" ]; then
+continue
+fi
+
+tests=$(echo "$line" | tr ' ' '\n')
+
+for test in $tests; do
+output=$(/igt/libexec/igt-gpu-tools/"$test" --list-subtests)
+
+if [ -z "$output" ]; then
+echo "$test"
+else
+echo "$output" | while read -r subtest; do
+echo "$test@$subtest"
+done
+fi
+done
+done < /igt/libexec/igt-gpu-tools/test-list.txt >
/igt/libexec/igt-gpu-tools/testlist.txt
+set -ex
+
mkdir -p artifacts/
tar -cf artifacts/igt.tar /igt
diff --git a/drivers/gpu/drm/ci/igt_runner.sh b/drivers/gpu/drm/ci/igt_runner.sh
index f1a08b9b146f..20026612a9bd 100755
--- a/drivers/gpu/drm/ci/igt_runner.sh
+++ b/drivers/gpu/drm/ci/igt_runner.sh
@@ -59,25 +59,26 @@ fi
curl -L --retry 4 -f --retry-all-errors --retry-delay 60 -s
${FDO_HTTP_CACHE_URI:-}$PIPELINE_ARTIFACTS_BASE/$ARCH/igt.tar.gz | tar --zstd
-v -x -C /
+TESTLIST="/igt/libexec/igt-gpu-tools/testlist.txt"
# If the job is parallel at the gitab job level, take the corresponding
fraction
# of the caselist.
if [ -n "$CI_NODE_INDEX" ]; then
-sed -ni $CI_NODE_INDEX~$CI_NODE_TOTAL"p" /install/testlist.txt
+sed -ni $CI_NODE_INDEX~$CI_NODE_TOTAL"p" $TESTLIST
fi
# core_getversion checks if the driver is loaded and probed correctly
# so run it in all shards
-if ! grep -q "core_getversion" /install/testlist.txt; then
+if ! grep -q "core_getversion" $TESTLIST; then
# Add the line to the file
-echo "core_getversion" >> /install/testlist.txt
+echo "core_getversion" >> $TESTLIST
fi
set +e
igt-runner \
run \
--igt-folder /igt/libexec/igt-gpu-tools \
---caselist /install/testlist.txt \
+--caselist $TESTLIST \
--output /results \
$IGT_SKIPS \
$IGT_FLAKES \
diff --git a/drivers/gpu/drm/ci/testlist.txt b/drivers/gpu/drm/ci/testlist.txt
deleted file mode 100644
index 3377f002f8c5..
--- a/drivers/gpu/drm/ci/testlist.txt
+++ /dev/null
@@ -1,2761 +0,0 @@
-core_auth@getclient-simple
-core_auth@getclient-master-drop
-core_auth@basic-auth
-core_auth@many-magics
-core_getclient
-core_getstats
-core_getversion
-core_setmaster_vs_auth
-drm_read@invalid-buffer
-drm_read@fault-buffer
-drm_read@empty-block
-drm_read@empty-nonblock
-drm_read@short-buffer-block
-drm_read@short-buffer-nonblock
-drm_read@short-buffer-wakeup
-gem_eio@throttle
-gem_eio@create
-gem_eio@create-ext
-gem_eio@context-create
-gem_eio@execbuf
-gem_eio@banned
-gem_eio@suspend
-gem_eio@hibernate
-gem_eio@in-flight-external
-gem_eio@in-flight-suspend
-gem_eio@reset-stress
-gem_eio@unwedge-stress
-gem_eio@wait-immediate
-gem_eio@wait-wedge-immediate
-gem_eio@in-flight-immediate
-gem_eio@in-flight-contexts-immediate
-gem_eio@in-flight-internal-immediate
-gem_eio@wait-1us
-gem_eio@wait-wedge-1us
-gem_eio@in-flight-1us
-gem_eio@in-flight-contexts-1us
-gem_eio@in-flight-internal-1us
-gem_eio@wait-10ms
-gem_eio@wait-wedge-10ms
-gem_eio@in-flight-10ms
-gem_eio@in-flight-contexts-10ms
-gem_eio@in-flight-internal-10ms
-gem_eio@kms
-kms_3d
-kms_addfb_basic@unused-handle
-kms_addfb_basic@unused-pitches
-kms_addfb_basic@unused-offsets
-kms_addfb_basic@unused-modifier
-kms_addfb_basic@clobberred-modifier
-kms_addfb_basic@invalid-smem-bo-on-discrete
-kms_addfb_basic@legacy-format
-kms_addfb_basic@no-handle
-kms_addfb_basic@basic
-kms_addfb_basic@bad-pitch-0
-kms_addfb_basic@bad-pitch-32
-kms_addfb_basic@bad-pitch-63
-kms_addfb_basic@bad-pitch-128
-kms_addfb_basic@bad-pitch-256
-kms_addfb_basic@bad-pitch-1024
-kms_addfb_basic@bad-pitch-999
-kms_addfb_basic@bad-pitch-65536
-kms_addfb_basic@invalid-get-prop-any
-kms_addfb_basic@invalid-get-prop
-kms_addfb_basic@invalid-set-prop-any
-kms_addfb_basic@invalid-set-prop
-kms_addfb_basic@master-rmfb
-kms_addfb_basic@addfb25-modifier-no-flag
-kms_addfb_basic@addfb25-bad-modifier
-kms_addfb_basic@addfb25-x-tiled-mismatch-legacy
-kms_addfb_basic@addfb25-x-tiled-legacy
-kms_addfb_basic@addfb25-framebuffer-vs-set-tiling
-kms_addfb_basic@basic-x-tiled-legacy
[PATCH v1 1/5] drm/ci: uprev mesa version
zlib.net is not allowing tarball download anymore and results
in below error in kernel+rootfs_arm32 container build,
urllib.error.HTTPError: HTTP Error 403: Forbidden
urllib.error.HTTPError: HTTP Error 415: Unsupported Media Type
Uprev mesa to latest version which includes a fix for this issue.
https://gitlab.freedesktop.org/mesa/mesa/-/commit/908f444e
Also copy helper scripts to install, so that the ci jobs can
use these scripts for logging.
Signed-off-by: Vignesh Raman
---
drivers/gpu/drm/ci/build.sh | 1 +
drivers/gpu/drm/ci/container.yml | 12
drivers/gpu/drm/ci/gitlab-ci.yml | 11 ---
drivers/gpu/drm/ci/image-tags.yml | 3 ++-
drivers/gpu/drm/ci/test.yml | 2 ++
5 files changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/ci/build.sh b/drivers/gpu/drm/ci/build.sh
index 106f2d40d222..8a3baa003904 100644
--- a/drivers/gpu/drm/ci/build.sh
+++ b/drivers/gpu/drm/ci/build.sh
@@ -128,6 +128,7 @@ fi
# Pass needed files to the test stage
mkdir -p install
cp -rfv .gitlab-ci/* install/.
+cp -rfv ci/* install/.
cp -rfv install/common install/ci-common
cp -rfv drivers/gpu/drm/ci/* install/.
diff --git a/drivers/gpu/drm/ci/container.yml b/drivers/gpu/drm/ci/container.yml
index 9764e7921a4f..d6edf3635b23 100644
--- a/drivers/gpu/drm/ci/container.yml
+++ b/drivers/gpu/drm/ci/container.yml
@@ -36,15 +36,15 @@ debian/android_build:
rules:
- when: never
-debian/x86_64_test-android:
+.debian/x86_64_test-android:
rules:
- when: never
-windows_build_vs2019:
+windows_build_msvc:
rules:
- when: never
-windows_test_vs2019:
+windows_test_msvc:
rules:
- when: never
@@ -56,10 +56,6 @@ rustfmt:
rules:
- when: never
-windows_vs2019:
- rules:
-- when: never
-
-clang-format:
+windows_msvc:
rules:
- when: never
\ No newline at end of file
diff --git a/drivers/gpu/drm/ci/gitlab-ci.yml b/drivers/gpu/drm/ci/gitlab-ci.yml
index 084e3ff8e3f4..9bf5190604a7 100644
--- a/drivers/gpu/drm/ci/gitlab-ci.yml
+++ b/drivers/gpu/drm/ci/gitlab-ci.yml
@@ -1,6 +1,6 @@
variables:
DRM_CI_PROJECT_PATH: mesa/mesa
- DRM_CI_COMMIT_SHA:
9d162de9a05155e1c4041857a5848842749164cf
+ DRM_CI_COMMIT_SHA:
e5f133ccc426a197c48a4e88f5377f943f078180
UPSTREAM_REPO: git://anongit.freedesktop.org/drm/drm
TARGET_BRANCH: drm-next
@@ -26,10 +26,13 @@ variables:
JOB_ARTIFACTS_BASE: ${PIPELINE_ARTIFACTS_BASE}/${CI_JOB_ID}
# default kernel for rootfs before injecting the current kernel tree
KERNEL_REPO: "gfx-ci/linux"
- KERNEL_TAG: "v6.6.4-for-mesa-ci-e4f4c500f7fb"
+ KERNEL_TAG: "v6.6.21-mesa-19fc"
KERNEL_IMAGE_BASE: https://${S3_HOST}/mesa-lava/${KERNEL_REPO}/${KERNEL_TAG}
LAVA_TAGS: subset-1-gfx
LAVA_JOB_PRIORITY: 30
+ ARTIFACTS_BASE_URL:
https://${CI_PROJECT_ROOT_NAMESPACE}.${CI_PAGES_DOMAIN}/-/${CI_PROJECT_NAME}/-/jobs/${CI_JOB_ID}/artifacts
+ # Python scripts for structured logger
+ PYTHONPATH: "$PYTHONPATH:$CI_PROJECT_DIR/install"
default:
before_script:
@@ -46,6 +49,7 @@ default:
- cd $CI_PROJECT_DIR
- curl --output -
$DRM_CI_PROJECT_URL/-/archive/$DRM_CI_COMMIT_SHA/mesa-$DRM_CI_COMMIT_SHA.tar.gz
| tar -xz
- mv mesa-$DRM_CI_COMMIT_SHA/.gitlab-ci* .
+- mv mesa-$DRM_CI_COMMIT_SHA/bin/ci .
- rm -rf mesa-$DRM_CI_COMMIT_SHA/
- echo -e "\e[0Ksection_end:$(date +%s):drm_ci_download_section\r\e[0K"
@@ -98,6 +102,7 @@ include:
stages:
- sanity
- container
+ - code-validation
- git-archive
- build
- amdgpu
@@ -107,7 +112,6 @@ stages:
- msm
- rockchip
- virtio-gpu
- - lint
# YAML anchors for rule conditions
#
@@ -218,6 +222,7 @@ make git archive:
script:
# Remove drm-ci files we just added
- rm -rf .gitlab-ci.*
+- rm -rf ci
# Compactify the .git directory
- git gc --aggressive
diff --git a/drivers/gpu/drm/ci/image-tags.yml
b/drivers/gpu/drm/ci/image-tags.yml
index 7ab4f2514da8..d8f72b82c938 100644
--- a/drivers/gpu/drm/ci/image-tags.yml
+++ b/drivers/gpu/drm/ci/image-tags.yml
@@ -1,5 +1,5 @@
variables:
- CONTAINER_TAG: "2023-10-11-mesa-uprev"
+ CONTAINER_TAG: "2024-04-22-mesa-uprev"
DEBIAN_X86_64_BUILD_BASE_IMAGE: "debian/x86_64_build-base"
DEBIAN_BASE_TAG: "${CONTAINER_TAG}"
@@ -7,6 +7,7 @@ variables:
DEBIAN_BUILD_TAG: "2023-10-08-config"
KERNEL_ROOTFS_TAG: "2023-10-06-amd"
+ PKG_REPO_REV: "3cc12a2a"
DEBIAN_X86_64_TEST_BASE_IMAGE: "debian/x86_64_test-base"
DEBIAN_X86_64_TEST_IMAGE_GL_PATH: "debian/x86_64_test-gl"
diff --git a/drivers/gpu/drm/ci/test.yml b/drivers/gpu/drm/ci/test.yml
index 8bc63912fddb..612c9ede3507 100644
--- a/drivers/gpu/drm/ci/test.yml
+++ b/drivers/gpu/drm/ci/test.yml
@@ -150,6 +150,8 @@ msm:sdm845:
BM_KERNEL: https://${PIPELINE_ARTIFACTS_BASE}/arm64/cheza-kernel
GPU_VERSION: sdm845
RUNNER_TAG: google-freedreno-cheza
+DEVICE_TYPE: sdm845-cheza-r3
+FARM: google
script:
-
[PATCH v1 0/5] drm/ci: uprev mesa and generate testlist
Uprev mesa to the latest version and stop vendoring the testlist into the kernel. Instead, use the testlist from the IGT build to ensure we do not miss renamed or newly added tests. Update the xfails with the latest testlist run. Also build virtual GPU driver for virtio as module. The flakes list needs to be reported upsteam. Will send it after this series is reviewed. https://gitlab.freedesktop.org/vigneshraman/linux/-/pipelines/1166575 Vignesh Raman (5): drm/ci: uprev mesa version drm/ci: generate testlist from build drm/ci: build virtual GPU driver as module drm/ci: skip driver specific tests drm/ci: update xfails for the new testlist drivers/gpu/drm/ci/build-igt.sh | 23 + drivers/gpu/drm/ci/build.sh |2 +- drivers/gpu/drm/ci/container.yml | 12 +- drivers/gpu/drm/ci/gitlab-ci.yml | 11 +- drivers/gpu/drm/ci/igt_runner.sh | 15 +- drivers/gpu/drm/ci/image-tags.yml |7 +- drivers/gpu/drm/ci/test.yml |3 + drivers/gpu/drm/ci/testlist.txt | 2761 - drivers/gpu/drm/ci/x86_64.config |2 +- .../gpu/drm/ci/xfails/amdgpu-stoney-fails.txt | 47 +- .../drm/ci/xfails/amdgpu-stoney-flakes.txt|8 +- .../gpu/drm/ci/xfails/amdgpu-stoney-skips.txt | 29 +- drivers/gpu/drm/ci/xfails/i915-amly-fails.txt | 22 +- .../gpu/drm/ci/xfails/i915-amly-flakes.txt|8 + drivers/gpu/drm/ci/xfails/i915-amly-skips.txt | 22 +- drivers/gpu/drm/ci/xfails/i915-apl-fails.txt | 45 +- drivers/gpu/drm/ci/xfails/i915-apl-flakes.txt |5 + drivers/gpu/drm/ci/xfails/i915-apl-skips.txt | 26 +- drivers/gpu/drm/ci/xfails/i915-cml-fails.txt | 26 +- drivers/gpu/drm/ci/xfails/i915-cml-flakes.txt |6 + drivers/gpu/drm/ci/xfails/i915-cml-skips.txt | 20 + drivers/gpu/drm/ci/xfails/i915-glk-fails.txt | 28 +- drivers/gpu/drm/ci/xfails/i915-glk-skips.txt | 26 +- drivers/gpu/drm/ci/xfails/i915-kbl-fails.txt | 39 +- drivers/gpu/drm/ci/xfails/i915-kbl-flakes.txt | 10 +- drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt | 35 +- drivers/gpu/drm/ci/xfails/i915-tgl-fails.txt | 75 +- drivers/gpu/drm/ci/xfails/i915-tgl-skips.txt | 27 +- drivers/gpu/drm/ci/xfails/i915-whl-fails.txt | 46 +- drivers/gpu/drm/ci/xfails/i915-whl-skips.txt | 22 +- .../drm/ci/xfails/mediatek-mt8173-fails.txt | 47 +- .../drm/ci/xfails/mediatek-mt8173-skips.txt | 12 + .../drm/ci/xfails/mediatek-mt8183-fails.txt | 17 +- .../drm/ci/xfails/mediatek-mt8183-flakes.txt |5 + .../drm/ci/xfails/mediatek-mt8183-skips.txt | 14 + .../gpu/drm/ci/xfails/meson-g12b-fails.txt| 20 +- .../gpu/drm/ci/xfails/meson-g12b-flakes.txt |5 + .../gpu/drm/ci/xfails/meson-g12b-skips.txt| 14 + .../gpu/drm/ci/xfails/msm-apq8016-fails.txt | 26 +- .../gpu/drm/ci/xfails/msm-apq8016-flakes.txt |5 + .../gpu/drm/ci/xfails/msm-apq8016-skips.txt | 14 + .../gpu/drm/ci/xfails/msm-apq8096-fails.txt |5 +- .../gpu/drm/ci/xfails/msm-apq8096-flakes.txt |5 + .../gpu/drm/ci/xfails/msm-apq8096-skips.txt | 81 +- .../msm-sc7180-trogdor-kingoftown-fails.txt | 34 +- .../msm-sc7180-trogdor-kingoftown-flakes.txt |5 + .../msm-sc7180-trogdor-kingoftown-skips.txt | 15 + ...sm-sc7180-trogdor-lazor-limozeen-fails.txt | 34 +- ...m-sc7180-trogdor-lazor-limozeen-flakes.txt |5 + ...sm-sc7180-trogdor-lazor-limozeen-skips.txt | 15 + .../gpu/drm/ci/xfails/msm-sdm845-fails.txt| 75 +- .../gpu/drm/ci/xfails/msm-sdm845-flakes.txt | 26 +- .../gpu/drm/ci/xfails/msm-sdm845-skips.txt| 15 + .../drm/ci/xfails/rockchip-rk3288-fails.txt | 54 - .../drm/ci/xfails/rockchip-rk3288-skips.txt | 17 +- .../drm/ci/xfails/rockchip-rk3399-fails.txt | 80 +- .../drm/ci/xfails/rockchip-rk3399-flakes.txt |7 - .../drm/ci/xfails/rockchip-rk3399-skips.txt | 15 + .../drm/ci/xfails/virtio_gpu-none-fails.txt | 82 +- .../drm/ci/xfails/virtio_gpu-none-skips.txt | 18 +- 60 files changed, 886 insertions(+), 3289 deletions(-) delete mode 100644 drivers/gpu/drm/ci/testlist.txt create mode 100644 drivers/gpu/drm/ci/xfails/i915-amly-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/i915-apl-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/i915-cml-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/mediatek-mt8173-skips.txt create mode 100644 drivers/gpu/drm/ci/xfails/mediatek-mt8183-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/mediatek-mt8183-skips.txt create mode 100644 drivers/gpu/drm/ci/xfails/meson-g12b-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/meson-g12b-skips.txt create mode 100644 drivers/gpu/drm/ci/xfails/msm-apq8016-flakes.txt create mode 100644 drivers/gpu/drm/ci/xfails/msm-apq8016-skips.txt create mode 100644 drivers/gpu/drm/ci/xfails/msm-apq8096-flakes.txt create mode 100644
Re: [PATCH v9 5/5] drm/amdgpu: Enable userq fence interrupt support
Am 29.04.24 um 08:43 schrieb Arunpravin Paneer Selvam:
Add support to handle the userqueue protected fence signal hardware
interrupt.
Create a xarray which maps the doorbell index to the fence driver address.
This would help to retrieve the fence driver information when an userq fence
interrupt is triggered. Firmware sends the doorbell offset value and
this info is compared with the queue's mqd doorbell offset value.
If they are same, we process the userq fence interrupt.
Signed-off-by: Arunpravin Paneer Selvam
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 5 ++--
.../gpu/drm/amd/amdgpu/amdgpu_userq_fence.c | 6 +
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 25 ++-
drivers/gpu/drm/amd/amdgpu/mes_v10_1.c| 5
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c| 7 --
6 files changed, 23 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 4ca14b02668b..2d5ef2e74c71 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1043,6 +1043,8 @@ struct amdgpu_device {
struct amdgpu_mqd mqds[AMDGPU_HW_IP_NUM];
const struct amdgpu_userq_funcs *userq_funcs[AMDGPU_HW_IP_NUM];
+ struct xarray userq_xa;
+
/* df */
struct amdgpu_dfdf;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 7753a2e64d41..fd919105a181 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3982,6 +3982,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
spin_lock_init(>audio_endpt_idx_lock);
spin_lock_init(>mm_stats.lock);
+ xa_init_flags(>userq_xa, XA_FLAGS_LOCK_IRQ);
+
INIT_LIST_HEAD(>shadow_list);
mutex_init(>shadow_list_lock);
@@ -4719,9 +4721,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon)
}
adev->in_suspend = false;
- if (adev->enable_mes)
- amdgpu_mes_self_test(adev);
-
Since this patch here breaks the in kernel MES self test you should
probably create a follow up patch to completely remove it.
(Or even better remove it before applying this patch).
if (amdgpu_acpi_smart_shift_update(dev, AMDGPU_SS_DEV_D0))
DRM_WARN("smart shift update failed\n");
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
index 6fb75cc1d20c..614953b0fc19 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
@@ -70,6 +70,7 @@ int amdgpu_userq_fence_driver_alloc(struct amdgpu_device
*adev,
struct amdgpu_usermode_queue *userq)
{
struct amdgpu_userq_fence_driver *fence_drv;
+ unsigned long flags;
int r;
fence_drv = kzalloc(sizeof(*fence_drv), GFP_KERNEL);
@@ -96,6 +97,11 @@ int amdgpu_userq_fence_driver_alloc(struct amdgpu_device
*adev,
fence_drv->context = dma_fence_context_alloc(1);
get_task_comm(fence_drv->timeline_name, current);
+ xa_lock_irqsave(>userq_xa, flags);
+ __xa_store(>userq_xa, userq->doorbell_index,
+ fence_drv, GFP_KERNEL);
+ xa_unlock_irqrestore(>userq_xa, flags);
+
userq->fence_drv = fence_drv;
return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index a786e25432ae..d6cdca0a652f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -49,6 +49,7 @@
#include "gfx_v11_0_3.h"
#include "nbio_v4_3.h"
#include "mes_v11_0.h"
+#include "amdgpu_userq_fence.h"
#define GFX11_NUM_GFX_RINGS 1
#define GFX11_MEC_HPD_SIZE2048
@@ -5939,25 +5940,25 @@ static int gfx_v11_0_eop_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
{
- int i;
+ u32 doorbell_offset = entry->src_data[0];
u8 me_id, pipe_id, queue_id;
struct amdgpu_ring *ring;
- uint32_t mes_queue_id = entry->src_data[0];
+ int i;
DRM_DEBUG("IH: CP EOP\n");
- if (adev->enable_mes && (mes_queue_id & AMDGPU_FENCE_MES_QUEUE_FLAG)) {
- struct amdgpu_mes_queue *queue;
+ if (adev->enable_mes && doorbell_offset) {
+ struct amdgpu_userq_fence_driver *fence_drv = NULL;
+ struct xarray *xa = >userq_xa;
+ unsigned long index, flags;
- mes_queue_id &= AMDGPU_FENCE_MES_QUEUE_ID_MASK;
+ xa_lock_irqsave(xa, flags);
+ xa_for_each(xa, index, fence_drv)
+ if (doorbell_offset == index)
+ break;
The array is indexed by the doorbell offset, so
Re: [PATCH v9 4/5] drm/amdgpu: Implement userqueue signal/wait IOCTL
Am 29.04.24 um 08:43 schrieb Arunpravin Paneer Selvam:
This patch introduces new IOCTL for userqueue secure semaphore.
The signal IOCTL called from userspace application creates a drm
syncobj and array of bo GEM handles and passed in as parameter to
the driver to install the fence into it.
The wait IOCTL gets an array of drm syncobjs, finds the fences
attached to the drm syncobjs and obtain the array of
memory_address/fence_value combintion which are returned to
userspace.
v2: (Christian)
- Install fence into GEM BO object.
- Lock all BO's using the dma resv subsystem
- Reorder the sequence in signal IOCTL function.
- Get write pointer from the shadow wptr
- use userq_fence to fetch the va/value in wait IOCTL.
v3: (Christian)
- Use drm_exec helper for the proper BO drm reserve and avoid BO
lock/unlock issues.
- fence/fence driver reference count logic for signal/wait IOCTLs.
v4: (Christian)
- Fixed the drm_exec calling sequence
- use dma_resv_for_each_fence_unlock if BO's are not locked
- Modified the fence_info array storing logic.
v5: (Christian)
- Keep fence_drv until wait queue execution.
- Add dma_fence_wait for other fences.
- Lock BO's using drm_exec as the number of fences in them could
change.
- Install signaled fences as well into BO/Syncobj.
- Move Syncobj fence installation code after the drm_exec_prepare_array.
- Directly add dma_resv_usage_rw(args->bo_flags
- remove unnecessary dma_fence_put.
v6: (Christian)
- Add xarray stuff to store the fence_drv
- Implement a function to iterate over the xarray and drop
the fence_drv references.
- Add drm_exec_until_all_locked() wrapper
- Add a check that if we haven't exceeded the user allocated num_fences
before adding dma_fence to the fences array.
v7: (Christian)
- Use memdup_user() for kmalloc_array + copy_from_user
- Move the fence_drv references from the xarray into the newly created
fence
and drop the fence_drv references when we signal this fence.
- Move this locking of BOs before the "if (!wait_info->num_fences)",
this way you need this code block only once.
- Merge the error handling code and the cleanup + return 0 code.
- Initializing the xa should probably be done in the userq code.
- Remove the userq back pointer stored in fence_drv.
- Pass xarray as parameter in amdgpu_userq_walk_and_drop_fence_drv()
v8: (Christian)
- Move fence_drv references must come before adding the fence to the list.
- Use xa_lock_irqsave_nested for nested spinlock operations.
- userq_mgr should be per fpriv and not one per device.
- Restructure the interrupt process code for the early exit of the loop.
- The reference acquired in the syncobj fence replace code needs to be
kept around.
- Modify the dma_fence acquire placement in wait IOCTL.
- Move USERQ_BO_WRITE flag to UAPI header file.
- drop the fence drv reference after telling the hw to stop accessing it.
- Add multi sync object support to userq signal IOCTL.
Signed-off-by: Arunpravin Paneer Selvam
Suggested-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +
.../gpu/drm/amd/amdgpu/amdgpu_userq_fence.c | 454 +-
.../gpu/drm/amd/amdgpu/amdgpu_userq_fence.h | 5 +
drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 29 +-
.../gpu/drm/amd/include/amdgpu_userqueue.h| 1 +
5 files changed, 484 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 844f7b5f90db..5892a4c1a92e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -2918,6 +2918,8 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_OP, amdgpu_gem_op_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_USERPTR, amdgpu_gem_userptr_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_USERQ, amdgpu_userq_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(AMDGPU_USERQ_SIGNAL, amdgpu_userq_signal_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(AMDGPU_USERQ_WAIT, amdgpu_userq_wait_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
};
static const struct drm_driver amdgpu_kms_driver = {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
index f7baea2c67ab..6fb75cc1d20c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
@@ -25,6 +25,7 @@
#include
#include
+#include
#include
#include "amdgpu.h"
@@ -102,8 +103,11 @@ int amdgpu_userq_fence_driver_alloc(struct amdgpu_device
*adev,
void amdgpu_userq_fence_driver_process(struct amdgpu_userq_fence_driver *fence_drv)
{
+ struct
[PATCH v8 07/35] dyndbg: ddebug_apply_class_bitmap - add module arg, select on it
Add param: query_module to ddebug_apply_class_bitmap(), and pass it
thru to _ddebug_queries(), replacing NULL with query_module. This
allows its caller to update just one module, or all (as currently).
We'll use this later to propagate drm.debug to each USEr as they're
modprobed.
No functional change.
Signed-off-by: Jim Cromie
---
after `modprobe i915`, heres the module dependencies,
though not all on drm.debug.
bash-5.2# lsmod
Module Size Used by
i915 3133440 0
drm_buddy 20480 1 i915
ttm90112 1 i915
i2c_algo_bit 16384 1 i915
video 61440 1 i915
wmi32768 1 video
drm_display_helper200704 1 i915
drm_kms_helper208896 2 drm_display_helper,i915
drm 606208 5
drm_kms_helper,drm_display_helper,drm_buddy,i915,ttm
cec57344 2 drm_display_helper,i915
---
lib/dynamic_debug.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index 46e4cdd8e6be..a1fd2e9dbafb 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -605,7 +605,8 @@ static int ddebug_exec_queries(char *query, const char
*modname)
/* apply a new bitmap to the sys-knob's current bit-state */
static int ddebug_apply_class_bitmap(const struct ddebug_class_param *dcp,
-unsigned long *new_bits, unsigned long
*old_bits)
+unsigned long *new_bits, unsigned long
*old_bits,
+const char *query_modname)
{
#define QUERY_SIZE 128
char query[QUERY_SIZE];
@@ -613,7 +614,8 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
int matches = 0;
int bi, ct;
- v2pr_info("apply: 0x%lx to: 0x%lx\n", *new_bits, *old_bits);
+ v2pr_info("apply bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
*old_bits,
+ query_modname ?: "");
for (bi = 0; bi < map->length; bi++) {
if (test_bit(bi, new_bits) == test_bit(bi, old_bits))
@@ -622,12 +624,15 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
snprintf(query, QUERY_SIZE, "class %s %c%s",
map->class_names[bi],
test_bit(bi, new_bits) ? '+' : '-', dcp->flags);
- ct = ddebug_exec_queries(query, NULL);
+ ct = ddebug_exec_queries(query, query_modname);
matches += ct;
v2pr_info("bit_%d: %d matches on class: %s -> 0x%lx\n", bi,
ct, map->class_names[bi], *new_bits);
}
+ v2pr_info("applied bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
*old_bits,
+ query_modname ?: "");
+
return matches;
}
@@ -682,7 +687,7 @@ static int param_set_dyndbg_classnames(const char *instr,
const struct kernel_pa
continue;
}
curr_bits ^= BIT(cls_id);
- totct += ddebug_apply_class_bitmap(dcp, _bits,
dcp->bits);
+ totct += ddebug_apply_class_bitmap(dcp, _bits,
dcp->bits, NULL);
*dcp->bits = curr_bits;
v2pr_info("%s: changed bit %d:%s\n", KP_NAME(kp),
cls_id,
map->class_names[cls_id]);
@@ -692,7 +697,7 @@ static int param_set_dyndbg_classnames(const char *instr,
const struct kernel_pa
old_bits = CLASSMAP_BITMASK(*dcp->lvl);
curr_bits = CLASSMAP_BITMASK(cls_id + (wanted ? 1 : 0
));
- totct += ddebug_apply_class_bitmap(dcp, _bits,
_bits);
+ totct += ddebug_apply_class_bitmap(dcp, _bits,
_bits, NULL);
*dcp->lvl = (cls_id + (wanted ? 1 : 0));
v2pr_info("%s: changed bit-%d: \"%s\" %lx->%lx\n",
KP_NAME(kp), cls_id,
map->class_names[cls_id], old_bits,
curr_bits);
@@ -755,7 +760,7 @@ int param_set_dyndbg_classes(const char *instr, const
struct kernel_param *kp)
inrep &= CLASSMAP_BITMASK(map->length);
}
v2pr_info("bits:%lx > %s\n", inrep, KP_NAME(kp));
- totct += ddebug_apply_class_bitmap(dcp, , dcp->bits);
+ totct += ddebug_apply_class_bitmap(dcp, , dcp->bits,
NULL);
*dcp->bits = inrep;
break;
case DD_CLASS_TYPE_LEVEL_NUM:
@@ -768,7 +773,7 @@ int param_set_dyndbg_classes(const char *instr, const
struct kernel_param *kp)
old_bits = CLASSMAP_BITMASK(*dcp->lvl);
new_bits = CLASSMAP_BITMASK(inrep);
v2pr_info("lvl:%ld bits:0x%lx > %s\n", inrep, new_bits,
KP_NAME(kp));
- totct += ddebug_apply_class_bitmap(dcp, _bits, _bits);
+
[PATCH v8 27/35] selftests-dyndbg: test dyndbg-to-tracefs
Add a series of trace-tests: test_actual_trace() etc, to validate that
the dyndbg-to-tracefs feature (using +T flag) works as intended. The
1st test uses the global tracebuf, the rest use/excercise private
tracebufs.
These tests are currently optional, via "TRACE" arg1, because the
feature code is in-the-lab. But its an objective test, and pretty
user-interface oriented.
IOW this passes:
:#> ./tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
but this fails:
:#> ./tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh TRACE
So its won't break selftests success.
This allows the patch to be committed now w/o inducing selftest
failures, and the tests enabled later, with the promised code.
Signed-off-by: Jim Cromie
Co-developed-by: Łukasz Bartosik
Signed-off-by: Łukasz Bartosik
---
.../dynamic_debug/dyndbg_selftest.sh | 435 ++
1 file changed, 435 insertions(+)
diff --git a/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
b/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
index 54acee58cb4e..65f31418870f 100755
--- a/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
+++ b/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
@@ -308,6 +308,405 @@ function test_mod_submod {
check_match_ct =p 14 -v
}
+# tests below here are all actually using dyndbg->trace,
+# and verifying the writes
+
+function test_actual_trace {
+echo -e "${GREEN}# TEST_ACTUAL_TRACE ${NC}"
+ddcmd =_
+echo > /sys/kernel/tracing/trace
+echo 1 >/sys/kernel/tracing/tracing_on
+echo 1 >/sys/kernel/tracing/events/dyndbg/enable
+modprobe test_dynamic_debug dyndbg=class,D2_CORE,+T:0
+search_trace "D2_CORE msg"
+search_trace_name 0 1 "D2_CORE msg"
+check_match_ct =T 1
+tmark "trace-mark"
+search_trace "trace-mark"
+doprints
+search_trace "D2_CORE msg"
+ifrmmod test_dynamic_debug
+}
+
+function self_start {
+echo \# open, modprobe +T:selftest
+ddcmd open selftest
+check_trace_instance_dir selftest 1
+is_trace_instance_opened selftest
+modprobe test_dynamic_debug dyndbg=+T:selftest.mf
+check_match_ct =T:selftest.mf 5
+}
+
+function self_end_normal {
+echo \# disable -T:selftest, rmmod, close
+ddcmd module test_dynamic_debug -T:selftest # leave mf
+check_match_ct =:selftest.mf 5 -v
+ddcmd module test_dynamic_debug +:0
+ddcmd close selftest
+is_trace_instance_closed selftest
+ifrmmod test_dynamic_debug
+}
+
+function self_end_disable_anon {
+echo \# disable, close, rmmod
+ddcmd module test_dynamic_debug -T
+check_match_ct =:selftest.mf 5
+ddcmd module test_dynamic_debug +:0
+ddcmd close selftest
+is_trace_instance_closed selftest
+ifrmmod test_dynamic_debug
+}
+
+function self_end_disable_anon_mf {
+echo \# disable, close, rmmod
+ddcmd module test_dynamic_debug -Tf
+check_match_ct =:selftest.m 5
+ddcmd module test_dynamic_debug +:0
+ddcmd close selftest
+is_trace_instance_closed selftest
+ifrmmod test_dynamic_debug
+}
+
+function self_end_nodisable {
+echo \# SKIPPING: ddcmd module test_dynamic_debug -T:selftest
+ddcmd close selftest fail # close fails because selftest is still being
used
+check_err_msg "Device or resource busy"
+check_match_ct =T:selftest.mf 5
+rmmod test_dynamic_debug
+ddcmd close selftest # now selftest can be closed because rmmod removed
+ # all callsites which were using it
+is_trace_instance_closed selftest
+}
+
+function self_end_delete_directory {
+del_trace_instance_dir selftest 0
+check_err_msg "Device or resource busy"
+ddcmd module test_dynamic_debug -mT:selftest
+check_match_ct =:selftest.f 5
+del_trace_instance_dir selftest 0
+check_err_msg "Device or resource busy"
+ddcmd module test_dynamic_debug +:0
+ddcmd close selftest
+check_trace_instance_dir selftest 1
+is_trace_instance_closed selftest
+del_trace_instance_dir selftest 1
+check_trace_instance_dir selftest 0
+}
+
+function test_early_close () {
+ddcmd open kparm_stream
+ddcmd module usbcore +T:kparm_stream.mf
+check_match_ct =T:usb_stream.mf 161
+echo ":not-running # ddcmd module usbcore -T:kparm_stream.mf"
+ddcmd close kparm_stream
+}
+
+function self_test_ {
+echo "# SELFTEST $1"
+self_start
+self_end_$1
+}
+
+function cycle_tests_normal {
+echo -e "${GREEN}# CYCLE_TESTS_NORMAL ${NC}"
+self_test_ normal # ok
+self_test_ disable_anon # ok
+self_test_ normal # ok
+self_test_ disable_anon_mf # ok
+}
+
+function cycle_not_best_practices {
+echo -e "${GREEN}# CYCLE_TESTS_PROBLEMS ${NC}"
+self_test_ nodisable
+self_test_ normal
+self_test_ delete_directory
+}
+
+# proper life cycle - open, enable:named, disable:named, close
+function test_private_trace_simple_proper {
+echo -e "${GREEN}# TEST_PRIVATE_TRACE_1 ${NC}"
+# ddcmd
[PATCH v8 31/35] drm-dyndbg: adapt to use DYNDBG_CLASSMAP_PARAM
use new export
---
drivers/gpu/drm/drm_print.c | 8 ++--
include/drm/drm_print.h | 6 --
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm/drm_print.c
index 4a5f2317229b..efdf82f8cbbb 100644
--- a/drivers/gpu/drm/drm_print.c
+++ b/drivers/gpu/drm/drm_print.c
@@ -69,12 +69,8 @@ DRM_CLASSMAP_DEFINE(drm_debug_classes,
DD_CLASS_TYPE_DISJOINT_BITS,
"DRM_UT_DP",
"DRM_UT_DRMRES");
-static struct ddebug_class_param drm_debug_bitmap = {
- .bits = &__drm_debug,
- .flags = "p",
- .map = _debug_classes,
-};
-module_param_cb(debug, _ops_dyndbg_classes, _debug_bitmap, 0600);
+DRM_CLASSMAP_PARAM_REF(debug, __drm_debug, drm_debug_classes, p);
+
#endif
void __drm_puts_coredump(struct drm_printer *p, const char *str)
diff --git a/include/drm/drm_print.h b/include/drm/drm_print.h
index 905fc25bf65a..95c667934bbb 100644
--- a/include/drm/drm_print.h
+++ b/include/drm/drm_print.h
@@ -141,11 +141,13 @@ enum drm_debug_category {
};
#ifdef CONFIG_DRM_USE_DYNAMIC_DEBUG
-#define DRM_CLASSMAP_DEFINE(...) DYNDBG_CLASSMAP_DEFINE(__VA_ARGS__)
-#define DRM_CLASSMAP_USE(name) DYNDBG_CLASSMAP_USE(name)
+#define DRM_CLASSMAP_DEFINE(...)DYNDBG_CLASSMAP_DEFINE(__VA_ARGS__)
+#define DRM_CLASSMAP_USE(name) DYNDBG_CLASSMAP_USE(name)
+#define DRM_CLASSMAP_PARAM_REF(...) DYNDBG_CLASSMAP_PARAM_REF(__VA_ARGS__)
#else
#define DRM_CLASSMAP_DEFINE(...)
#define DRM_CLASSMAP_USE(name)
+#define DRM_CLASSMAP_PARAM_REF(...)
#endif
static inline bool drm_debug_enabled_raw(enum drm_debug_category category)
--
2.44.0
[PATCH v8 20/35] dyndbg-doc: add classmap info to howto
Describe the 3 API macros providing dynamic_debug's classmaps DYNDBG_CLASSMAP_DEFINE - create, exports a module's classmap DYNDBG_CLASSMAP_USE- refer to exported map DYNDBG_CLASSMAP_PARAM - bind control param to the classmap DYNDBG_CLASSMAP_PARAM_REF + use module's storage - __drm_debug cc: linux-...@vger.kernel.org Signed-off-by: Jim Cromie --- v5 adjustments per Randy Dunlap v7 checkpatch fixes v8 more --- .../admin-guide/dynamic-debug-howto.rst | 63 ++- 1 file changed, 62 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/dynamic-debug-howto.rst b/Documentation/admin-guide/dynamic-debug-howto.rst index 6a8ce5a34382..742eb4230c6e 100644 --- a/Documentation/admin-guide/dynamic-debug-howto.rst +++ b/Documentation/admin-guide/dynamic-debug-howto.rst @@ -225,7 +225,6 @@ the ``p`` flag has meaning, other flags are ignored. Note the regexp ``^[-+=][fslmpt_]+$`` matches a flags specification. To clear all flags at once, use ``=_`` or ``-fslmpt``. - Debug messages during Boot Process == @@ -375,3 +374,65 @@ just a shortcut for ``print_hex_dump(KERN_DEBUG)``. For ``print_hex_dump_debug()``/``print_hex_dump_bytes()``, format string is its ``prefix_str`` argument, if it is constant string; or ``hexdump`` in case ``prefix_str`` is built dynamically. + +Dynamic Debug classmaps +=== + +Dyndbg allows selection/grouping of *prdbg* callsites using structural +info: module, file, function, line. Classmaps allow authors to add +their own domain-oriented groupings using class-names. Classmaps are +exported, so they referencable from other modules. + + # enable classes individually + :#> ddcmd class DRM_UT_CORE +p + :#> ddcmd class DRM_UT_KMS +p + # or more selectively + :#> ddcmd class DRM_UT_CORE module drm +p + +The "class FOO" syntax protects class'd prdbgs from generic overwrite:: + + # IOW this doesn't wipe any DRM.debug settings + :#> ddcmd -p + +To support the DRM.debug parameter, DYNDBG_CLASSMAP_PARAM* updates all +classes in a classmap, mapping param-bits 0..N onto the classes: +DRM_UT_<*> for the DRM use-case. + +Dynamic Debug Classmap API +== + +DYNDBG_CLASSMAP_DEFINE - modules use this to create classmaps, naming +each of the classes (stringified enum-symbols: "DRM_UT_<*>"), and +type, and mapping the class-names to consecutive _class_ids. + +By doing so, modules tell dyndbg that they have prdbgs with those +class_ids, and they authorize dyndbg to accept "class FOO" for the +module defining the classmap, and its contained classnames. + +DYNDBG_CLASSMAP_USE - drm drivers invoke this to ref the CLASSMAP that +drm DEFINEs. This shares the classmap definition, and authorizes +dyndbg to apply changes to the user module's class'd pr_debugs. It +also tells dyndbg how to initialize the user's prdbgs at modprobe, +based upon the current setting of the parent's controlling param. + +There are 2 types of classmaps: + + DD_CLASS_TYPE_DISJOINT_BITS: classes are independent, like DRM.debug + DD_CLASS_TYPE_LEVEL_NUM: classes are relative, ordered (V3 > V2) + +DYNDBG_CLASSMAP_PARAM - modelled after module_param_cb, it refers to a +DEFINEd classmap, and associates it to the param's data-store. This +state is then applied to DEFINEr and USEr modules when they're modprobed. + +This interface also enforces the DD_CLASS_TYPE_LEVEL_NUM relation +amongst the contained classnames; all classes are independent in the +control parser itself. + +Modules or module-groups (drm & drivers) can define multiple +classmaps, as long as they share the limited 0..62 per-module-group +_class_id range, without overlap. + +``#define DEBUG`` will enable all pr_debugs in scope, including any +class'd ones. This won't be reflected in the PARAM readback value, +but the class'd pr_debug callsites can be forced off by toggling the +classmap-kparam all-on then all-off. -- 2.44.0
[PATCH v8 35/35] drm-print: workaround compiler meh
For some reason I cannot grok, I get an unused variable 'category'
warning/error, though the usage follows immediately. This drops the
local var and directly derefs in the macro-call, which somehow avoids
the warning.
commit 9fd6f61a297e ("drm/print: add drm_dbg_printer() for drm device specific
printer")
CC: Jani Nikula
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/drm_print.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm/drm_print.c
index efdf82f8cbbb..c400441cd77e 100644
--- a/drivers/gpu/drm/drm_print.c
+++ b/drivers/gpu/drm/drm_print.c
@@ -183,11 +183,10 @@ void __drm_printfn_dbg(struct drm_printer *p, struct
va_format *vaf)
{
const struct drm_device *drm = p->arg;
const struct device *dev = drm ? drm->dev : NULL;
- enum drm_debug_category category = p->category;
const char *prefix = p->prefix ?: "";
const char *prefix_pad = p->prefix ? " " : "";
- if (!__drm_debug_enabled(category))
+ if (!__drm_debug_enabled(p->category))
return;
/* Note: __builtin_return_address(0) is useless here. */
--
2.44.0
[PATCH v8 23/35] dyndbg: split multi-query strings with %
Multi-query strings have long allowed:
modprobe drm dyndbg="class DRM_UT_CORE +p; class DRM_UT_KMS +p"
modprobe drm dyndbg=<
[ 203.902703] dyndbg: query parse failed
[ 203.902871] dyndbg: processed 2 queries, with 0 matches, 2 errs
bash: echo: write error: Invalid argument
The '%' splits the input into 2 queries, and both fail. Given the
limited utility of matching against the working parts of a format
string "foo: %d bar %s", nothing is actually lost here.
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index c1bc728cb050..625838bd74aa 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -596,7 +596,7 @@ static int ddebug_exec_queries(char *query, const char
*modname)
int i, errs = 0, exitcode = 0, rc, nfound = 0;
for (i = 0; query; query = split) {
- split = strpbrk(query, ";\n");
+ split = strpbrk(query, "%;\n");
if (split)
*split++ = '\0';
--
2.44.0
[PATCH v8 18/35] selftests-dyndbg: exit 127 if no facility
Test if /proc/dynamic_debug/control exists, exit 127 otherwise.
This distinguishes an untestable config from both pass & fail.
The 127 choice is pretty arbitrary, but imitating bisect.
That control file's presense guarantees that dynamic-debugging is
configured (unless /proc is off, unusually), without dealing with the
mount.
Signed-off-by: Jim Cromie
---
tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh | 5 +
1 file changed, 5 insertions(+)
diff --git a/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
b/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
index 1be70af26a38..cb77ae142520 100755
--- a/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
+++ b/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
@@ -11,6 +11,11 @@ CYAN="\033[0;36m"
NC="\033[0;0m"
error_msg=""
+[ -e /proc/dynamic_debug/control ] || {
+echo -e "${RED}: kernel not configured for this test ${NC}"
+exit 127
+}
+
function vx () {
echo $1 > /sys/module/dynamic_debug/parameters/verbose
}
--
2.44.0
[PATCH v8 06/35] dyndbg: replace classmap list with a vector
Classmaps are stored in an elf section/array, but are individually
list-linked onto dyndbg's per-module ddebug_table for operation.
This is unnecessary; even when ddebug_attach_classmap() is handling
the builtin section (with classmaps for multiple builtin modules), its
contents are ordered, so a module's possibly multiple classmaps will
be consecutive in the section, and could be treated as a vector/block,
since both start-addy and subrange length are in the ddebug_info arg.
IOW, this treats classmaps similarly to _ddebugs, which are already
kept as vector-refs (address+len).
So this changes:
struct ddebug_class_map drops list-head link.
struct ddebug_table drops the list-head maps, and gets: classes &
num_classes for the start-addy and num_classes, placed to improve
struct packing.
The loading: in ddebug_attach_module_classes(), replace the
for-the-modname list-add loop, with a forloop that finds the module's
subrange (start,length) of matching classmaps within the possibly
builtin classmaps vector, and saves those to the ddebug_table.
The reading/using: change list-foreach loops in ddebug_class_name() &
ddebug_find_valid_class() to walk the array from start to length.
Also:
Move #define __outvar up, above an added use in a fn-prototype.
Simplify ddebug_attach_module_classes args, ref has both addy,len.
no functional changes
Signed-off-by: Jim Cromie
---
include/linux/dynamic_debug.h | 1 -
lib/dynamic_debug.c | 61 ++-
2 files changed, 32 insertions(+), 30 deletions(-)
diff --git a/include/linux/dynamic_debug.h b/include/linux/dynamic_debug.h
index 5231aaf361c4..b53217e4b711 100644
--- a/include/linux/dynamic_debug.h
+++ b/include/linux/dynamic_debug.h
@@ -83,7 +83,6 @@ enum class_map_type {
};
struct ddebug_class_map {
- struct list_head link;
struct module *mod;
const char *mod_name; /* needed for builtins */
const char **class_names;
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index 152b04c05981..46e4cdd8e6be 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -45,10 +45,11 @@ extern struct ddebug_class_map __start___dyndbg_classes[];
extern struct ddebug_class_map __stop___dyndbg_classes[];
struct ddebug_table {
- struct list_head link, maps;
+ struct list_head link;
const char *mod_name;
- unsigned int num_ddebugs;
struct _ddebug *ddebugs;
+ struct ddebug_class_map *classes;
+ unsigned int num_ddebugs, num_classes;
};
struct ddebug_query {
@@ -147,13 +148,15 @@ static void vpr_info_dq(const struct ddebug_query *query,
const char *msg)
query->first_lineno, query->last_lineno, query->class_string);
}
+#define __outvar /* filled by callee */
static struct ddebug_class_map *ddebug_find_valid_class(struct ddebug_table
const *dt,
- const char
*class_string, int *class_id)
+ const char
*class_string,
+ __outvar int *class_id)
{
struct ddebug_class_map *map;
- int idx;
+ int i, idx;
- list_for_each_entry(map, >maps, link) {
+ for (map = dt->classes, i = 0; i < dt->num_classes; i++, map++) {
idx = match_string(map->class_names, map->length, class_string);
if (idx >= 0) {
*class_id = idx + map->base;
@@ -164,7 +167,6 @@ static struct ddebug_class_map
*ddebug_find_valid_class(struct ddebug_table cons
return NULL;
}
-#define __outvar /* filled by callee */
/*
* Search the tables for _ddebug's which match the given `query' and
* apply the `flags' and `mask' to them. Returns number of matching
@@ -1114,9 +1116,10 @@ static void *ddebug_proc_next(struct seq_file *m, void
*p, loff_t *pos)
static const char *ddebug_class_name(struct ddebug_iter *iter, struct _ddebug
*dp)
{
- struct ddebug_class_map *map;
+ struct ddebug_class_map *map = iter->table->classes;
+ int i, nc = iter->table->num_classes;
- list_for_each_entry(map, >table->maps, link)
+ for (i = 0; i < nc; i++, map++)
if (class_in_range(dp->class_id, map))
return map->class_names[dp->class_id - map->base];
@@ -1200,30 +1203,31 @@ static const struct proc_ops proc_fops = {
.proc_write = ddebug_proc_write
};
-static void ddebug_attach_module_classes(struct ddebug_table *dt,
-struct ddebug_class_map *classes,
-int num_classes)
+static void ddebug_attach_module_classes(struct ddebug_table *dt, struct
_ddebug_info *di)
{
struct ddebug_class_map *cm;
- int i, j, ct = 0;
+ int i, nc = 0;
- for (cm = classes, i = 0; i < num_classes; i++, cm++) {
+ /*
+* Find this module's classmaps in a
[PATCH v8 13/35] dyndbg: tighten fn-sig of ddebug_apply_class_bitmap
old_bits arg is currently a pointer to the input bits, but this could
allow inadvertent changes to the input by the fn. Disallow this.
And constify new_bits while here.
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 21 +++--
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index 882354e1e78f..d4a0ae31d059 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -597,7 +597,8 @@ static int ddebug_exec_queries(char *query, const char
*modname)
/* apply a new class-param setting */
static int ddebug_apply_class_bitmap(const struct ddebug_class_param *dcp,
-unsigned long *new_bits, unsigned long
*old_bits,
+const unsigned long *new_bits,
+const unsigned long old_bits,
const char *query_modname)
{
#define QUERY_SIZE 128
@@ -606,12 +607,12 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
int matches = 0;
int bi, ct;
- if (*new_bits != *old_bits)
+ if (*new_bits != old_bits)
v2pr_info("apply bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
- *old_bits, query_modname ?: "'*'");
+ old_bits, query_modname ?: "'*'");
for (bi = 0; bi < map->length; bi++) {
- if (test_bit(bi, new_bits) == test_bit(bi, old_bits))
+ if (test_bit(bi, new_bits) == test_bit(bi, _bits))
continue;
snprintf(query, QUERY_SIZE, "class %s %c%s",
map->class_names[bi],
@@ -623,9 +624,9 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
v2pr_info("bit_%d: %d matches on class: %s -> 0x%lx\n", bi,
ct, map->class_names[bi], *new_bits);
}
- if (*new_bits != *old_bits)
+ if (*new_bits != old_bits)
v2pr_info("applied bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
- *old_bits, query_modname ?: "'*'");
+ old_bits, query_modname ?: "'*'");
return matches;
}
@@ -681,7 +682,7 @@ static int param_set_dyndbg_classnames(const char *instr,
const struct kernel_pa
continue;
}
curr_bits ^= BIT(cls_id);
- totct += ddebug_apply_class_bitmap(dcp, _bits,
dcp->bits, NULL);
+ totct += ddebug_apply_class_bitmap(dcp, _bits,
*dcp->bits, NULL);
*dcp->bits = curr_bits;
v2pr_info("%s: changed bit %d:%s\n", KP_NAME(kp),
cls_id,
map->class_names[cls_id]);
@@ -691,7 +692,7 @@ static int param_set_dyndbg_classnames(const char *instr,
const struct kernel_pa
old_bits = CLASSMAP_BITMASK(*dcp->lvl);
curr_bits = CLASSMAP_BITMASK(cls_id + (wanted ? 1 : 0
));
- totct += ddebug_apply_class_bitmap(dcp, _bits,
_bits, NULL);
+ totct += ddebug_apply_class_bitmap(dcp, _bits,
old_bits, NULL);
*dcp->lvl = (cls_id + (wanted ? 1 : 0));
v2pr_info("%s: changed bit-%d: \"%s\" %lx->%lx\n",
KP_NAME(kp), cls_id,
map->class_names[cls_id], old_bits,
curr_bits);
@@ -745,7 +746,7 @@ static int param_set_dyndbg_module_classes(const char
*instr,
inrep &= CLASSMAP_BITMASK(map->length);
}
v2pr_info("bits:0x%lx > %s.%s\n", inrep, modnm ?: "*",
KP_NAME(kp));
- totct += ddebug_apply_class_bitmap(dcp, , dcp->bits,
modnm);
+ totct += ddebug_apply_class_bitmap(dcp, , *dcp->bits,
modnm);
*dcp->bits = inrep;
break;
case DD_CLASS_TYPE_LEVEL_NUM:
@@ -758,7 +759,7 @@ static int param_set_dyndbg_module_classes(const char
*instr,
old_bits = CLASSMAP_BITMASK(*dcp->lvl);
new_bits = CLASSMAP_BITMASK(inrep);
v2pr_info("lvl:%ld bits:0x%lx > %s\n", inrep, new_bits,
KP_NAME(kp));
- totct += ddebug_apply_class_bitmap(dcp, _bits, _bits,
modnm);
+ totct += ddebug_apply_class_bitmap(dcp, _bits, old_bits,
modnm);
*dcp->lvl = inrep;
break;
default:
--
2.44.0
[PATCH v8 22/35] selftests-dyndbg: add comma_terminator_tests
New fn validates parsing and effect of queries using combinations of
commas and spaces to delimit the tokens.
It manipulates pr-debugs in builtin module/params, so might have deps
I havent foreseen on odd configurations.
Signed-off-by: Jim Cromie
---
.../selftests/dynamic_debug/dyndbg_selftest.sh | 14 ++
1 file changed, 14 insertions(+)
diff --git a/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
b/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
index cb77ae142520..7a7d437e948b 100755
--- a/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
+++ b/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
@@ -217,9 +217,23 @@ EOF
ddcmd =_
}
+function comma_terminator_tests {
+echo -e "${GREEN}# COMMA_TERMINATOR_TESTS ${NC}"
+# try combos of spaces & commas
+check_match_ct '\[params\]' 4 -r
+ddcmd module,params,=_ # commas as spaces
+ddcmd module,params,+mpf # turn on module's pr-debugs
+check_match_ct =pmf 4
+ddcmd ,module ,, , params, -p
+check_match_ct =mf 4
+ddcmd " , module ,,, , params, -m"#
+check_match_ct =f 4
+ddcmd =_
+}
tests_list=(
basic_tests
+comma_terminator_tests
)
# Run tests
--
2.44.0
