Re: [ARTIQ] ARTIQ Digest, Vol 34, Issue 3

2017-03-15 Thread Grzegorz Kasprowicz via ARTIQ
You don’t have to do combined order. Just drop an email that you want to order 
10 pieces with each board shipped to certain place. Only transportation cost 
will apply.

Greg

 

 

From: Neal Pisenti [mailto:npise...@gmail.com] 
Sent: Wednesday, March 15, 2017 9:37 PM
To: Grzegorz Kasprowicz ; Thomas Harty 

Cc: artiq@lists.m-labs.hk
Subject: Re: [ARTIQ] ARTIQ Digest, Vol 34, Issue 3

 

I was about to email out for quotes from Creotech and Technosystem for the FMC 
-> VHCDI boards. It sounds like Joe wants ~2x, we want 2x, and @Tom, I'm 
guessing you guys want at least 2x as well... that puts us in the qty 6-10 
range.

 

If we can bulk the order, that should bring the price down a little. Talking to 
the accounts people here, it sounds like it is "nearly impossible" to bill 
groups outside UMD (ie, to put 10x boards on a single PO through UMD, then 
re-arrange monies afterwards), but hopefully either of those companies will 
quote us with the assumption/promise that each group will pay for their 
quantity separately...?

 

If you guys have any other ideas, let me know.

 

Neal

 

On Fri, Mar 10, 2017 at 8:58 AM Grzegorz Kasprowicz via ARTIQ 
 > wrote:

I already received assembled 3U boards including VHDCI carrier and BNC IO.

So we can test whole setup in the lab quickly. 
You can help us with simple HDL design for KC705 that i.e. toggles IOs or makes 
loopback: ttl->lvds->VHDCI-> FPGA-> VHDCI->lvds->TTL.

At the moment we are so occupied with other tasks that every help is very 
valuable.

Greg

 

On 10 March 2017 at 14:33, Thomas Harty  > wrote:

> It is compatible with VHDCI carrier - I used the same pinout.

Thanks for confirming that. In that case, we'll have a few of these made up, 
and plan to use them with the KC705 + VHDCI carrier as a short-term solution.



-Original Message-
From: ARTIQ [mailto:artiq-boun...@lists.m-labs.hk 
 ] On Behalf Of Thomas Harty via ARTIQ
Sent: Friday, March 10, 2017 12:56 PM
To: artiq@lists.m-labs.hk  
Subject: Re: [ARTIQ] ARTIQ Digest, Vol 34, Issue 3

> ..., and we might spin up some in-house boards for multichannel DAC over SPI.

FYI, the Zotino and Novogorny DAC/ADC EEMs are now funded (Oxford/Freiburg) and 
being designed by WUT. They should be ready in ~12weeks. We're planning to 
contract M-Labs to provide full support for them.

The draft specifications are on the Wiki at 
https://github.com/m-labs/sinara/wiki feel free to comment on them if you have 
requests/questions.

> What adapters in particular? http://www.ohwr.org/projects/fmc-vhdci?

@Greg, can you confirm whether this is compatible with the VHDCI carrier?
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Re: [ARTIQ] ARTIQ Digest, Vol 34, Issue 3

2017-03-15 Thread Thomas Harty via ARTIQ
Neal,

If we can bulk the order, that should bring the price down a little. Talking to 
the accounts people here, it sounds like it is "nearly impossible" to bill 
groups outside UMD (ie, to put 10x boards on a single PO through UMD, then 
re-arrange monies afterwards), but hopefully either of those companies will 
quote us with the assumption/promise that each group will pay for their 
quantity separately…?

Thanks for the offer, but I’ve already ordered a batch of the PCBs from Itead 
Studio, with the intention of populating them ourselves. We have a decent oven 
here, which we’ve used for FMCs before without problems. Given how simple this 
board is compared to the average university finance system, my bet is that 
assembling a couple of them will take less time than arranging a joint 
purchasing agreement…

T


On 15 Mar 2017, at 20:36, Neal Pisenti 
> wrote:

I was about to email out for quotes from Creotech and Technosystem for the FMC 
-> VHCDI boards. It sounds like Joe wants ~2x, we want 2x, and @Tom, I'm 
guessing you guys want at least 2x as well... that puts us in the qty 6-10 
range.

If we can bulk the order, that should bring the price down a little. Talking to 
the accounts people here, it sounds like it is "nearly impossible" to bill 
groups outside UMD (ie, to put 10x boards on a single PO through UMD, then 
re-arrange monies afterwards), but hopefully either of those companies will 
quote us with the assumption/promise that each group will pay for their 
quantity separately...?

If you guys have any other ideas, let me know.

Neal

On Fri, Mar 10, 2017 at 8:58 AM Grzegorz Kasprowicz via ARTIQ 
> wrote:
I already received assembled 3U boards including VHDCI carrier and BNC IO.
So we can test whole setup in the lab quickly.
You can help us with simple HDL design for KC705 that i.e. toggles IOs or makes 
loopback: ttl->lvds->VHDCI-> FPGA-> VHDCI->lvds->TTL.
At the moment we are so occupied with other tasks that every help is very 
valuable.
Greg

On 10 March 2017 at 14:33, Thomas Harty 
> wrote:
> It is compatible with VHDCI carrier - I used the same pinout.

Thanks for confirming that. In that case, we'll have a few of these made up, 
and plan to use them with the KC705 + VHDCI carrier as a short-term solution.


-Original Message-
From: ARTIQ 
[mailto:artiq-boun...@lists.m-labs.hk] On 
Behalf Of Thomas Harty via ARTIQ
Sent: Friday, March 10, 2017 12:56 PM
To: artiq@lists.m-labs.hk
Subject: Re: [ARTIQ] ARTIQ Digest, Vol 34, Issue 3

> ..., and we might spin up some in-house boards for multichannel DAC over SPI.

FYI, the Zotino and Novogorny DAC/ADC EEMs are now funded (Oxford/Freiburg) and 
being designed by WUT. They should be ready in ~12weeks. We're planning to 
contract M-Labs to provide full support for them.

The draft specifications are on the Wiki at 
https://github.com/m-labs/sinara/wiki feel free to comment on them if you have 
requests/questions.

> What adapters in particular? http://www.ohwr.org/projects/fmc-vhdci?

@Greg, can you confirm whether this is compatible with the VHDCI carrier?
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Re: [ARTIQ] [RFC] remove RTIOCollision

2017-03-15 Thread Robert Jördens via ARTIQ
On Wed, Mar 15, 2017 at 1:07 PM, Sébastien Bourdeauducq via ARTIQ
 wrote:
> Hi,
>
> RTIOCollision is a bit tedious to implement with DRTIO, since the master
> does not know if a given channel should do replace or collision. The
> satellite would need to report this information for each of its channels
> (and this also needs to be passed from the gateware scripts to the satellite
> manager firmware), then the master should program it into its gateware. Do
> we strongly need it, or can we simply have the replace behavior at all
> times? According to this mailing list discussion, the replace behavior is
> actually wanted:
> https://ssl.serverraum.org/lists-archive/artiq/2016-November/001052.html

Even on the same (data) address, many channels are not idempotent (the
DDS, SAWG, any SPI devices). More generally any channel where state is
kept can be non-idempotent. I don't see how we can track that at the
master.
Why not do blind submission and do the replacement at the satellite
side plus asynchronous error reporting like RTIOBusy?

-- 
Robert Jördens.
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[ARTIQ] [RFC] remove RTIOCollision

2017-03-15 Thread Sébastien Bourdeauducq via ARTIQ

Hi,

RTIOCollision is a bit tedious to implement with DRTIO, since the master 
does not know if a given channel should do replace or collision. The 
satellite would need to report this information for each of its channels 
(and this also needs to be passed from the gateware scripts to the 
satellite manager firmware), then the master should program it into its 
gateware. Do we strongly need it, or can we simply have the replace 
behavior at all times? According to this mailing list discussion, the 
replace behavior is actually wanted:

https://ssl.serverraum.org/lists-archive/artiq/2016-November/001052.html

Sébastien
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